JPS61244000A - Data storage device - Google Patents

Data storage device

Info

Publication number
JPS61244000A
JPS61244000A JP60085645A JP8564585A JPS61244000A JP S61244000 A JPS61244000 A JP S61244000A JP 60085645 A JP60085645 A JP 60085645A JP 8564585 A JP8564585 A JP 8564585A JP S61244000 A JPS61244000 A JP S61244000A
Authority
JP
Japan
Prior art keywords
data
memory
signal
storage device
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60085645A
Other languages
Japanese (ja)
Inventor
Fushiaki Haruhara
春原 節昭
Yasushi Sakaino
境野 靖
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chino Corp
Original Assignee
Chino Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chino Corp filed Critical Chino Corp
Priority to JP60085645A priority Critical patent/JPS61244000A/en
Publication of JPS61244000A publication Critical patent/JPS61244000A/en
Pending legal-status Critical Current

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  • Memory System (AREA)

Abstract

PURPOSE:To store efficiently data for many hours by changing a storage period in accordance with a state of a signal which has been converted digitally, and storing it together with time data. CONSTITUTION:As for a signal passing through an A/D converter 3, the storage period is prolonged in case when the signal is scarcely varied, by processing using a CPU4 corresponding to a setting means 5 for setting a storage state. Also, a signal of a small number of samplings, and time data of a sampling period are written on a memory 6, and after it has been read out, a signal is reproduced, based on both the data. According to them, only correct data is stored and the data can be stored efficiently for many hours.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、測定アナログ入力信号データをメモリに記
憶するデータ記憶装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data storage device that stores measured analog input signal data in a memory.

[従来の技術] 従来、アナログ入力信号をデジタル信号に変換してメモ
リに記憶し、再生して記録するようなデータ記憶装置が
知られている。
[Prior Art] Conventionally, data storage devices are known that convert an analog input signal into a digital signal, store it in a memory, reproduce it, and record it.

[この発明が解決しようとする問題点コしかしながら、
これらの従来装置は、入力信号を常に一定の時間周期で
記憶するようなものが、はとんどである。この々め、第
3図(a )で示すような入力信号の被測定波形をメモ
リに記憶しようとすると、第3図(b)で示すように入
力信号の状態変化にかかわらず、この例では約210サ
ンプルのデータをメモリに記憶せねばならず、重要でな
いデータも綱かいステップで記憶するため、非常に多く
の記憶容量が必要となる。
[The problems that this invention attempts to solve, however,
Most of these conventional devices always store input signals at a constant time period. If you try to store the measured waveform of the input signal as shown in Figure 3(a) in memory, regardless of the state change of the input signal as shown in Figure 3(b), in this example, Approximately 210 samples of data must be stored in the memory, and unimportant data is also stored in large steps, requiring a very large storage capacity.

この発明の目的は、以上の点に鑑み、データの記憶周期
を可変にするようにし、長時間データの記憶を効率的に
可能としたデータ記憶装置を提供することである。
In view of the above points, an object of the present invention is to provide a data storage device in which the data storage cycle is made variable and data can be efficiently stored for a long period of time.

[問題点を解決するための手段」 この発明は、アナログ入力信号をデジタル信号に変換し
てメモリに記憶するデータ記憶装置において、入力信号
の状態変化または指定された記憶条件に応じてこの入力
データの記憶周期を変化させてメモリに記憶するととも
に時間データも同時に〜記憶するようにした7′−夕記
憶装置である。
[Means for Solving the Problems] The present invention provides a data storage device that converts an analog input signal into a digital signal and stores it in a memory. This is a 7'-event storage device which stores time data in the memory while changing the storage period of the data.

[実施例1 第1図は、この発明の一実施例を示す構成説明図である
[Embodiment 1] FIG. 1 is a configuration explanatory diagram showing an embodiment of the present invention.

入力回路1で取り込まれたアナログ入力信号は、増幅器
2で増幅され、A−D変換器3でデジタル信号とされ、
この入力データはマイクロコンピュータのような処理手
段4により入力信号の状態変化に応じて異なった記憶周
期でメモリ6に記憶される。また、設定手段5により記
憶(メモリ)条件等の各種の設定を行い、表示手段7、
記録手段8によりデータの表示、記録を行う。また、メ
モリ6に入力データの記憶と同時に時間データの記憶を
行うようにしている。
The analog input signal taken in by the input circuit 1 is amplified by the amplifier 2, converted into a digital signal by the A-D converter 3,
This input data is stored in the memory 6 by a processing means 4 such as a microcomputer at different storage cycles depending on changes in the state of the input signal. Further, the setting means 5 performs various settings such as storage (memory) conditions, and the display means 7,
The recording means 8 displays and records data. Further, time data is stored in the memory 6 simultaneously with input data.

つまり、第3図(a )の入力信号の被測定波形をメモ
リ6に記憶するに際し、第3図(C)のような記憶周期
で記憶させればよい。
That is, when storing the measured waveform of the input signal shown in FIG. 3(a) in the memory 6, it is sufficient to store it in the storage period as shown in FIG. 3(C).

つまり、第2図で動作を示すように、入力信号は所定の
周期で取り込まれるのであるが、領MAでは、入力信号
の状態変化が大きいので最小の時域Aより入力信号の状
態変化がゆるやかなのでもう少し長い時間間隔(たとえ
ば0.2sの記憶周期)で10サンプル記憶する。以下
順次入力信号の変化は小さくなるので、領tiiXc、
o、+=、Fでは、順次長い時間間隔、たとえば、O,
’3SS0゜4s、0.5s、0.6sの時間間隔でサ
ンプルしてメモリ6に記憶し、全体で61サンプルとな
る。このように、入力データの状態変化が小さい場合、
入力回路1で取り込んだデータのうち、何回かに1回の
みメモリ6に記憶する。そして、これら入力データをメ
モリ6に格納するとき、図示しない時間発生手段からの
時間データも同時にその入力アークに関連づけてメモリ
6に格納する。
In other words, as shown in Figure 2, the input signal is taken in at a predetermined period, but in region MA, the state change of the input signal is large, so the state change of the input signal is more gradual than in the minimum time region A. Therefore, 10 samples are stored at slightly longer time intervals (for example, a storage cycle of 0.2 seconds). Since the change in the input signal becomes smaller sequentially, the region tiiXc,
o,+=,F, for successively longer time intervals, e.g., O,
'3SS0° Sampled at time intervals of 4s, 0.5s, and 0.6s and stored in the memory 6, resulting in a total of 61 samples. In this way, when the state change of input data is small,
Of the data taken in by the input circuit 1, it is stored in the memory 6 only once every few times. When these input data are stored in the memory 6, time data from a time generating means (not shown) is also stored in the memory 6 in association with the input arc.

次に再生する場合、時間データに基き、実時間で、つま
り、記憶周期の時間毎に入力データを処理手段4で、表
示手段7に出力したり、あるいは記録手段8に出力して
記録紙に記録するようにし、第3図(C)に相当する出
力を得ることができる。
When reproducing the data next time, the processing means 4 outputs the input data to the display means 7 in real time based on the time data, that is, at every time of the storage cycle, or outputs it to the recording means 8 and prints it on recording paper. By doing so, an output corresponding to that shown in FIG. 3(C) can be obtained.

りを実際の時間に換算して出力するようにしてもよい。It is also possible to convert the value into actual time and output it.

なお、入力信号の状態変化としては、入力信号の変化率
を測定して記憶周期〈時間間隔)を可変とするものの伯
、通常は長い記憶周期で、ある上限値、下限値を越えた
ときに記憶周期を高速としてデータを記憶したり、知り
たい入力範囲のみを高速記憶するようにしてもよい。ま
た、あらかじめ設定手段5で設定した記憶(メモリ)条
件に応じて記憶周期を変えて記憶するようにしてもよい
In addition, the change in the state of the input signal is measured when the rate of change of the input signal is measured and the storage period (time interval) is made variable. Usually, the storage period is long, and when a certain upper limit or lower limit is exceeded. Data may be stored at a high storage cycle, or only the desired input range may be stored at high speed. Further, the data may be stored with the storage period changed according to storage (memory) conditions set in advance by the setting means 5.

こうした一連の動作は第2図を参照しても分るように、
入力信号の状態変化または指定されたメモリ条件でデー
タの記憶周期を変えてメモリ6に記憶している。また、
再生したデータは、図示しないD−A変換器で電圧出力
のアナログ信号とし、外部のアナログ記録計に記録また
はオシロスロープに表示するようにしてもよい。また、
適当な音声で出力するようにしてもよい。
This series of operations can be seen by referring to Figure 2.
Data is stored in the memory 6 while changing its storage cycle depending on a change in the state of the input signal or specified memory conditions. Also,
The reproduced data may be converted into a voltage output analog signal by a DA converter (not shown), and may be recorded on an external analog recorder or displayed on an oscilloscope. Also,
It may be possible to output it with an appropriate sound.

態変化に応じて記憶する周期を変えているので、少ない
メモリ容昌で、多くの必要とするデータの記憶が可能で
、高速現象も品質の低下なく記憶でき、速い変化、遅い
変化が共存してもデータ抜けなく記憶でき、時間γ−夕
により再生時に実際の実時間出力が可能である。
Since the storage cycle is changed according to changes in the state, it is possible to store a large amount of required data with a small amount of memory capacity, and high-speed phenomena can be stored without loss of quality, and fast changes and slow changes can coexist. However, data can be stored without any data loss, and actual real-time output is possible during playback due to the time γ-day.

【図面の簡単な説明】 第1図、第2図は、こ・の発明の一実施例を示す説明図
、第3図(a )は入力信号の一例を示す図、第3図(
b)は従来例のデータ記憶の一例を示す図、第3図(C
)は、この発明のデータ記憶の一例を示す図である。
[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1 and 2 are explanatory diagrams showing one embodiment of this invention, FIG. 3(a) is a diagram showing an example of an input signal, and FIG.
b) is a diagram showing an example of conventional data storage; FIG.
) is a diagram showing an example of data storage according to the present invention.

Claims (1)

【特許請求の範囲】 1、アナログ入力信号をデジタル信号に変換してメモリ
に記憶するデータ記憶装置において、入力信号の状態変
化または指定された記憶条件に応じてこの入力データの
記憶周期を変えてメモリに記憶するとともに時間データ
も同時にメモリに記憶するようにしたことを特徴とする
データ記憶装置。 2、時間データに基き入力データを実際の時間換算し再
生して出力することを特徴とする特許請求の範囲第1項
記載のデータ記憶装置。 3、再生データを記録紙に記録することを特徴とする特
許請求の範囲第1項または第2項記載のデータ記憶装置
。 4、再生データをCRT等の表示手段に表示させるよう
にしたことを特徴とする特許請求の範囲第1項から第3
項記載のデータ記憶装置。
[Claims] 1. In a data storage device that converts an analog input signal into a digital signal and stores it in a memory, the storage period of this input data is changed according to a change in the state of the input signal or a specified storage condition. A data storage device characterized in that it stores time data in a memory and also stores time data in the memory at the same time. 2. The data storage device according to claim 1, wherein input data is converted into actual time based on time data, reproduced and outputted. 3. The data storage device according to claim 1 or 2, wherein the reproduced data is recorded on recording paper. 4. Claims 1 to 3, characterized in that the reproduced data is displayed on a display means such as a CRT.
Data storage device as described in Section.
JP60085645A 1985-04-22 1985-04-22 Data storage device Pending JPS61244000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60085645A JPS61244000A (en) 1985-04-22 1985-04-22 Data storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60085645A JPS61244000A (en) 1985-04-22 1985-04-22 Data storage device

Publications (1)

Publication Number Publication Date
JPS61244000A true JPS61244000A (en) 1986-10-30

Family

ID=13864554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60085645A Pending JPS61244000A (en) 1985-04-22 1985-04-22 Data storage device

Country Status (1)

Country Link
JP (1) JPS61244000A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08137915A (en) * 1994-11-04 1996-05-31 Nec Corp Data collecting device
JP2019159899A (en) * 2018-03-14 2019-09-19 Necプラットフォームズ株式会社 Time synchronization system, time synchronization method, and time synchronization program

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5885997A (en) * 1981-11-18 1983-05-23 Neptune:Kk Analog signal reproducer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5885997A (en) * 1981-11-18 1983-05-23 Neptune:Kk Analog signal reproducer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08137915A (en) * 1994-11-04 1996-05-31 Nec Corp Data collecting device
JP2019159899A (en) * 2018-03-14 2019-09-19 Necプラットフォームズ株式会社 Time synchronization system, time synchronization method, and time synchronization program

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