JP2684683B2 - Time axis compression circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to a time axis compression circuit for compressing the time axis of an input signal using a random access memory, for example, for audio signal time axis compression. The time axis compression circuit suitable for is completed.

[Conventional technology]

Conventionally, when recording an audio signal on a still video floppy, first, a recording time mode, that is, a time axis compression rate is set, and then the audio signal is sampled and stored in an audio memory, and a specified time axis compression is performed. The time axis was compressed at a rate and recorded on a floppy disk.

[Problems to be solved by the invention]

However, in the above conventional example, it is not always known whether or not the recording time is optimum in the set mode for the audio signal to be recorded, and the recording time ends midway in the audio signal, or conversely, the audio signal Has the drawback that it ends unexpectedly early and creates a silent part on the floppy.

Therefore, according to the present invention, it is not necessary to preset the write clock rate to the random access memory corresponding to the time compression rate of the input signal, and the time axis of the input signal of a desired period is automatically compressed. An object of the present invention is to provide a time axis compression circuit capable of performing the above.

[Means for solving the problem]

A time axis compression circuit according to the present invention is a circuit for compressing a time axis of an input signal by using a random access memory, and sequentially writes the input signal to the memory according to a first clock, and exceeds a predetermined time. Then, according to a second clock obtained by dividing the first clock, a part of the signal already written in the memory is controlled to be rewritten by the input signal, and the signal is written in the memory. It is characterized by comprising a memory control means for controlling such signals to be read out in the order corresponding to the writing of the input signal.

[Action]

By the above means, the write clock rate to the random access memory is adaptively changed according to the temporal length of the input signal whose time axis is to be compressed, and a part of the already written signal is Since it is rewritten by the input signal, the write clock to the random access memory corresponding to the time compression rate of the input signal.
The time axis of the input signal for a desired period can be automatically compressed without the need to set the rate in advance.

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
10 is a microphone for voice input, 12 is an amplifier, 14 is an amplifier
A / D converter that converts the analog output of 12 into a digital signal, 16 is a voice memory, 18 is a D / A converter that converts the voice data read from the voice memory 16 into an analog signal, 20
Is a modulation circuit for magnetic recording, 22 is a magnetic floppy, 24
Is a memory control circuit that controls the A / D converter 14, the audio memory 16 and the D / A converter 18, and 26 is a silence detection circuit that detects whether or not there is silence based on the output of the amplifier 12.

In FIG. 1, when the recording of the audio signal is started, the audio signal input from the microphone 10 is amplified by the amplifier 12,
It is applied to the A / D converter 14 and the silence detection circuit 26. At the start of recording, the memory control circuit 24 supplies the sampling clock φ in the shortest recording mode to the A / D converter 14, and the output of the A / D converter 14 is written in the audio memory 16 by the same clock φ. Here, when the silence detecting circuit 26 detects the silence state within the recording time, the capturing into the audio memory 16 in the shortest recording time is ended. Then, the time axis conversion is performed and read out from the audio memory 16, converted into an analog signal by the D / A converter 18, modulated by the modulation circuit 20, and recorded in the magnetic floppy 22.

Next, the operation when the silent state is not detected within the shortest recording time will be described. In this case, the recording time is managed by the memory control circuit 24. The memory control circuit 24 divides the sampling clock for the A / D converter 14 by half when the initial recording time is exceeded without detecting the silent state. As a result, the A / D converted data of the A / D converter 14 is halved, but the output data of the A / D converter 14 is
It is written in the audio memory 16 so that it is rewritten at a rate of one in two of the data already stored in.

The state of this rewriting is shown in FIG. FIG. 2A shows the data first written in the audio memory 16, and FIG. 2B shows the rewritten data. In Fig. 2, the numbers 1 and 2 on the left side indicate that 1 is the data that was taken in by the first sampling clock φ, and 2 is taken in by the sampling clock φ _1/2 divided by _1/2 . It is shown that it is the collected data. Also, the numbers on the right are
The input order to the audio memory 16 is shown. In FIG. 2, the first sampling clock φ causes 1-1, 1-2, 1-
The data was stored in the voice memory 16 as 3,1-4,1-5,1-6, ..., but due to the passage of the initial recording time, the sampling clock φ ₁ divided by _{1/2 /} 2-1 data 2-1, 2-2,2-3, ..., data 2-1 data 1-
2 to the memory location, data 2-2 to the data 1-4 memory location, data 2-3 to the data 1-6 memory location, and so on, depending on the frequency division ratio (in this case, 1/2). And rewrite the previous data. As a result, the data with the first sampling clock φ also has the same sampling rate as the data with the 1 / 2-divided sampling clock φ _1/2 .

When the data stored in the audio memory 16 is read out in this way, the order of input from the microphone 10, that is, the data 1-1, 1-3, 1-5, 1-7, ..., 2-1, Address them in the order of 2-2, 2-3, .... Since the rewriting of data is regular, such address control is easy. The output data of the audio memory 16 is converted into an analog signal by the D / A converter 18, and is modulated by the modulation circuit 20 to be a magnetic floppy disk.
Record at 22.

In the above description, the frequency was divided by half only once, but if the silent state cannot be detected within the subsequent recording time,
Further, the sampling clock may be divided into 1/2 (1/4 from the beginning), and similarly, the data stored in the audio memory 16 may be rewritten. That is, the data 1- in FIG.
... 3,1-7, ... will be rewritten with the data by the sampling clock of 1/4 frequency.

〔The invention's effect〕

As can be easily understood from the above description, according to the present invention, the write clock rate to the random access memory is adaptively adjusted according to the temporal length of the input signal whose time axis is to be compressed. Since it is changed so that a part of the already written signal is rewritten by the input signal, a random number corresponding to the time compression rate of the input signal is used.
It is not necessary to preset the write clock rate to the access memory, and the time axis of the input signal in the desired period can be automatically compressed. For example, if the present invention is applied to a time axis compression circuit of an audio signal in a still video recording system, it is not necessary to preset the audio recording time and the operation of audio recording can be simplified.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a diagram for explaining how data is rewritten in the audio memory 16. 10 ... Microphone, 12 ... Amplifier, 14 ... A / D converter, 16 ...
… Voice memory, 18 …… D / A converter, 20 …… Modulation circuit, 22
...... Magnetic floppy, 24 ...... Memory control circuit, 26 ...... Silence detection circuit

Claims (1)

(57) [Claims] 1. A circuit for compressing a time axis of an input signal using a random access memory, wherein the first signal is input to the circuit.
Of the signals already written to the memory according to a second clock obtained by dividing the first clock after a predetermined time has elapsed, and then writing a part of the signal already written to the memory according to the second clock. A time axis compression circuit comprising: a memory control unit that controls to rewrite by an input signal and controls to read a signal written in the memory in an order corresponding to the writing of the input signal.