JPS63221715A - A/d converter - Google Patents

Abstract

PURPOSE:To decrease the cost and the A/D conversion time by using an inexpensive and low resolution A/D converter so as to realize the A/D conversion with high resolution with respect to the vicinity of a required voltage. CONSTITUTION:The titled converter consists of an A/D converter 1, a 1st amplifier circuit section 2, a 2nd amplifier circuit section 3, a selection circuit section 4 and a discrimination circuit section 5. Through the constitution above, the circuit section 2 amplifies an analog input signal up to an input level of the converter 1 as it is, while the circuit section 3 amplifies a differential voltage of an analog input signal up to an input level of the converter 1. The circuit section 4 has a switch 9 including two switch terminals S, T, and any of the 1st and 2nd amplifier circuits 2, 3 is connected to the converter 1 by the switching operation. The circuit section 5 obtains a converting value D2 from a digital output D1 of the converter 1 and amplification factors K1, K2, compares the value with a voltage range stored in advance to judge the level of the analog signal input. Then the section 5 gives a switching command to the circuit 4 to change over the switch 9 based on the result of judgement.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a low-resolution analog-to-digital converter (
high-resolution A/D converter)
The present invention relates to an A/D conversion device for realizing A/D conversion.

<Prior art> In the field of various control technologies, high-resolution A/D conversion is sometimes required for the entire voltage range of analog signal input, and high-resolution A/D conversion is sometimes required for only around a certain voltage value. /D conversion is often required. For example, when performing control to maintain the temperature at a set temperature, in this case, in response to changes in the analog signal input as shown in Figure 5, the magnitude of this analog signal is made to match the target set voltage sp. is equivalent to achieving the control objective.

In such cases, high-resolution A/D conversion is required only for a narrow voltage range of SP-Δ■ to SP+Δ■, and low-resolution A/D conversion is sufficient outside this voltage range. become.

FIG. 6 shows a general control circuit including an A/D converter, and shows an A/D converter 21 and an analog signal input.
Amplifier 2 for amplifying to the input level of D converter 21
2, and a CPU 23 that takes in the digital output of the A/D converter 21 and performs predetermined control.

<Problems to be Solved by the Invention> However, according to the device example shown in FIG. 6, even when high-resolution A/D conversion is required only for a certain voltage range, the A/D converter 210 It is necessary to increase the number of bits, which not only increases cost but also increases the time required for A/D conversion.

This invention was made with attention to the above-mentioned problem, and an object thereof is to provide a novel A/D conversion device that can realize high-resolution A/D conversion using a low-resolution A/D converter. shall be.

Means for Solving the Problems In order to achieve the above object, the A/D converter of the present invention includes a first amplifier circuit section for amplifying analog signal input to the input level of the A/D converter. , a second amplifier circuit section for amplifying the differential voltage of the analog signal input with respect to an arbitrary set voltage to the input level of the A/D converter, a determination circuit section for determining the magnitude of the analog signal input, and a determination circuit section for determining the magnitude of the analog signal input. The first step is based on the judgment result of the circuit section. A selection circuit section for selectively connecting one of the second amplifier circuit sections to the A/D converter is provided.

<Operation> The determination circuit determines the magnitude of the analog signal input, and the selection circuit operates based on the determination result. Any second amplifier circuit section is connected to the A/D converter.

In other words, the magnitude of the analog signal input is high resolution A/D.
If the voltage is near a voltage value that requires conversion, the second amplifier circuit section is connected to the A/D converter. As a result, the difference voltage between the analog signal input and the set voltage is amplified to the input level of the A/D converter in the second amplifier circuit section, and high-resolution A/D conversion is realized by this A/D converter. be done.

Furthermore, if the magnitude of the analog signal input is in a voltage range that does not require high-resolution A/D conversion, the first amplifier circuit section will be connected to the A/D converter, and this first amplifier circuit will be connected to the A/D converter. In the section, the analog signal is directly amplified to the input level of the A/D converter, and A/D conversion is performed with low resolution.

According to the present invention, even if a low-resolution A/D converter is used, high-resolution A/D conversion can be achieved around the set voltage.

<Embodiment> FIG. 1 shows the overall configuration of an A/D conversion device according to an embodiment of the present invention, in which an A/D conversion converter is centered, a first amplifier circuit section 2. Second amplifier circuit section 32 selection circuit section 4 and 2
It includes each circuit configuration of the determination circuit section 5. In the illustrated example, the voltage level of the analog signal input is -1-1 (V).

The input level of the A/D converter 1 is -10 to 10 (V), and the voltage range sp-Δv- is around the set voltage 5p (v).
sp+ΔV (V) (7) 7 It is configured to obtain high resolution for analog signal input.

The first amplifier circuit section 2 receives the analog signal input as it is.
It is for amplifying up to the input level of the D converter 1, and in this embodiment includes an amplifier 6 with an amplification factor of 1 to 10.

The second amplifier circuit section 3 is for amplifying the difference voltage between the analog signal input and the set voltage sp (V) to the input level of the A/D converter 1, and includes a subtracter 7 and an amplifier 8. . The subtracter 7 receives the analog signal input at its positive input and the set voltage SP (V) at its negative input, and calculates the difference between the two and outputs it to the amplifier 8. This amplifier 8 has an amplification factor of 2 = 10/Δ
The differential voltage is thereby amplified to the input level of the A/D converter 1.

The selection circuit section 4 includes a switch 9 having two switching terminals S and T, and its switching operation causes the first . Second
Any one of the amplifier circuit sections 2.3 is connected to the A/D converter 1.

The judgment circuit section 5 is composed of a CPU of a microcomputer, and determines whether the analog signal input is truly A/D based on the digital output D1 of the A/D converter 1 and the amplification factors + and Kz.
A D-converted value (hereinafter referred to as "converted value") Di is determined. The judgment circuit section 5 outputs this converted value D2 as necessary, and also stores this converted value D: in advance and compares it with the voltage range SP-Δv-sp+ΔV (V) to determine the analog signal input. Judge the size. Then, the judgment circuit section 5 gives a switching command to the selection circuit section 4 based on the judgment result to cause the switch 9 to perform a switching operation.

In this example, the magnitude of the analog signal input is SP-
When the voltage is within the voltage range of Δ■ to SP+Δ■, the switch 9 becomes the T side, and the subtractor 7 outputs -ΔV to ΔV (V)
The voltage in the range is amplified by (10/ΔV) times by the amplifier 8 to match the input level of the A/D converter 1. Therefore −Δ
A/D converter 1 in a narrow voltage range of V to ΔV (V)
This means that a resolution that is (1/ΔV) times that of the conventional device can be obtained. For example, if it is ΔV-0,1 (V), a resolution 10 times that of a conventional device can be obtained.

FIG. 5 shows the state of the switch 9 with respect to time changes in the analog signal input.

In the figure, when the time t is 0≦1<,1, the analog signal input is outside the range of SP-Δv-sp+ΔV, so the switch 9 remains in the initial state of the S side, and the A/D conversion is performed. The resolution is the same as before.

If the time t is t1≦1<1. When , the analog signal input is s
Since it is within the range of p-Δv-sp+Δ■, switch 9
is switched to the T side, and A/D conversion with higher resolution than before is realized.

Similarly, if the time t is t2≦1<1. and t4≦1<
1. When , the analog signal input is SP-ΔV to SP+Δ
When the time t is outside the range of (3) and the switch 9 is on the S side, and when the time t is t, ≦t4 and t≧t, the analog signal input is within the range of SP-ΔV to SP+ΔV and the switch 9 is on the S side. It is on the T side.

FIG. 2 shows another example of the configuration of the second amplifier circuit section 3. As shown in FIG. The one in the figure takes into consideration the problem that noise is also amplified by reducing the ΔV, and the amplifier 8 is divided into a main amplifier 11 and a preamplifier 10.
The preamplifier 10 is placed before the subtracter 7, and the main amplifier 11 is placed after it, so that the influence of noise does not become a problem.

FIG. 3 shows that the second amplifier circuit section 3 includes a plurality of amplifier circuit sections 3a,
3b, . . . , 3n is shown. Each amplifier circuit section 3a, 3b,..., 3n has a subtracter 7a, 7b,..., 7n and an amplifier 3a, 8b, respectively.
+...

8n, and each subtractor 78.7b, . . . , 7n has a different setting voltage sp, , srb, .
sp, is given.

FIG. 4 shows the control procedure of the judgment circuit section 5.

In step 1 in the figure (indicated by rsTIJ in the figure), the judgment circuit unit 5 first sends a command to the selection circuit unit 4 to set the initial state of the switch 9 to the S side, and at the same time, the state of the switch 9 is changed to the S side. Remember that it is the S side. When the switch 9 is set to the S side, the first amplifier circuit section 2 is connected to the A/D converter 1, and the analog signal input in the first amplifier circuit section 2 is directly connected to the A/D converter 1. The signal is amplified to the input level of , and A/D conversion is performed with low resolution.

In the next step 2, the judgment circuit unit 5 reads the digital output D1 of the A/D converter 1, and then in the next step 3, it confirms based on stored information whether the switch 9 is currently on the S side. In this case, the switch 9 is initially set to the S side, so the decision in step 3 is YES, and in the next step, step 7, the digital output is set to the amplification factor Kl (Kl = 10) of the amplifier 6. By dividing by , a value (converted value) D2 obtained by truly A/D converting the analog signal input is obtained.

In other words, the analog signal input is K at amplifier 6.

Since it has been amplified by a factor of (K, = 10), the A/D converted digital output is also amplified by a factor of (K, = 10).

=10), the true A/D conversion value (converted value Dt) of the analog signal input is obtained by performing the reverse operation in step 4. This converted value D2 is output from the determination circuit section 5 to the outside in step 5.

Next, in step 6, the determination circuit section 5 stores the converted value D2 in a voltage range SP-ΔV+δ~sp.
The magnitude of the analog signal input is determined by comparing with +Δ■-δ[■]. Note that this δ is S of the switch 9.
This is a voltage width for providing hysteresis in the switching operation from the side to the T side and from the T side to the S side, and this prevents chattering phenomenon from occurring during the switching operation of the switch 9. There is.

As a result of the data comparison, if the converted value D2 is outside the voltage range, the determination in step 6 becomes "NO" and the process returns to step 2. However, if the converted value D2 is within the voltage range,
If the determination in step 6 is "YES", in this case, in step 7, the determination circuit section 5 sends the selection circuit section 4 to the switch 9.
It sends out a command for switching the switch 9 from the S side to the T side, and also remembers that the current state of the switch 9 has become the T side. When the switch 9 is set to the T side, the second amplifier circuit section 3 is connected to the A/-D converter l, and in this first amplifier circuit section 3, the difference voltage of the analog signal input with respect to the set voltage SP becomes A/D. The signal is amplified up to the input level of the D converter 1, and the A/D converter 1 realizes high-resolution A/D conversion.

Next, the judgment circuit unit 5 returns to step 2 and reads the digital output D1 of the A/D converter 1, and then in the following step 3, it confirms based on the stored information whether the switch 9 is currently on the S side. In this case, since the switch 9 has been switched to the T side, the determination in step 3 is "NO", and then in step 8, the following calculation is performed to obtain the converted value D2.

D! =SP+D+ / (10/ΔV) In other words, the analog signal input is subtracted by the set voltage 5P (V) in the subtracter 7, and then doubled in the amplifier 8 (Kg = 10/Δ■)
Since the A/D converted digital output D+ has been amplified, the A/D converted digital output D+ is also subjected to the same operation, so by performing the reverse operation in step 8, the true A/D converted value of the analog signal input can be obtained. (converted value D2) is obtained. This converted value D2 is output from the determination circuit section 5 to the outside in step 9.

Next, in step 10, the determination circuit section 5 selects a voltage range sp-Δv-sp+ in which the converted value D2 is stored in advance.
The magnitude of the analog signal input is determined by comparing ΔV (V) with .

As a result, if the converted value Dt is within the voltage range, the determination in step 10 is "YES" and the process returns to step 2, but if the converted value Dt is outside the voltage range, the determination in step 10 is In this case, in step 11, the judgment circuit unit 5 sends a command to the selection circuit unit 4 to switch the switch 9 from the T side to the S side, and at the same time, the current state of the switch 9 is set to S. I remember being on your side.

Note that the analog signal input is SP-Δv-sp+ΔV (V
), the input of A/D converter 1 is -10 to 10.
(V) is outside the input level, and the A/D converter 1 overblows, making it impossible to obtain an appropriate value in step 8. To avoid this, switch 9
The voltage range for switching judgment from the T side to the S side is slightly narrowed to SP-8V+δ' to SP+ΔV-δ' [V] (δ'
δ), or the voltage range for switch switching judgment remains at SP-Δv-sp+ΔV (V), and the amplification factor of amplifier 8 is made smaller than 10/ΔV to change the voltage range on the input side of A/D converter 10. It is a good idea to take measures such as allowing some leeway.

<Effects of the Invention> As described above, the present invention uses an inexpensive, low-resolution A/D converter to perform high-resolution A/D converter only for the vicinity of the required voltage.
Since it is configured to perform D conversion, it reduces costs and A/D conversion time compared to the conventional method of increasing the number of bits of the A/D converter to achieve high resolution. A remarkable effect has been achieved in achieving the purpose of the invention.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an A/D converter according to an embodiment of the present invention, FIG. 2 is an electric circuit diagram showing another example of the configuration of the second amplifier circuit section, and FIG. 3 is a block diagram of an A/D converter according to an embodiment of the present invention. A block diagram of the A/D conversion device according to the embodiment, FIG. 4 is a flowchart showing the control procedure of the judgment circuit section, FIG. 5 is an explanatory diagram showing changes in analog signal input over time, and FIG.
FIG. 2 is a block diagram of a /D conversion device. 1... A/D converter 2... First amplifier circuit section 3... Second amplifier circuit section 4... Selection circuit section 5... Judgment circuit section

Claims (5)

[Claims] (1) An A/D converter equipped with an A/D converter for converting an analog signal into a digital signal, the first amplification device for amplifying the analog signal input to the input level of the A/D converter. The difference voltage between the circuit section and the analog signal input for any set voltage is A.
a second amplification circuit section for amplifying up to the input level of the /D converter; a judgment circuit section for judging the magnitude of the analog signal input; and a selection circuit section for selectively connecting an amplifier circuit section to an A/D converter. (2) The A/D conversion device according to claim 1, wherein one second amplifier circuit section is provided. (3) The A/D conversion device according to claim 1, wherein a plurality of second amplifier circuit units are provided depending on the type of set voltage. (4) The judgment circuit section is a C
The A/D conversion device according to claim 1, which is a PU. (5) The A/D conversion device according to claim 1, wherein the selection circuit section is constituted by a changeover switch.