JPS63217416A - Data array transform device - Google Patents

Abstract

PURPOSE:To improve the program maintenance properties and to reduce a program size by obtaining the conversion data by transforming the data array order into such a form that can be processed by a central processing unit CPU based on the array information supplied from a map register reading part and sending said conversion data to the CPU. CONSTITUTION:Data 5C-0-5C-3 are read out with output of the address information 102. The higher 2 bits of the information 102 are supplied to a map register reading part 2. The part 2 selects an area 1C of a map register 1 based on said higher 2 bits of the information 102 and reads out the contents '1' of the area 1C to deliver it to a data array transform part 3. The part 3 supplies the data 5C-0-5C-3 read out of a memory 5 and inverts the array order into 5C-3-5C-0 owing to a fact that the information received from the part 2 is set at '1' to deliver it to a CPU4. Thus it is possible to improve the program maintenance properties and also to prevent deterioration of the system processing performance.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data array conversion device used to convert the array state of data into an order that can be processed by a central processing unit when processing data in a computer system. .

[Conventional technology]

Traditionally, in computer systems, the central processing unit (
JIII-ordered array (Is there data with low values starting from the lowest address in memory, which the CPU) can directly process?
Or, conversely, if there is data with a high value (also called data arrangement) and data with an arrangement in the opposite order, the program side will need to access the data every time it accesses the data. identifies whether it is an array in an order that the CPU can directly process (forward array) or an array in the opposite order (reverse array), and if it is a reverse array, the program converts the data to a forward array. There is.

For example, when a file created on system A is referenced on system B, if the sequential array for system A and the sequential array for system B are opposite arrays, and the pointer in the file is set to the sequential array for system A. , the file access program on system B side must invert the data array every time it accesses that pointer, and this inversion operation is necessary when accessing normal memory in system B. must be avoided.

[Problem that the invention seeks to solve]

As mentioned above, in conventional computer systems, the program side must recognize the data arrangement order and perform operations to reverse that order, resulting in low maintainability, increased program size, and The disadvantage is that the processing performance of the computer system decreases.

An object of the present invention is to eliminate the drawbacks of the conventional computer system as described above, and to improve program maintainability.
Another object of the present invention is to provide a data array conversion device that is small in size and can prevent a decrease in system processing performance.

[Means for solving problems]

The data array conversion device of the present invention focuses on the fact that the data array is biased depending on the area in the memory, and in order to enable the data array order to be specified for each area from the program that handles the data, A value indicating whether or not the data in the area is an ordered array that can be directly processed by the CPU is stored in the map register in association with each area, and when the program accesses the memory, the value in the map register is stored. When the CPU accesses the memory, the CPU outputs address information to automatically adjust the data arrangement order according to the map register. The reading unit reads the data, and the data array conversion unit determines whether or not to invert the arrangement order of the data based on the value output from the map register reading unit, and passes the data in the arrangement order according to the determination. ing.

That is, the data array conversion device of the present invention has a storage area corresponding to each area of a memory divided into a plurality of areas, and stores array information indicating the arrangement order of data stored in each of the areas. a map register; a map register reading section that inputs a part of the address information sent from the central processing unit to the memory and reads out the corresponding array information of the map register; reads the data stored in the map register reading section, inputs the array information from the map register reading section, converts the array order of the data into an array order that can be processed by the central processing unit according to the array information, and converts the converted data into an array order that can be processed by the central processing unit. and a data array conversion unit that sends data to the data array.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

In FIG. 1, reference numeral 1 indicates a map register, and reference numeral 2 indicates address information output when the central processing unit f (CPU) 4 accesses the memory 5, and corresponds to the address information. A map register reading device that reads the contents of map register 1 and outputs it to data array converter 3; 3 is CPU 4;
This is a data array conversion section that inverts the arrangement order of data written into the memory 5 or data successively read out from the memory 5 in accordance with the output value from the map register reading section 2.

FIG. 2 is an explanatory diagram showing the relationship between the map register 1 of FIG. 1 and the areas of the memory 5.

In this embodiment, as shown in FIG. 2, the memory 5 is divided into four areas 5A, 5B, 5c and 5D, and each of these areas and areas IA, IB, 1c and ID in the map register are divided into four areas 5A, 5B, 5c and 5D. Each corresponds to the other. One area of the map register consists of one bit, and when the value is "0'", it indicates that the data array stored in the corresponding area of memory 5 is a sequential array. A value of "1" indicates an inverted array.

In the embodiment shown in FIG. 1, areas 5A and 5D of memory 5 are arranged in order, and areas 5B and 5C are arranged in reverse.

FIG. 3 is a block diagram showing a state when data in a sequential data arrangement is read from the memory 5 in the embodiment of FIG. 1.

In FIG. 3, the data in area 5D of memory 5 is 4 bytes of data, which are divided into data 5D-0 and 5D.
D-1, 5D-2, and 5D-3, when the CPU 4 reads them, first the data 5D-0 to 5
Address information 101 is output to read D-3.

At this time, the upper two bits of the address information 101 are input to the map register reading section 2. The map register reading section 2 selects the area ID of the map register 1 based on the upper two bits of the input address information 101, reads out its content "0", and outputs it to the data array converting section 3.

The data array converter 3 inputs the data 5D-0 to 5D-3 output from the memory 5, and inputs the data 5D-0 to 5D-3 output from the memory 5, and
Since the information from is "0", the arrangement order is not converted and is output to the CPU 4 in that order.

FIG. 4 is a block diagram showing the state when reversely arranged data is read from the memory 5 in the embodiment of FIG. 1.

In FIG. 4, data in area 5C is 4-byte data, and when these are data 5C-0, 5C-1, 5C-2, and 5C-3, these are
When reading data 5C-0 to 5C-3, address information 102 is first output. At this time,
The upper two bits of the address information 102 are input to the map register reading section 2. The map register reading unit 2 selects the area IC of the map register 1 based on the upper two bits of the input address information 102, and selects the area IC of the map register 1, whose content is "1".
is read out and output to the data array conversion section 3. The data array converter 3 converts data 5C-0 to 5C-0 output from the memory 5.
5C-3 is input, and the information from the map register reading section 2 is "1", so the arrangement order is changed to 50-3 to 5C-.
The data is inverted in the order of 0 and output to the CPU 4.

〔Effect of the invention〕

As explained above, the present invention allows the program to simply set information regarding the arrangement order of data in each area of memory in the corresponding map register in advance, and after that, the arrangement order of data is recognized every time the memory is accessed. Since there is no need to perform an operation to reverse the order, maintainability is improved and the program size is reduced. Furthermore, there is also the effect that deterioration in the processing performance of the computer system can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is an explanatory diagram showing the relationship between the map registers in FIG. 1 and memory areas, and FIG. 3 is a sequential arrangement in the embodiment of FIG. FIG. 4 is a block diagram showing a state when data having an inverted arrangement is read from the memory in the embodiment of FIG. 1. DESCRIPTION OF SYMBOLS 1... Map register, 2... Map register reading section, 3... Data array conversion section, 4... Central processing unit (CPU), 5... Memory. Kaya 1 Garden Kaya 2 Tsukisei 4 Drunkenness

Claims (1)

[Claims] a map register having a storage area corresponding to each area of a memory divided into a plurality of areas, and storing array information indicating an array order of data stored in each of the areas;
a map register reading section that inputs a part of the address information sent to the memory from the central processing unit and reads out the corresponding array information of the map register; data that is read out, inputs the array information from the map register reading section, converts the array order of the data into an array order that can be processed by the central processing unit according to the array information, and sends converted data to the central processing unit. A data array conversion device comprising: an array conversion section.