JPS63215079A - Eprom semiconductor device and manufacture thereof - Google Patents

Eprom semiconductor device and manufacture thereof

Info

Publication number
JPS63215079A
JPS63215079A JP4768087A JP4768087A JPS63215079A JP S63215079 A JPS63215079 A JP S63215079A JP 4768087 A JP4768087 A JP 4768087A JP 4768087 A JP4768087 A JP 4768087A JP S63215079 A JPS63215079 A JP S63215079A
Authority
JP
Japan
Prior art keywords
control gate
oxide film
regions
sidewall parts
formed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4768087A
Inventor
Kenji Nittami
Original Assignee
Oki Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Ind Co Ltd filed Critical Oki Electric Ind Co Ltd
Priority to JP4768087A priority Critical patent/JPS63215079A/en
Publication of JPS63215079A publication Critical patent/JPS63215079A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To extend the freedom in circuit design of EPROM device by means of providing floating gates at both sidewall parts opposing to a control gate.
CONSTITUTION: A control gate 5 is formed on a substrate 1 in an element region encircled by a field oxide film 2 through the intermediary of a gate insulating film comprising a double layer structure of an oxide film 3 and a nitride film 4 while the sidewall parts and upper surface of this control gate 5 are covered with another oxide film 6 and another nitride film 7. Furthermore, floating gates 8' comprising polycrystalline silicon are formed on the sidewall parts of control gate 5. Besides, source drain regions in LDD structure comprising shallow N-regions 9 as well as deep n+regions 10 are formed outside the floating gate 8' in the substrate. Through these procedures, the source and drain regions are not decided in principle but to be selected freely subject to the design requirements.
COPYRIGHT: (C)1988,JPO&Japio
JP4768087A 1987-03-04 1987-03-04 Eprom semiconductor device and manufacture thereof Pending JPS63215079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4768087A JPS63215079A (en) 1987-03-04 1987-03-04 Eprom semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4768087A JPS63215079A (en) 1987-03-04 1987-03-04 Eprom semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS63215079A true JPS63215079A (en) 1988-09-07

Family

ID=12781995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4768087A Pending JPS63215079A (en) 1987-03-04 1987-03-04 Eprom semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS63215079A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051793A (en) * 1989-03-27 1991-09-24 Ict International Cmos Technology, Inc. Coplanar flash EPROM cell and method of making same
EP0517353A2 (en) * 1991-06-07 1992-12-09 Sharp Kabushiki Kaisha Non-volatile memory
EP0531526A1 (en) * 1991-03-06 1993-03-17 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory cell having gate electrode on sidewall of gate electrode part
EP0675547A1 (en) * 1994-03-30 1995-10-04 Sgs-Thomson Microelectronics S.A. Electrically programmable memory cell
US5568418A (en) * 1992-09-30 1996-10-22 Sgs-Thomson Microelectronics S.R.L. Non-volatile memory in an integrated circuit
US5903494A (en) * 1994-03-30 1999-05-11 Sgs-Thomson Microelectronics S.A. Electrically programmable memory cell

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051793A (en) * 1989-03-27 1991-09-24 Ict International Cmos Technology, Inc. Coplanar flash EPROM cell and method of making same
EP0531526A1 (en) * 1991-03-06 1993-03-17 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory cell having gate electrode on sidewall of gate electrode part
EP0531526A4 (en) * 1991-03-06 1993-08-18 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory cell having gate electrode on sidewall of gate electrode part
EP0517353A2 (en) * 1991-06-07 1992-12-09 Sharp Kabushiki Kaisha Non-volatile memory
US5568418A (en) * 1992-09-30 1996-10-22 Sgs-Thomson Microelectronics S.R.L. Non-volatile memory in an integrated circuit
EP0675547A1 (en) * 1994-03-30 1995-10-04 Sgs-Thomson Microelectronics S.A. Electrically programmable memory cell
FR2718289A1 (en) * 1994-03-30 1995-10-06 Sgs Thomson Microelectronics Electrically programmable memory cell.
US5687113A (en) * 1994-03-30 1997-11-11 Sgs-Thomson Microelectronics S.A. Electrically programmable memory cell
US5740103A (en) * 1994-03-30 1998-04-14 Sgs-Thomson Microelectronics S.A. Electrically programmable memory cell
US5903494A (en) * 1994-03-30 1999-05-11 Sgs-Thomson Microelectronics S.A. Electrically programmable memory cell

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