JPS63211694A - Manufacture of multilayer flexible printed circuit - Google Patents
Manufacture of multilayer flexible printed circuitInfo
- Publication number
- JPS63211694A JPS63211694A JP4614887A JP4614887A JPS63211694A JP S63211694 A JPS63211694 A JP S63211694A JP 4614887 A JP4614887 A JP 4614887A JP 4614887 A JP4614887 A JP 4614887A JP S63211694 A JPS63211694 A JP S63211694A
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- flexible printed
- jumper
- fpc
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 238000000034 method Methods 0.000 claims description 16
- 239000004020 conductor Substances 0.000 claims description 10
- 239000000853 adhesive Substances 0.000 claims description 9
- 230000001070 adhesive effect Effects 0.000 claims description 9
- 229920001187 thermosetting polymer Polymers 0.000 claims description 6
- 238000010030 laminating Methods 0.000 claims 1
- 238000005476 soldering Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 description 8
- 238000010586 diagram Methods 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 101100119847 Phaeodactylum tricornutum FCPE gene Proteins 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明はフレキシブルプリント基板（以下、ＦＰＣと称
す）、特にベース側ＦＰＣにジャンパー（ＩＩＩＩＦＰ
Ｃを積層した多層ＦＰＣの製造方法に関する。Detailed Description of the Invention <Industrial Application Field> The present invention provides a flexible printed circuit board (hereinafter referred to as FPC), particularly a jumper (IIIFP) on the base side FPC.
The present invention relates to a method of manufacturing a multilayer FPC in which C is laminated.
〈発明の概要〉
本発明は、上面に導体パターンを形成したベース側フレ
キシブルプリント基板と、上面に導体パターンを形成し
たベース側フレキシブルプリント基板と接続するための
開口部を設けたジャンパー側フレキシブルプリント基板
とフィルムカバーレイとを有したジャンパー側フレキシ
ブルプリント基板の下面に熱硬化性接着材をラミネート
して、前記フィルムカバーレイ、前記ジャンパー側フレ
キシブルプリント基板、前記ベース側フレキシブルプリ
ント基板を順次積層し、全体を熱圧Ｈした後、前記ベー
ス側フレキシブルプリント基板の導体パターンと前記ジ
ャンパー側フレキシブルプリント基板の導体パターンと
を前記開口部を通して半田接続したことによシ、両面Ｆ
ＰＣに比べて安価な高密度の多層ＦＰＣを得るものであ
る。<Summary of the Invention> The present invention provides a base-side flexible printed circuit board with a conductive pattern formed on its top surface, and a jumper-side flexible printed circuit board provided with an opening for connection to the base-side flexible printed circuit board with a conductive pattern formed on its top surface. A thermosetting adhesive is laminated on the lower surface of a jumper-side flexible printed circuit board having a film coverlay, and the film coverlay, jumper-side flexible printed circuit board, and base-side flexible printed circuit board are sequentially laminated, and the entire After heat-pressing H, the conductor pattern of the base-side flexible printed circuit board and the conductor pattern of the jumper-side flexible printed circuit board were soldered and connected through the opening.
The purpose is to obtain a high-density multilayer FPC that is cheaper than a PC.
る。Ru.
〈従来の技術〉
従来より、基板の限られたスペースの中に高密度に導体
パターンをひく場合、導体パターン幅及びパターン間の
幅を小さくしパターンを平面内に密集させる方法と基板
の両面にパターンを施し、スルホールにて電気的導通を
取る方法があった。<Conventional technology> Conventionally, when drawing conductor patterns at high density in a limited space on a board, there has been a method of reducing the width of the conductor patterns and the width between the patterns to make the patterns densely arranged in a plane, and a method of drawing the patterns on both sides of the board. There was a method of applying a pattern and establishing electrical continuity using through holes.
前者の場合、パターン幅の縮小化には限界かあり、又歩
留りを考慮すると、どうしても高価なものになった。ま
た、・後者の場合も材料費、加工工程数の関係で片面Ｆ
ＰＣに比べ非常に高価なものになっていた。In the former case, there is a limit to the reduction in pattern width, and when yield is taken into consideration, the product becomes expensive. Also, in the latter case, due to material cost and number of processing steps, one side F
They were much more expensive than PCs.
これらを補う方法としてジャンパーＦＰＣを用いる方法
が提案されていた。ｗｃ２図に従来のジャンパーＦＰＣ
を用いた方法を示す。石２図（ａ）はベ−ス（ＩＩ Ｆ
Ｐ Ｃ３でアフ、導体パターン２はベースフィルムｌ
とからなる。前記ペース側ＦＰＣＩにフィルムカバーレ
イ４を岐覆しく何１図（ｂ））、次に、第１図（Ｃ）の
ように導通を取る開口ランド部分に半田ペースト５ｆ：
印刷した後、ジャンパーＦＰＣＧをベース側ＦＰＣ３に
位置合わせした半田ペースト５を溶融して電気的導通を
得ると同時にジャンパーＦＰＣ６ｔ”固定する。A method using a jumper FPC has been proposed as a method to compensate for these problems. Conventional jumper FPC on wc2 diagram
We show a method using Stone 2 (a) is the base (II F
PC3, conductor pattern 2 is base film l
It consists of A film cover lay 4 is installed on the pace side FPCI (Fig. 1(b)), and then a solder paste 5f is applied to the open land portion for establishing conduction as shown in Fig. 1(C):
After printing, the solder paste 5 that aligned the jumper FPCG with the base side FPC 3 is melted to obtain electrical continuity, and at the same time, the jumper FPC 6t'' is fixed.
〈発明が解決しようとする問題点〉
しかしながら、上記゛ジャンパーＦＰＣ６を用いた従来
の方法では以下に示す問題点があった。<Problems to be Solved by the Invention> However, the conventional method using the jumper FPC 6 has the following problems.
・ 接着部分が半田付は部のみであるためジャンパーＦ
ＰＣ６の接着強度に命題がある。・Since only the adhesive part is soldered, jumper F
There is a problem with the adhesive strength of PC6.
・ 半田ペースト５印刷後のジャンパーＦＰＣ６の位置
合わせが困短である。- It is difficult to align the jumper FPC 6 after printing the solder paste 5.
・ 部品マウント時にジャンパーＦＰＣ６を取り付ける
場合、自動機にてジャンパーＦＰＣ６をつかみ出し取り
付ける際に、ジャンパーＦＰＣ６自体にソリがあるとマ
ウント装置が誤動作をしたシ位置合わせ後にズレを発生
したりする。- When installing the jumper FPC6 when mounting parts, if the jumper FPC6 itself is warped when the jumper FPC6 is picked up and installed using an automatic machine, the mounting device may malfunction and misalignment may occur after alignment.
本発明は上記問題点を解消した多層ＦＰＣの製造方法を
提供することを目的とする。An object of the present invention is to provide a method for manufacturing a multilayer FPC that solves the above problems.
く問題を解決するための手段〉
ベース側のＦＰＣのカバーレイを被覆していない面と裏
面に熱硬化性接着剤をラミネートしたジャンパーＦＰＣ
を導体パターン面どうしが向きあわない様に重ね合わせ
る。しかる後、全体にフィルムカバーレイを重ね合わせ
、１回の熱圧着にてペースＦＰＤ、ジャンパーＦＰＣ，
フィルムカバーレイを同時に熱圧着する。ジャンパーＦ
ＰＣの電気的導通を得るためのランド部分にはランド経
よりも適当に小さい穴があけられており、ランド全体に
半田ペーストを印刷、溶融する事により、半田がジャン
パーＦＰＣのランドにあけられた穴を通りペースＦＰＣ
とブリッジして導通を得る。Measures to solve the problem〉 Jumper FPC with thermosetting adhesive laminated on the side and back side that are not coated with the coverlay of the FPC on the base side
Lay them together so that the conductor pattern surfaces do not face each other. After that, a film coverlay is overlaid on the whole, and the pace FPD, jumper FPC,
Heat and press the film coverlay at the same time. Jumper F
A hole suitably smaller than the land diameter was made in the land part to obtain electrical continuity of the PC, and by printing and melting solder paste on the entire land, solder was made in the land of the jumper FPC. Pace FPC through hole
and bridge to obtain continuity.
〈作 用〉
上記により、比較的安価に高密度のＦＰＣを得る事がで
き、従来のジャンパーＦＰＣを用いた方法に比べ、加工
工程が簡易で、かつ物理的、電気的に高信頼性のあるＦ
ＰＣを作成する事ができる。<Function> As a result of the above, it is possible to obtain a high-density FPC at a relatively low cost, and compared to the conventional method using jumper FPCs, the processing process is simpler and the process is physically and electrically more reliable. F
You can create a PC.
〈実施例〉 以下、第１図を用いて本発明の一実施例を詳細す。<Example> Hereinafter, one embodiment of the present invention will be explained in detail using FIG.
の説明する。Explain.
第１１（ａ）はベースＦＰＣ３であり、ベースフィルム
１、導体パターン２とからなり、このペースＦＰＣ３の
上に、第１図（ｂ）の如く熱硬化性接着剤７を
裏面にラミネートしたもう一方の片面ＦＰＣ
（ジャンパーＦＰＣ）６を重ねて、位置合わせし、ｇ１
図（Ｃ）のように前記ジャンパーＦＰＣ６の上にフィル
ムカバーレイ８を重ねて位置合わせし、１回の工程にて
ベースＦＰＣ３、ジャンパーＦＰＣ６、フィルムカバー
レイ８を同時に熱圧着する。その最後に第１図（ｄ）に
示すように半田ペースト５を導通を得たいランドに印刷
、溶融する。半田はあらかじめあけられたジャンパーＦ
ＰＣ６の大を通ってペースＦＰＣ３のランド部分とブリ
ッジし、電気的導通を得る。ベースＦＰＣ３と、ジャン
パーＦＰＣ６の電気的な絶縁は熱硬化性接着剤７及びジ
ャンパーＦＰＣ６のベースフィルムｌにより保証される
。11(a) is a base FPC 3, which consists of a base film 1 and a conductor pattern 2, and a thermosetting adhesive 7 is applied on top of this paste FPC 3 as shown in FIG. 1(b).
Another single-sided FPC laminated on the back side
(Jumper FPC) 6 and align, g1
As shown in Figure (C), the film coverlay 8 is overlaid and aligned on the jumper FPC 6, and the base FPC 3, jumper FPC 6, and film coverlay 8 are simultaneously bonded by thermocompression in one process. Finally, as shown in FIG. 1(d), solder paste 5 is printed and melted on the land where electrical conductivity is desired. Solder the pre-drilled jumper F
It passes through the large part of PC6 and bridges with the land portion of pace FPC3 to obtain electrical continuity. Electrical insulation between the base FPC 3 and the jumper FPC 6 is ensured by the thermosetting adhesive 7 and the base film 1 of the jumper FPC 6.
れば４層の多層ＦＰＣを得ることも可能である。If so, it is also possible to obtain a four-layer multilayer FPC.
〈発明の効果〉
以上のように本発明によれば、ファインパターン化によ
る方法や両面ＢｔＰＣの作成等に比べ非常に安価に高密
度回路集積の多層ＦＰＣを得る事が出来る。又、従来の
ジャンパーＦＰＣｖｉ−用いた場合にあったジャンパー
ＦＰＣの物理的接着強度及び゛ｍ気的導通侶頓注が上下
のＦＰＣが接着固定されているので飛躍的に向上すると
ともに、従来ジャン／（−ＦＰＣを用いた場合にあった
ジャンパーＦＰＣマウント時のＦＰＣソリに伴なう位置
合わせ粘度の困難さや位置ズレの問題が皆無になる。<Effects of the Invention> As described above, according to the present invention, a multilayer FPC with high-density circuit integration can be obtained at a much lower cost than a method using fine patterning or the creation of a double-sided BtPC. In addition, since the upper and lower FPCs are fixed with adhesive, the physical adhesion strength and air continuity of the jumper FPC, which were required when using the conventional jumper FPCvi-, are dramatically improved. (-There are no problems with alignment viscosity or positional deviation caused by FPC warping when mounting a jumper FPC, which occurs when FPC is used.
有用な多層フレキシブルプリント基板のｆＭ造方法を提
供できる。A useful fM manufacturing method for multilayer flexible printed circuit boards can be provided.
何１図（ａ）乃至（ｄ）は本発明の一実施例を示す工程
図、第２図（ａ）乃至（ｄ）は従来例を示す工程図であ
る。
１・・・ベースフィルム、 ２・・・導体パターン、３
・・・ベース側フレキシブルプリント基板、４．８・・
・フィルムカバーレイ、 ５・・・半田ペースト、 ６
・・・ジャンパー側フレキシブルプリント基板、 ７・
・・熱硬化性接着材。
代理人 弁理士 杉 山 毅 至（他１名）ｔσノ
（ｂ）
（ｄ）
４ζ ｌ 図
（ｄ）
第 ２図
手続補正書（方式）
１．事件の表示
特願昭６２−４６１４８
２、発明の名称
多層フレキシブルプリント基板の製造方法３、補正をす
る者
事件との関係 特許出願人
住 所 ８５４５大阪市阿倍野区長池町２２番２２号名
称 （５０４）シャープ株式会社
代表者 辻 晴 雄
４、代理人
住 所 暴５４５大阪市阿倍野区長池町２２番２２号（
Ｑ）
（ｂ＋
（Ｃ） Ｊ
（ｄ）
１１．２のFigures 1 (a) to (d) are process diagrams showing one embodiment of the present invention, and Figures 2 (a) to (d) are process diagrams showing a conventional example. 1... Base film, 2... Conductor pattern, 3
...Base side flexible printed circuit board, 4.8...
・Film coverlay, 5...Solder paste, 6
...Jumper side flexible printed circuit board, 7.
・Thermosetting adhesive. Agent Patent attorney Takeshi Sugiyama (and 1 other person) tσノ(b) (d) 4ζ l Figure (d) Figure 2 Procedural amendment (method) 1. Indication of the case Patent application No. 62-46148 2. Name of the invention Method for manufacturing multilayer flexible printed circuit boards 3. Person making the amendment Relationship to the case Patent applicant address 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka 8545 Name (504) ) Sharp Corporation Representative Haruo Tsuji 4, Agent address 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka 545 (
Q) (b+ (C) J (d) 11.2
Claims (1)
ルプリント基板と、上面に導体パターンを形成し、前記
ベース側フレキシブルプリント基板と接続するための開
口部を設けたジャンパー側フレキシブルプリント基板と
、フィルムカバーレイとを有し、 前記ジャンパー側フレキシブルプリント基板の下面に熱
硬化性接着材をラミネートして、前記フィルムカバーレ
イ、前記ジャンパー側フレキシブルプリント基板、前記
ベース側フレキシブルプリント基板を順次積層し、全体
を熱圧着した後、前記ベース側フレキシブルプリント基
板の導体パターンと前記ジャンパー側フレキシブルプリ
ント基板の導体パターンとを前記開口部を通して半田接
続したことを特徴とする多層フレキシブルプリント基板
の製造方法。[Claims] 1. A base-side flexible printed circuit board with a conductive pattern formed on its upper surface, and a jumper-side flexible printed circuit with a conductive pattern formed on its upper surface and an opening for connection to the base-side flexible printed circuit board. a substrate, and a film coverlay, and a thermosetting adhesive is laminated on the lower surface of the jumper side flexible printed circuit board, and the film coverlay, the jumper side flexible printed circuit board, and the base side flexible printed circuit board are sequentially attached. A method for manufacturing a multilayer flexible printed circuit board, characterized in that, after laminating and thermocompression-bonding the whole, the conductor pattern of the base-side flexible printed circuit board and the conductor pattern of the jumper-side flexible printed circuit board are connected by soldering through the opening. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4614887A JPS63211694A (en) | 1987-02-26 | 1987-02-26 | Manufacture of multilayer flexible printed circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4614887A JPS63211694A (en) | 1987-02-26 | 1987-02-26 | Manufacture of multilayer flexible printed circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63211694A true JPS63211694A (en) | 1988-09-02 |
Family
ID=12738887
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4614887A Pending JPS63211694A (en) | 1987-02-26 | 1987-02-26 | Manufacture of multilayer flexible printed circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63211694A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS618987A (en) * | 1984-06-22 | 1986-01-16 | シャープ株式会社 | Composite printed circuit board |
-
1987
- 1987-02-26 JP JP4614887A patent/JPS63211694A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS618987A (en) * | 1984-06-22 | 1986-01-16 | シャープ株式会社 | Composite printed circuit board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7286370B2 (en) | Wired circuit board and connection structure of wired circuit board | |
| JP3227681B2 (en) | Composite flexible printed circuit board | |
| JP3155565B2 (en) | Manufacturing method of printed wiring board | |
| JPS63211694A (en) | Manufacture of multilayer flexible printed circuit | |
| JPH07111371A (en) | Flexible printed board | |
| JP2821070B2 (en) | Composite printed circuit board joining method | |
| JPS63137498A (en) | Manufacture of through-hole printed board | |
| JP5293672B2 (en) | Rigid-flexible substrate and manufacturing method thereof | |
| JPS6352795B2 (en) | ||
| JPS6049698A (en) | Connecting structure of printed board | |
| JPS58141594A (en) | Method of connecting both sides of printed circuit board | |
| JPH02297995A (en) | Manufacture of printed circuit board with metal plate | |
| JPS61294889A (en) | Connection structure of flexible printed circuit board | |
| JPH06132666A (en) | Multilayer flexible printed board and production thereof | |
| JPS62142397A (en) | Printed wiring board | |
| CN116528470A (en) | Circuit board with Hot-Bar design and manufacturing method thereof | |
| JPS6317589A (en) | Double-layer printed circuit board | |
| JPS59211295A (en) | Solderless connection printed circuit board | |
| JPH02271653A (en) | Manufacture of substrate for mounting semiconductor | |
| JPS60160195A (en) | Circuit board | |
| JPS59181596A (en) | Method of producing flexible multilayer printed circuit board | |
| JPS59198791A (en) | Circuit board | |
| JPS62160793A (en) | Multilayer printed wiring board | |
| JP2000243791A (en) | Two-metal tab and double-sided csp, bga tape, and manufacture of them | |
| JPS62102589A (en) | Manufacture of double-sided connection type flexible printedcircuit substrate |