JPS63208298A - Multilayer printed interconnection board - Google Patents
Multilayer printed interconnection boardInfo
- Publication number
- JPS63208298A JPS63208298A JP4206087A JP4206087A JPS63208298A JP S63208298 A JPS63208298 A JP S63208298A JP 4206087 A JP4206087 A JP 4206087A JP 4206087 A JP4206087 A JP 4206087A JP S63208298 A JPS63208298 A JP S63208298A
- Authority
- JP
- Japan
- Prior art keywords
- multilayer printed
- printed wiring
- hole
- blind
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims description 14
- 238000005553 drilling Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 239000012267 brine Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- HPALAKNZSZLMCH-UHFFFAOYSA-M sodium;chloride;hydrate Chemical compound O.[Na+].[Cl-] HPALAKNZSZLMCH-UHFFFAOYSA-M 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、各種電子機器の電子部品を実装するために使
用される多層プリント配線板に関し、特にブラインドス
ルーホール（非貫通孔）を有する多層プリント配線板に
関するものである。Detailed Description of the Invention (Industrial Application Field) The present invention relates to a multilayer printed wiring board used for mounting electronic components of various electronic devices, and particularly to a multilayer printed wiring board having blind through holes. It relates to printed wiring boards.
（従来の技術）
従来の多層プリント配線板にあっては、部品挿入用の孔
は勿論、経由孔（バイア・ホール）にあっても貫通孔の
形で設けられており、めっき等によりこれら孔内壁に導
体層を形成するのが一般的である。(Prior art) In conventional multilayer printed wiring boards, not only holes for inserting components but also via holes are provided in the form of through holes, and these holes are formed by plating etc. It is common to form a conductive layer on the inner wall.
一方、近年の電子機器の高度化に伴い、多層プリント配
線板においても、よりいっそうの高多層高密度化への要
求が高まってきている。On the other hand, as electronic devices have become more sophisticated in recent years, there has been an increasing demand for even higher multilayer density in multilayer printed wiring boards.
バイア・ホールを貫通孔の形で設ける、従来の多層プリ
ント配線板にあっては、このバイア・ホールによって、
高密度化のための配線密度が著しく阻害されるという問
題が生じている。そのため、バイア・ホールを小径化す
ることによって、配＆１密度を確保し対応しているが、
高多層化に伴って板厚も増加しており、これにより板厚
／孔径の比（アスペクト比）が増加してしまい、多層プ
リント配線板の製造性が著しく阻害されている。In conventional multilayer printed wiring boards in which via holes are provided in the form of through holes, the via holes can
A problem has arisen in that the wiring density for increasing the density is significantly hindered. Therefore, by reducing the diameter of the via hole, we are able to secure the distribution &1 density.
As the number of layers becomes higher, the board thickness also increases, and as a result, the ratio of board thickness/hole diameter (aspect ratio) increases, which significantly impedes the productivity of multilayer printed wiring boards.
そこで、従来、一つの試みとしてブラインドスルーホー
ルによって、配線の密度を向上させた多層プリント配線
板が知られている。この製造方法の一つとして、トリル
によって多層板に非貫通孔を片面ずつ形成し、めっき等
により孔内壁に導体層を形成する方法かある。Therefore, as an attempt, a multilayer printed wiring board has been known in which the wiring density is improved by using blind through holes. One of the manufacturing methods is to form non-through holes on each side of the multilayer board using trilling, and to form a conductive layer on the inner wall of the holes by plating or the like.
（発明が解決しようとする問題点）
しかしながら、ドリルによる穴明けでブラインドスルー
ホールな形成する場合、当然のことながら多層板の厚さ
方向に対してドリルの深さを制御する必要があるか、多
層板の積層工程において。(Problems to be Solved by the Invention) However, when forming blind through holes by drilling, it is of course necessary to control the depth of the drill in the thickness direction of the multilayer board. In the lamination process of multilayer boards.
多層板の板厚の変動は避けられず、また穴明は作業の方
法によっては、第５図に示すブラインドスルーホール（
１２）の底部（１４）と、次の層の導体回路（１３）と
の距ｆｔ（ｈ）が変動するため、導体回路の電気的特性
が大きく変化するという欠点があった。Variations in the thickness of multilayer boards are unavoidable, and depending on the method of drilling, blind through holes (as shown in Figure 5) may be used.
Since the distance ft (h) between the bottom part (14) of 12) and the conductor circuit (13) of the next layer varies, there is a drawback that the electrical characteristics of the conductor circuit change greatly.
（問題点を解決するための手段）
以上の問題点を解決するために、本発明が採った手段を
、実施例に対応する第１図及び第２図を参照して説明す
る。(Means for Solving the Problems) Measures taken by the present invention to solve the above problems will be explained with reference to FIGS. 1 and 2, which correspond to embodiments.
第１図は本発明に係る多層プリント配線板の一部を切り
欠いた部分側視図であり、第２図はその部分拡大縦断面
図である。第１図及び第２図に示すように、本発明の多
層プリント配線板（１）は、内層基板等の端層後、ドリ
ルによる穴明けで設けられた非貫通孔の内壁に、めっき
等により導体層を形成して設けられたブラインドスルー
ホール（２）を有し、前記ブラインドスルーホール（２
）に最も近い内層に、導体回路（３）が形成されたもの
であって、前記内層導体回路（３）の、前記ブラインｌ
くスルーホール（２）の底部（４）の近傍に対応する部
分（６）を、前記底部（４）の直Ｆ′部分（５）を迂回
して形成したことを特徴とする多層プリント配線板（１
）である。FIG. 1 is a partially cutaway side view of a multilayer printed wiring board according to the present invention, and FIG. 2 is a partially enlarged vertical sectional view thereof. As shown in FIGS. 1 and 2, the multilayer printed wiring board (1) of the present invention is provided by plating or the like on the inner wall of a non-through hole formed by drilling after an end layer of an inner layer board, etc. It has a blind through hole (2) provided by forming a conductor layer, and the blind through hole (2) is provided by forming a conductive layer.
), a conductor circuit (3) is formed on the inner layer closest to
A multilayer printed wiring board characterized in that a portion (6) corresponding to the vicinity of the bottom (4) of the through hole (2) is formed by bypassing the straight F' portion (5) of the bottom (4). (1
).
（発明の作用）
本発明が以上のような手段を採ることによって、以下の
ような作用がある。(Actions of the Invention) By adopting the above measures, the present invention has the following effects.
従来の多層プリント配線板（１１）にあっては、多層板
の積層工程における板厚の変動や、穴明は工程における
ドリルのストロークの下限の変動等による、ブラインド
スルーホール（１２）の底部（１４）と１次の層の導体
回路（１３）との距１ｔ（ｈ）の変動は避けられないこ
とは前述した通りである。In the conventional multilayer printed wiring board (11), the bottom of the blind through hole (12) ( 14) and the conductor circuit (13) of the primary layer, variations in the distance 1t(h) are unavoidable, as described above.
しかしながら１本発明によれば、内層導体回路（３）の
ブラインドスルーホール（２）の底部（４）の近傍に対
応する部分（６）を、底部（４）の直下部分（５）を迂
回して形成したことにより、ブラインドスルーホール（
２）の底部（４）と、次の層との距離（ｈ）が変動して
も、ブラインドスルーホール（２）と、次の層の導体回
路（３）との距ｆｌｌ（ｉ）は一定の長さ以上に保たれ
る。However, according to the present invention, the portion (6) corresponding to the vicinity of the bottom (4) of the blind through hole (2) of the inner layer conductor circuit (3) is bypassed through the portion (5) directly below the bottom (4). By forming a blind through hole (
Even if the distance (h) between the bottom (4) of 2) and the next layer changes, the distance fll(i) between the blind through hole (2) and the conductor circuit (3) of the next layer remains constant. It is kept longer than the length of.
次に、本発明を各実施例に従って詳細に説明する。Next, the present invention will be explained in detail according to each embodiment.
（実施例）
実施例１
第１図及び第２図に示すように、ブラインドスルーホー
ル（２）に最も近い内層に、導体回路（３）であるベタ
パターンが形成された多層プリント配線板（１）におい
て、ベタパターンのブラインドスルーホール（２）の底
部（４）の近傍に対応する部分（６）にクリアランスホ
ールを形成して本発明に係る多層プリント配線板（１）
を得る。(Example) Example 1 As shown in Figures 1 and 2, a multilayer printed wiring board (1) was prepared in which a solid pattern, which is a conductor circuit (3), was formed on the inner layer closest to the blind through hole (2). ), a clearance hole is formed in a portion (6) corresponding to the vicinity of the bottom (4) of the blind through hole (2) in the solid pattern to produce a multilayer printed wiring board (1) according to the present invention.
get.
実施例２
第３図に示すように、ブラインドスルーホール（２）に
最も近い内層に、導体回路（３）であるラインパターン
が形成された多層プリント配線板（１）において、ライ
ンパターンのブラインドスルーホール（２）の底部（４
）の近傍に対応する部分（６）を、底部の直下部分（５
）を迂回して形成して本発明に係る多層プリント配線板
（１）を得る。Example 2 As shown in FIG. 3, in a multilayer printed wiring board (1) in which a line pattern, which is a conductor circuit (3), is formed in the inner layer closest to the blind through hole (2), the blind through hole of the line pattern is The bottom of the hole (2) (4
), the part (6) corresponding to the vicinity of the bottom part (5
) to obtain a multilayer printed wiring board (1) according to the present invention.
（発明の効果）
以上詳述した通り、本発明に係る多層プリント配線板に
あっては、ブラインドスルーホールに最も近い内層の導
体回路の、前記ブラインドスルーホールの底部の近傍に
対応する部分を、前記底部の直下部分を迂回して形成し
たことにその特徴があり、これにより、ブラインドスル
ーホールの底部と、導体回路との間に一定以上の距離が
保たれるので、電気的特性の変動が少ない多層プリント
配線板を提供することができる。また１以上のような理
由から、多層板の板逗の変動や、ドリルのストロークの
下限の変動等の許容範囲を従来に比べ大きくとることが
でき、製造性を著しく向上させるという効果をも奏する
。(Effects of the Invention) As detailed above, in the multilayer printed wiring board according to the present invention, the portion of the conductor circuit in the inner layer closest to the blind through hole, which corresponds to the vicinity of the bottom of the blind through hole, Its characteristic lies in the fact that it is formed by bypassing the part directly below the bottom of the blind through hole, which maintains a distance of at least a certain distance between the bottom of the blind through hole and the conductor circuit, thereby preventing fluctuations in electrical characteristics. It is possible to provide a multilayer printed wiring board with a reduced number of layers. In addition, for the reasons mentioned above, it is possible to have a larger tolerance range than before, such as variations in the plate width of the multilayer board and variations in the lower limit of the stroke of the drill, and it also has the effect of significantly improving manufacturability. .
第１図は本発明に係る多層プリント配線板を示す一部を
切り欠いた部分４視図、第２図は第１図に示す多層プリ
ント配線板の部分拡大縦断面図、第３図は本発明に係る
別の多層プリント配線板を示す一部を切り欠いた部分斜
視図、第４図は従来の多層プリント配線板を示ナ一部を
切り欠いた部分斜視図、第５図は第４図に示す多層プリ
ント配線板の部分拡大縦断面図である。
符号の説明
■・・・多層プリント配線板、２・・・ブライン１〜ス
ルーホール、３・・・内層導体回路、４・・・底部、５
・・・直下部分、６・・・底部の近傍に対応する部分。
第１図
第２図
第３図FIG. 1 is a partially cutaway 4th perspective view of a multilayer printed wiring board according to the present invention, FIG. 2 is a partially enlarged longitudinal cross-sectional view of the multilayer printed wiring board shown in FIG. 1, and FIG. FIG. 4 is a partially cutaway perspective view showing another multilayer printed wiring board according to the invention; FIG. 4 is a partially cutaway perspective view of a conventional multilayer printed wiring board; FIG. FIG. 2 is a partially enlarged vertical cross-sectional view of the multilayer printed wiring board shown in the figure. Explanation of symbols■...Multilayer printed wiring board, 2...Brine 1 to through hole, 3...Inner layer conductor circuit, 4...Bottom, 5
... part immediately below, 6... part corresponding to the vicinity of the bottom. Figure 1 Figure 2 Figure 3
Claims (1)
形成された多層プリント配線板において、前記内層導体
回路の、前記ブラインドスルーホールの底部の近傍に対
応する部分を、前記底部の直下部分を迂回して形成した
ことを特徴とする多層プリント配線板。In a multilayer printed wiring board in which a conductor circuit is formed in an inner layer closest to a blind through hole, a portion of the inner layer conductor circuit corresponding to the vicinity of the bottom of the blind through hole is formed by bypassing a portion directly below the bottom. A multilayer printed wiring board characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4206087A JPS63208298A (en) | 1987-02-24 | 1987-02-24 | Multilayer printed interconnection board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4206087A JPS63208298A (en) | 1987-02-24 | 1987-02-24 | Multilayer printed interconnection board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63208298A true JPS63208298A (en) | 1988-08-29 |
| JPH0370398B2 JPH0370398B2 (en) | 1991-11-07 |
Family
ID=12625557
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4206087A Granted JPS63208298A (en) | 1987-02-24 | 1987-02-24 | Multilayer printed interconnection board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63208298A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7393720B2 (en) | 2004-09-29 | 2008-07-01 | Unimicron Technology Corp. | Method for fabricating electrical interconnect structure |
-
1987
- 1987-02-24 JP JP4206087A patent/JPS63208298A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7393720B2 (en) | 2004-09-29 | 2008-07-01 | Unimicron Technology Corp. | Method for fabricating electrical interconnect structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0370398B2 (en) | 1991-11-07 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
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|
| EXPY | Cancellation because of completion of term |