JPS6320458U - - Google Patents

Info

Publication number
JPS6320458U
JPS6320458U JP11340086U JP11340086U JPS6320458U JP S6320458 U JPS6320458 U JP S6320458U JP 11340086 U JP11340086 U JP 11340086U JP 11340086 U JP11340086 U JP 11340086U JP S6320458 U JPS6320458 U JP S6320458U
Authority
JP
Japan
Prior art keywords
light
cavity
emitting element
light emitting
receiving element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11340086U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11340086U priority Critical patent/JPS6320458U/ja
Publication of JPS6320458U publication Critical patent/JPS6320458U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例に係る光半導体装置
の断面図、第2図及び第3図は第1図の変形例を
示す光半導体装置の断面図である。 図中、1,11,21は本体の例示であるチツ
プキヤリア、デユアルインラインパツケージ、角
形パツケージ、2はキヤビテイ、3は発光素子又
は受光素子、4は受光素子又は発光素子、6は光
透過蓋としての光透過用ガラス窓蓋である。
FIG. 1 is a cross-sectional view of an optical semiconductor device according to an embodiment of the present invention, and FIGS. 2 and 3 are cross-sectional views of optical semiconductor devices showing modifications of FIG. 1. In the figure, 1, 11, and 21 are examples of the main body, such as a chip carrier, a dual in-line package, and a rectangular package; 2 is a cavity; 3 is a light-emitting element or a light-receiving element; 4 is a light-receiving element or a light-emitting element; and 6 is a light-transmitting lid. This is a glass window cover for light transmission.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 本体の表裏に光素子の入るキヤビテイをそれぞ
れ形成し、一方のキヤビテイに発光素子又は受光
素子を、他方のキヤビテイに受光素子又は発光素
子を背中合せに且つ光軸を一致させて組み込み、
光透過蓋でキヤビテイを封止したことを特徴とす
る光半導体装置。
Cavities for receiving optical elements are formed on the front and back sides of the main body, and a light emitting element or a light receiving element is installed in one cavity, and a light receiving element or a light emitting element is installed in the other cavity with their optical axes aligned, back to back.
An optical semiconductor device characterized in that a cavity is sealed with a light-transmitting lid.
JP11340086U 1986-07-25 1986-07-25 Pending JPS6320458U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11340086U JPS6320458U (en) 1986-07-25 1986-07-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11340086U JPS6320458U (en) 1986-07-25 1986-07-25

Publications (1)

Publication Number Publication Date
JPS6320458U true JPS6320458U (en) 1988-02-10

Family

ID=30995167

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11340086U Pending JPS6320458U (en) 1986-07-25 1986-07-25

Country Status (1)

Country Link
JP (1) JPS6320458U (en)

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