JPS63198341A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the assembling operability of a semiconductor device and to reduce the inductance of wirings by connecting the metallized layer of a conductive chip to the electrodes of a semiconductor element by fine metal wirings. CONSTITUTION:A semiconductor element 8 is secured onto a metallized layer 9, and conductive chips 10 are secured to a position near the element 8 on the metallized layer 3', a position near the element 8 on the layer 3, and a position near the element 8 on the layer 9. Then, the input side electrode of the surface of the element 8 is connected by input side electrode wiring metal fine wiring 6 to the surface of the chip 10, the output side electrode on the surface of the element 8 is connected by output side electrode wiring metal fine wiring 6 to the surface of the chip 10, and the ground side electrode on the surface of the element 8 is connected by ground side electrode wiring metal fine wiring 6 to the surface of the chip 10. Thus, the wiring work with the fine metal wirings can be simply performed, and the wirings 6 to be wired can be shortened, thereby minimizing the inductance due to the wirings.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device with an improved bonding structure of thin metal wires.

[Conventional technology]

In general, as the frequency of containers for semiconductor devices increases, the size of the substrate constituting the container and the length of the metal wiring for wiring become shorter, but this poses a problem regarding the workability of assembly.

FIG. 5(a) shows an example of a conventional semiconductor device.

This will be explained with reference to (b).

Figure 5 (a) and (b) are low noise GaAs FETs.
FIG. 2 is a vertical section and a plan view of an example. Insulating container base 1, output side and input side electrode leads 2.2', metallized layer 3 for leading the output side electrode and input side electrode to the outside.
．． 3', a semiconductor device container including an insulating wall member 4, a metallized layer 5 for cap sealing, a ground side electrode lead 7, a metallized layer 9 for fixing the semiconductor device and for leading the ground side electrode to the outside; and this container. A semiconductor element 8 fixed on the inner metallized layer 9 is electrically connected from the electrode on the surface to each metallized layer 3, 3', 9 by a thin metal wire 6 for ground electrode wiring.

[Problem that the invention seeks to solve]

In the conventional semiconductor device described above, for example, the thickness of the semiconductor element 8 is 150 μm, and the thickness of the insulating wall member 4 of the container is 40 μm.
If it is 0 μm, the thickness of the wedge for crimping the thin metal wire 6 is such that the side surface of the semiconductor element 8 and the container wall member 4
There must be a gap of at least 700 μm or more between the inner surface of the semiconductor element 8 and the inner surface of the semiconductor element 8, and even if the wedge can be used to crimp the thin metal wire 6, the metal wire 6 may come into contact with the top corner of the semiconductor element 8, or the wall member may be damaged during wiring work. Workability is very poor because the thin wires break when they hit the top corner, and the length of the thin metal wires is also limited by the thickness of the semiconductor element, so there is a limit to the minimization of inductance due to the wiring.

An object of the present invention is to provide a semiconductor device that can greatly improve the workability of such assembly and further reduce the inductance due to wiring.

[Means for solving problems]

The structure of the present invention is a semiconductor device including a semiconductor element having a plurality of electrodes on its surface, and a container in which the semiconductor element is bonded and housed on one internal metallized layer. A conductive chip having a metallized layer on the front surface that can be wire-bonded and a metallized layer that can be wire-bonded on the back surface and electrically bonded between the front and back surfaces and having the same height as the semiconductor element is formed. The metallized layer of the conductive chip and the electrode on the semiconductor element are connected by a thin metal wire.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) and (b) are a longitudinal sectional view and a plan view thereof showing a first embodiment of the present invention, and FIGS. 2(a) and (b) are
is 2 of the conductive chip 10 used in the semiconductor device of this embodiment.
FIG. 3 is a perspective view showing two examples. As shown in FIG. 2(a), as the conductive chip 10 used in this embodiment, a metallized layer 21 capable of wire bonding is applied to the upper surface of a metal 20 such as copper, and a metallized layer 21 capable of wire bonding is applied to the back surface thereof. As shown in FIG. 2(b), metallization J'! is applied to the entire surface of ceramic 24 such as alumina. 23, and the upper surface is flat so that bonding can be performed, and the back surface is flat so that smooth bonding can be performed.

The semiconductor device container of this embodiment has a container base 1°, a wall member 4
．． It is composed of electrode leads 2.2' and 7. The container base 1 has a metallized layer M3' for leading out the input side electrode, a metalized layer 3 for leading out the output side electrode, and a metalized layer 7 for element fixing and ground electrode leading, and the semiconductor element 8 is fixed on the metallized layer 9 and metalized. A conductive chip 10 is fixed to a location on layer 3' close to element 8, a location on metallized layer 3 close to element 8, and a location on metallized N9 close to element 8, respectively. Next, thin metal wire 6 for input side electrode wiring
The input side electrode on the surface of the semiconductor element and the surface of the conductive chip 10 are connected by the thin metal wire 6 for the output side electrode wiring, the output side electrode on the surface of the semiconductor element and the surface of the conductive chip 10 are connected by the thin metal wire 6 for the ground side electrode wiring. The ground side electrode on the surface of the element and the surface of the conductive chip 10 are connected and wired.

Note that the conductive chip 10 may be applied to only some of the electrodes, not all the electrodes in this embodiment.

FIGS. 3(a) and 3(b) are a plan view of a second embodiment of the present invention and a perspective view of the conductive chip 11 used in this embodiment. The conductive chip 11 is made of an L-shaped ceramic 26 such as alumina, and a metallized layer 25 is applied to the top and back surfaces of the approximately central portion of each long side of the L-shape, and also to the side surfaces thereof so that conduction is established between each long side. ing.

In this embodiment using this conductive chip 11, explanations of the same parts as in the first embodiment will be omitted. The conductive chip 11 is fixed around the semiconductor element 8 so as to connect the input side electrode and one ground side electrode, and the conductive chip 11 connects the output side electrode and the other ground side electrode. Wiring is performed using thin metal wires 6 on the conductive chip 11 to lead out the respective electrodes.

FIGS. 4(a) and 4(b) are a plan view of a third embodiment of the present invention and a perspective view of the conductive chip 12 used in this embodiment. This conductor chip 12 is made of a mouth-shaped ceramic 28 such as alumina, and a metallized layer 27 is applied to the upper surface and the back of the approximately central part of the four sides of the mouth, and also to the side surfaces thereof so that conduction is established between each side. ing.

In this embodiment, a conductive chip 12 is fixed so as to surround a semiconductor element 8, and wires are wired on the conductive chip 12 by thin metal wires 6 to lead out the respective electrodes from the electrodes on the surface of the element 8.

〔Effect of the invention〕

As explained above, the present invention provides a method in which, on the metallized layer for leading out an electrode inside the semiconductor device container, in the vicinity of the semiconductor device,
Alternatively, by fixing the conductive chip in a surrounding manner,
Wiring work using thin metal wires can be carried out very easily regardless of the thickness of the semiconductor element, and the work can be performed regardless of the thickness of the semiconductor element and the thickness of the wedge for crimping the thin metal wire.
Furthermore, since the thin metal wires used for wiring can be shortened, the inductance caused by the wiring can also be minimized, and a high-performance semiconductor device can be obtained.

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) are a sectional view and a plan view of a first embodiment of the present invention, and FIG. 2(a) is a sectional view thereof. 3(b) is a sectional view showing two sides of the conductive chip 10 used in this embodiment, and FIGS. 3(a) and 3(b) are plan views showing a second embodiment of the present invention and used in this embodiment. FIG. 4(a) is a perspective view of the conductive chip. (b) is a plan view showing a third embodiment of the present invention and a perspective view of a conductive chip used in this embodiment;
(b) is a sectional view and a plan view of a conventional semiconductor element. DESCRIPTION OF SYMBOLS 1... Semiconductor element container base, 2.2', 7... Lead, 3.3', 9... Metallized layer for electrode chamber interior, 4
... Insulating wall member, 5 ... Sealing metallized layer, 6
...Thin metal wire for wiring, 8...Semiconductor element, 10゜1
1.12... Conductive chip, 20... Metal, 21°22.23, 25.27... Metallized layer, 24°2
6.28...Ceramic. Agent Patent Attorney Uchihara Sound No. 2 M <-a) Page 4

Claims (1)

[Claims] In a semiconductor device including a semiconductor element having a plurality of electrodes on its surface and a container in which the semiconductor element is bonded to one internal metallized layer and housed, the semiconductor element is bonded to the metallized layer inside the container and has wires on the surface. The conductive chip has a metallized layer that can be bonded and a metallized layer that can be die-bonded on the back surface, and the front and back surfaces are electrically connected and have the same height as the semiconductor element. A semiconductor device characterized in that a metallized layer and an electrode on the semiconductor element are connected by a thin metal wire.