JPS63190551A - Voltage multiplying rectifier - Google Patents

Voltage multiplying rectifier

Info

Publication number
JPS63190551A
JPS63190551A JP1984287A JP1984287A JPS63190551A JP S63190551 A JPS63190551 A JP S63190551A JP 1984287 A JP1984287 A JP 1984287A JP 1984287 A JP1984287 A JP 1984287A JP S63190551 A JPS63190551 A JP S63190551A
Authority
JP
Japan
Prior art keywords
voltage
capacitor
power supply
power source
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984287A
Other languages
Japanese (ja)
Inventor
Naoki Ozawa
直樹 小澤
Hiroshi Yamamoto
博 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1984287A priority Critical patent/JPS63190551A/en
Publication of JPS63190551A publication Critical patent/JPS63190551A/en
Pending legal-status Critical Current

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  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To simplify a driving circuit and reduce loss, by employing MOSFET in a voltage multiplying rectifier. CONSTITUTION:A voltage multiplying rectifier consists of a DC power source 1, capacitors 2, 3, MOSFET 5a-8a, photocouplers 9a-12a and the like. When the polarity of an AC power source 22 is in a direction to impress a positive voltage on a resistor 21, light emission diodes 9b, 11b are lighted to put phototransistors 9a, 11a ON. According to this operation, the MOSFETs 5a, 7a are put ON and a capacitor 2 is charged to the voltage of the DC power source 1. When the polarity of the AC power source 22 is in a direction impress a negative voltage on the resistor 21, the capacitor 3 is charged in the same manner. As a result, a voltage about double of the voltage of the DC power source is impress.d on a DC load 4.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は倍電圧回路に関し、特に整流時の電圧降下が小
さいため損失が小さく、低電圧整流に適し、更に小形化
の出来る倍電圧整流に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a voltage doubler circuit, and particularly relates to a voltage doubler rectifier that has low loss due to a small voltage drop during rectification, is suitable for low voltage rectification, and can be further miniaturized. .

〔従来の技術〕[Conventional technology]

従来、この種の倍電圧整流回路は、第3図に示すように
2個のトランジスタ、整流ダイオードおよびコンデンサ
を使用している。第3図において1は直流電源、2.3
はコンデンサ、4は直流負荷、25.26はダイオード
、27.28はトランジスタである。
Conventionally, this type of voltage doubler rectifier circuit uses two transistors, a rectifier diode, and a capacitor, as shown in FIG. In Figure 3, 1 is a DC power supply, 2.3
is a capacitor, 4 is a DC load, 25.26 is a diode, and 27.28 is a transistor.

トランジスタ27にペース電流が供給されると。When a pace current is supplied to transistor 27.

トランジスタ27はオンし、コンデンサ3にダイオード
25を通じて直流電源電圧1の電圧まで充電される。同
様にトランジスタ28にベース電流が供給されるとコン
デンt2Vc充電され、結果として直流負荷4にはコン
デンサ2と3の和、即ち。
The transistor 27 is turned on, and the capacitor 3 is charged through the diode 25 to the voltage of the DC power supply voltage 1. Similarly, when the base current is supplied to the transistor 28, the capacitor t2Vc is charged, and as a result, the DC load 4 has the sum of capacitors 2 and 3, ie.

直流電源電圧の約2倍の電圧が印加される。A voltage approximately twice the DC power supply voltage is applied.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の回路では整流ダイオード使用のため約1
■の電圧降下を生じ、電力損失が大きいこと、またトラ
ンジスタ使用のため高速スイッチングを追求した場合に
ペースバイアス等で回路が複雑になる、という欠点があ
る。
In the conventional circuit described above, the rectifier diode is used, so approximately 1
(2) Voltage drop occurs, resulting in large power loss.Also, when high-speed switching is pursued due to the use of transistors, the circuit becomes complicated due to pace bias, etc.

〔問題点を解決するための手段〕[Means for solving problems]

本発明による倍電圧整流回路は、直流電源と、直列に接
続された2個のコンデンサと、このコンデンサを交互に
充電する2対のMOS FET計4個と前記MO8FE
Tの駆動回路を有している。
The voltage doubler rectifier circuit according to the present invention includes a DC power supply, two capacitors connected in series, two pairs of MOS FETs that alternately charge the capacitors, and the MO8FE.
It has a T drive circuit.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示す回路図で1図において
、1は直流電源、2.3はコンデンサ、4は直流負荷、
5a、6a、7a、8aはMOSFET、ダイオードは
MOS FETの寄生ダイオードを示している5 9 
a * 9 b * 10 a @ 10 b *11
a、11b、12a、12bはホトカプラを構成するホ
トトランジスタと発光ダイオード、13゜14.15.
16.21は抵抗、17.18.19.20は直流電源
、22は交流電源でめる。いま、交流電源22の極性が
抵抗22に正の電圧を印加する方向にるるとき、発光ダ
イオード9bとllbを点灯させるのでホトトランジス
タ9aとllaがオンする。そのためMO8FET5a
、7aはオンし、コンデンサ2に直流電源1の電圧まで
充電される。同様にして交流電源22の極性が抵抗22
に負の電圧を印加する方向にあるときはコンデンサ3に
充電され、結果として直流負荷4にはコンデンサ2と3
の和、即ち直流電源電圧の約2倍の電圧が印加される。
FIG. 1 is a circuit diagram showing an embodiment of the present invention. In FIG. 1, 1 is a DC power supply, 2.3 is a capacitor, 4 is a DC load,
5a, 6a, 7a, 8a are MOSFETs, and the diodes are parasitic diodes of the MOS FETs.5 9
a * 9 b * 10 a @ 10 b * 11
a, 11b, 12a, 12b are phototransistors and light emitting diodes constituting a photocoupler; 13°14.15.
16.21 is a resistor, 17.18.19.20 is a DC power supply, and 22 is an AC power supply. Now, when the polarity of the AC power supply 22 is in the direction of applying a positive voltage to the resistor 22, the light emitting diodes 9b and llb are turned on, so the phototransistors 9a and lla are turned on. Therefore MO8FET5a
, 7a are turned on, and the capacitor 2 is charged to the voltage of the DC power supply 1. Similarly, the polarity of the AC power supply 22 is changed to the resistance 22.
When a negative voltage is applied to the capacitor 3, the capacitor 3 is charged, and as a result, the capacitors 2 and 3 are connected to the DC load 4.
A voltage approximately twice the DC power supply voltage is applied.

第2図は本発明の他の実施例を示す回路図であシ、全体
の構成は第1図と同様である。第2因は1個のMOS 
FETと対をなす駆動部を示しである。図において23
はホトダイオード、24は発光ダイオードで6 ’:)
 s M OS k h T 5 aのゲートの最小ゲ
ート駆動電圧以上の電圧が得られるようにホトダイオー
ド23を直列接続する。発光ダイオード24が発光する
と各ホトダイオード23は、光起電力を生じMOS F
ET 5 aをオンするので第1図と同様に動作する。
FIG. 2 is a circuit diagram showing another embodiment of the present invention, and the overall configuration is the same as that in FIG. 1. The second factor is one MOS
This figure shows a driving section paired with an FET. 23 in the figure
is a photodiode, 24 is a light emitting diode, and 6':)
The photodiodes 23 are connected in series so that a voltage equal to or higher than the minimum gate drive voltage of the gate of s M OS k h T 5 a is obtained. When the light emitting diode 24 emits light, each photodiode 23 generates a photovoltaic force and the MOS F
Since ET 5 a is turned on, the operation is similar to that shown in FIG. 1.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は倍電圧整流回路にMOS 
FETを便用することによシ、駆動回路を簡単にし、そ
の電圧降下を小さくし、低損失化し、小形化出来るだけ
でなく低電圧の整流に適した倍電圧整流回路を提供でき
る利点がめる。
As explained above, the present invention uses MOS in the voltage doubler rectifier circuit.
The convenient use of FETs not only simplifies the drive circuit, reduces its voltage drop, reduces loss, and makes it more compact, but also provides the advantage of providing a voltage doubler rectifier circuit suitable for rectifying low voltages.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路図、第2図は他の
実施例を示す回路図、第3図は従来例を示す回路図でろ
る。図において 1・・・・・・直流電源、2.3・・・・・・コンデン
サ、4・・・・Ei流負負荷5a、6a、’Ia、13
m・−・・−・MO8FET9aa9b、10a、10
b、11amllb、12a。 12b・・・・・・ホトカプラを構成するホトトランジ
スタと発光ダイオード、13.14.15.16・・・
・・・抵抗、17.18.19.20・・・・・・直流
電源、21・・・・・・抵抗、22・・・・・・交流電
源、23・・・・・・ホトダイオード、24・・・・・
・発光ダイオード、25.26・・・・・・ダイオード
、27.28・・・・・・トランジスタ。 本
FIG. 1 is a circuit diagram showing one embodiment of the present invention, FIG. 2 is a circuit diagram showing another embodiment, and FIG. 3 is a circuit diagram showing a conventional example. In the figure, 1...DC power supply, 2.3...Capacitor, 4...Ei current negative load 5a, 6a, 'Ia, 13
m・・・・・MO8FET9aa9b, 10a, 10
b, 11amllb, 12a. 12b...Phototransistor and light emitting diode forming a photocoupler, 13.14.15.16...
... Resistor, 17.18.19.20 ... DC power supply, 21 ... Resistor, 22 ... AC power supply, 23 ... Photodiode, 24・・・・・・
- Light emitting diode, 25.26...diode, 27.28...transistor. Book

Claims (1)

【特許請求の範囲】[Claims] 第1のコンデンサの一端にドレインが接続され、直流電
源の正の電極にソースが接続された第1のMOS FE
Tと、該コンデンサの他端にドレインが接続され、該直
流電源の負の電極にソースが接続された第2のMOS 
FETと、第2のコンデンサと前記直流電源間に、前記
第1、第2のMOS FETとは逆方向に接続された第
3、第4のMOS FETを有し、前記第1と第2のM
OS FETと第3と第4MOS FETとをそれぞれ
対とし、交互にオンする駆動回路を有し、前記第1と第
2のコンデンサを直列接続したことを特徴とする倍電圧
整流回路。
A first MOS FE whose drain is connected to one end of the first capacitor and whose source is connected to the positive electrode of the DC power supply.
T, a second MOS whose drain is connected to the other end of the capacitor, and whose source is connected to the negative electrode of the DC power supply.
FET, third and fourth MOS FETs connected in opposite directions to the first and second MOS FETs between the second capacitor and the DC power supply, M
1. A voltage doubler rectifier circuit comprising an OS FET and a third and fourth MOS FET in pairs, a drive circuit that turns on alternately, and the first and second capacitors are connected in series.
JP1984287A 1987-01-29 1987-01-29 Voltage multiplying rectifier Pending JPS63190551A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984287A JPS63190551A (en) 1987-01-29 1987-01-29 Voltage multiplying rectifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984287A JPS63190551A (en) 1987-01-29 1987-01-29 Voltage multiplying rectifier

Publications (1)

Publication Number Publication Date
JPS63190551A true JPS63190551A (en) 1988-08-08

Family

ID=12010518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984287A Pending JPS63190551A (en) 1987-01-29 1987-01-29 Voltage multiplying rectifier

Country Status (1)

Country Link
JP (1) JPS63190551A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010004726A (en) * 2008-05-19 2010-01-07 Honda Motor Co Ltd Power converter
US8036008B2 (en) 2006-09-15 2011-10-11 Mitsubishi Electric Corporation DC/DC power converting apparatus
US8040702B2 (en) 2006-09-15 2011-10-18 Mitsubishi Electric Corporation DC/DC power converting apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8036008B2 (en) 2006-09-15 2011-10-11 Mitsubishi Electric Corporation DC/DC power converting apparatus
US8040702B2 (en) 2006-09-15 2011-10-18 Mitsubishi Electric Corporation DC/DC power converting apparatus
JP2010004726A (en) * 2008-05-19 2010-01-07 Honda Motor Co Ltd Power converter

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