JPS63181045A - Data processor - Google Patents

Abstract

PURPOSE:To automatically obtain an exact measured value and to obtain an instruction execution time for a specified instruction group or an individual instruction, by selecting a software instruction which measures the instruction execution time and the number of instructions to be executed by a hardware and registers them on a memory. CONSTITUTION:The titled device is constituted with the memory 1, an address register 2, an instruction word register 3, a selection circuit 4, a first display circuit 5, a second display circuit 6, a third display circuit 7, two logic circuits 8 and 9, a counter register 10 and a timer register 11. The counter register 10 steps when a content stored in the memory 1 read out at every start of the execution of the software instruction is an object targeted to be measured and also the first and the second display circuits 5 and 6 are placed under set states. The timer register 11 steps when the content stored in the memory read out at every start of the execution of the software instruction is the object targeted to be measured and also the first and the third display circuits 5 and 7 are placed under the set states. The average execution time of the software instruction in a program to be measured in a measuring period can be obtained from each value of the counter register 10 and the timer register 11.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a data processing device that obtains the average execution time of software instructions in a program under test.

(Prior art) Conventionally, when measuring the average execution time of a program,
The monitor program reads the value of a timer provided in the central processing unit, stores it, starts execution of the program under test, reads the timer value again after execution, and subtracts the values of both timers to determine the value of the program under test. Get the execution time, or connect a dedicated instrument to get the execution time,
On the other hand, the number of executed instructions in the program under test is obtained by manually counting the source program, and the average instruction execution time is obtained by dividing the execution time by the number of executed instructions.

(Problems to be Solved by the Invention) In the above-mentioned conventional technology, since it is necessary to read the timer at the start and end of the program under test, overhead time is involved and the obtained execution time is inaccurate;
In addition, since all instructions in the program under test are subject to measurement, the execution time of individual instructions cannot be measured, which is inconvenient for evaluating the performance of computer systems, and the number of executed instructions must be counted manually. However, the dedicated measuring instruments are still expensive because they have a configuration similar to that of a data processing device, and in order to connect them, many dedicated terminals must be installed on the device under test. There are many problems.

(Means for Solving the Problems) The device of the present invention includes a memory in which the measurement target/non-target is registered in advance for each software command, and a first display that is set to display the measurement period. a command word register that is set and held when a software command in the program under test starts executing while the program under test is running; and a second display circuit that is set each time a software command is set and reset after one clock. a third display circuit that is set in response to the first start of execution of a series of software instructions and reset in response to a software instruction abort signal; The measurement target and the first display circuit and the second
The measurement target is a counter register that increments when both display circuits are in the set state, and the memory contents that are read out each time execution of a software instruction starts, and both the first display circuit and the third display circuit are set. It has a timer register that increments when the program is in the state, and the average execution time of software instructions in the program under test during the measurement period can be obtained from each value of the counter register and the timer register.

(Example) Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention, in which memory 1. Address register 2. Instruction word register 32 selection circuit 4. First display circuit5. Second display circuit 6. Third display circuit 7, two AND circuits 8゜9, counter register 10
and a timer register 11.

Memory 1 has a structure of 256 words x 1 bit/word, and each word is specified by an address set in address register 2 or an 8-bit operating code of an instruction set in instruction word register 3, and the instruction execution time is Prior to measurement, ``l'' is written in advance to the word corresponding to the instruction to be measured, and 00' to the word corresponding to the instruction not to be measured, by a microinstruction.

In the address register 2, the address used for the above writing is set by a microinstruction, and this 1 is supplied to the memory 1 via a selection circuit 4 that accepts the contents of the address register 2. The instruction word register 3 is used to set and hold software instructions in the program under test at the start of execution while the program under test is running, and to which other instructions such as software instructions in the monitor program can also be set. Software instructions in the set program under test are supplied to the memory 1 via the selection circuit 4.

As is clear from the above description, the selection circuit 4 is controlled by a microinstruction to select the contents of the address register 2 when writing to the memory 1 and the contents of the instruction register 3 when reading from the memory 1. .

First display circuit 5, second display circuit 6 and third display circuit 7
This can be achieved with 7 lip-flops. The first display circuit 5 is set to a set state ('1') by a microinstruction when the instruction execution time measurement starts, and is set to a reset state ('0') at the end of the measurement.

The second display circuit 6 enters a set state ('1") every time a software instruction is set in the instruction word register 3 at the start of execution, and becomes a reset state (0") one clock later. Further, the third display circuit 7 enters a set state (“1”) when the first software instruction of a series of software instructions is set in the instruction word register 3 at the start of execution, and responds to a software instruction interrupt signal based on an interrupt or the like. and enters the reset state CO'').

The AND circuit 8 is the content read from the memory 1.

Only when the display of the first display circuit 5 and the display of the second display circuit 6 are '1'', that is, each time a software instruction to be measured is newly set in the instruction word register 3 during the measurement period, the clock is displayed. It outputs '1' in response to CLK, and counter register 10 increments in response to this output. Therefore, the counter register 10 counts the number of software instructions to be measured during the measurement period.

The AND circuit 9 also operates when the contents read from the memory 1, the display on the first display circuit 5, and the display on the third display circuit 7 are all '1'', that is, during the software instruction execution time during the measurement period. The clock CLK is accepted and output only during this period, and the timer register 11 increments in response to this output.Therefore, the timer register 11 counts the instruction execution time during the measurement period.

Next, the operation of this embodiment will be explained with reference to the time chart shown in FIG.

In FIG. 2, in order to simplify the explanation, the third display circuit 7 displays ``1'' for a period of 9 clocks, and during this period three software instructions, all of which have 1'' registered in advance in the memory 1, are executed. A case is illustrated in which the numbers x, I2, and I3 are set in the life sand candy register 3.

The first display circuit 5 is already in the set state trap, and at the timing T1 (the suspension period of software instruction execution ends, the software instruction 11 is set at the timing Tl, and only for 4 clocks from the timing T1). Similarly, software instructions I2 and 3 are set in instruction word register 3 at timings T2 and T3, respectively.
2 clocks from timing T2 and timing T, respectively.
It is executed for only 3 to 3 clocks. timing T3
It is assumed that a software instruction interrupt signal is input three clocks after the start.

Based on the above situation, the display content (6) of the second display circuit 6 is as shown in FIG.
The state is in the reset state, the set state is at timing T2, the reset state is from one clock later to timing T3, the set state is at timing T3, and the reset state is after one clock. As a result, the AND circuit 8 outputs the clock CLK only during the above three set states, and the counter register 10 outputs the clock CLK by the number of software instructions set in the instruction word register 3 from timing T1 to timing T4. You will advance by a certain number of ``3''.

On the other hand, the display content (7) of the third display circuit 7 is in a set state from timing T1 to timing T4, as shown in FIG. 2, and as a result, the AND circuit 9 outputs the clock CLK only during this period. However, the timer register 11 is
During this time, the number of clocks CLK (corresponding to the instruction execution time) is increased by "9".

Although FIG. 2 only illustrates one short period during the measurement period during which the first display circuit 5 maintains the set state, during the measurement period such There may be multiple short periods. The counter register 10 and the timer register 11 accumulate the respective counts for all short periods, and when the first display circuit 5 enters the reset state and the measurement period ends,
For example, it can be read by software and the average instruction execution time can be determined by dividing the contents of the timer register 11 by the contents of the counter register 10.

(Effects of the Invention) According to the present invention, by providing the small-scale hardware as described above, it is possible to measure the instruction execution time and the number of executed instructions using the hardware, so that accurate measurement values can be automatically obtained. In addition, since the software instructions to be registered in memory can be freely selected, the instruction execution time for a specific group of instructions or individual instructions can be obtained, which is convenient for evaluating computer systems. .

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of the present invention, and FIG. 2 shows a time chart of this embodiment.

Claims (1)

[Scope of Claims] A memory in which a measurement target or non-target is registered in advance for each software command; a first display circuit that is set to display a measurement period; and a first display circuit that is set to display a measurement period; an instruction word register in which the software instructions in the program under test are set and held at the start of execution; a second display circuit that is set each time the settings are made and reset one clock later; a third display circuit that is set in response to the start of execution and reset in response to a software instruction interrupt signal; and a third display circuit that is set in response to the start of execution and reset in response to a software instruction interrupt signal; a counter register that increments when both the display circuit and the second display circuit are in the set state; and the first display circuit whose measurement target is the stored content of the memory that is read every time the execution starts. and a timer register that increments when both the third display circuit and the third display circuit are in the set state, and the software instruction in the program under test during the measurement period is determined from each value of the counter register and the timer register. A data processing device that makes it possible to obtain average execution time.