JPH0619752A - Microcomputer - Google Patents

Abstract

PURPOSE:To considerably accurately measure only time when a program to be messured is really executed while an environment for naturally executing CPU at the time of executing the program to be messured and the other peripheral hardware is maintained. CONSTITUTION:A program memory 170, CPU 110 provided with PC 150, IR 130 and a timing signal generation circuit 140 generating a timing signal based on IR 130, and program execution time measurement circuit 160 measuring the execution time of a prescribed program by the output of PC 150 and the timing signal are provided. The program execution time measurement circuit 160 is provided with comparison registers 161 and 162 executing comparison with the output of PC 150 and storing the start address and the end address of the program to be measured and a timer 165 executing increment only within the execution time of an instruction based on an instruction read indication signal 141, an instruction execution termination indication signal 142 and comparison coincidence signals EQS and EQE.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer, and more particularly to a microcomputer having a function of measuring a program execution time.

[0002]

2. Description of the Related Art In recent years, in a system using a microcomputer, high-performance peripheral hardware has been built into the microcomputer in order to cope with the speeding up of the microcomputer and to improve the accuracy of microcomputer processing. , There is an increasing trend to connect faster peripheral hardware to the outside world. Moreover, in order to provide an interface between the CPU of the microcomputer and these peripheral hardware, an interrupt control circuit is mounted inside the microcomputer to realize faster and more accurate processing.

Therefore, in the program development, for example, it is necessary to always be aware of the execution time of the interrupt processing of the CPU with respect to the peripheral hardware, and to correctly recognize the response time for the program development (debugging). Therefore, in order to measure the execution time of the created program, for example, immediately before and after the program to be measured, it is possible to inform the inside or outside of the microcomputer of the timings corresponding to the start and end of the measured program. The execution time is measured by placing instructions and observing the events that occur due to the execution of these instructions.

As a concrete method, for example, "1" is set to the port of the peripheral hardware immediately before the measured program.
Is executed, the port is reset to "0" immediately after the program to be measured, and the change of the port is observed, and the period when the port is "1" is measured. There is a method of measuring.

If the internal and external peripheral hardware have timers, the instruction to read the timer is executed immediately before the program to be measured, and the execution time of the program to be measured is read from the read data of the timer. There are also methods such as measuring.

[0006] In short, the development of such a program proceeds by knowing the execution time of the program and using it as debug information during program development.

[0007]

The above-mentioned conventional microcomputer has the following problems in measuring the execution time.
Issuing an instruction that causes a change in an event outside and inside the microcomputer immediately before and after the measured program is an alternative action for knowing the timing corresponding to the start and end of execution of the measured program. It does not always coincide with the true execution end timing of the measured program. That is, it is unavoidable that a delay in response occurs when these instructions are executed and a change in an event occurs inside or outside the microcomputer.

Further, since an unnecessary instruction is placed immediately before and after the program to be measured, and a part of the peripheral hardware is used as a measuring means, it is different from the environment where the non-measurement program is supposed to be executed. There is a possibility that it will end up.

Further, since the peripheral hardware is operated by the instructions placed immediately before and after the program to be measured, the same peripheral hardware cannot be used in the program to be measured. Depending on the situation, it is necessary to properly use a plurality of peripheral hardware as the measuring means, which makes the operation for measuring the execution time very complicated.

An object of the present invention is to measure a program execution time while maintaining the environment in which the CPU, other peripheral hardware, etc. at the time of execution of the measured program are originally intended to be executed, An object of the present invention is to provide a microcomputer capable of extremely accurately measuring only the time when it is truly executed.

[0011]

A microcomputer of the present invention includes a program memory for storing a program,
A central processing unit including a program counter indicating an instruction execution address, an instruction storage register for storing an instruction to be executed, and a timing signal generation circuit for decoding the contents of the instruction storage register to generate various timing signals, and the program counter And a program execution time measuring circuit that measures the execution time of a predetermined program based on the timing signal output from the timing signal generating circuit, and the program execution time measuring circuit stores the start and end addresses of the measured program. Address storage means for performing the program counter, the address storage means and measuring means for measuring from the execution start time to the execution end time of the measured program based on the timing signal output from the timing signal generation circuit, Measured Configured to measure the execution time of the object to be measured program by setting the start address and end address of grams to the address storage means.

[0012]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram of a microcomputer showing a first embodiment of the present invention. As shown in FIG. 1, the microcomputer 100 of the present embodiment has a central processing unit (hereinafter referred to as CPL) 100, an execution time measuring circuit 160 and a program memory 170, which are mutually connected by an address / data bus 180. Connected. The CPU 110 is an address / data bus control circuit 12
0, an instruction storage register (hereinafter referred to as IR) 130,
It is composed of a timing signal generation circuit 140 and a program counter (hereinafter referred to as PC) 150.

First, the microcomputer 100
At the address / data bus control circuit 120, the program memory 1 is accessed via the address / data bus 180.
Read control of the program from 70 is performed. Also, I
The R 130 is a register that stores the operation code read from the program memory 170, and the content thereof is output to the timing signal generation circuit 140. The timing signal generation circuit 140 is a circuit that decodes the operation code stored in the IR 130 and generates various control signals for controlling the operation of each unit of the microcomputer 100. Here, a signal (hereinafter referred to as a PRD signal) 141 for instructing the reading of the operation code from the program memory 170, a signal (hereinafter referred to as a PEND signal) 142 for indicating the execution end timing of the instruction, and the like are output.

Next, the PC 150 uses the program memory 17
It is a counter that indicates the read address of the program from 0, and increments by +1 when the PRD signal 141 is output from the timing signal generation circuit 140. This P
The content of C150 is output to the execution time measuring circuit 160.

On the other hand, the program memory 170 is a memory for storing a program to be executed. Moreover, PC15
Based on 0 and the address output from the address / data bus control circuit 120, an instruction (opcode) is read via the address / data bus 180. Also,
The address / data bus 180 is a bus for connecting the CPU 110, the execution time measuring circuit 160, the program memory 170, and peripheral hardware inside and outside the microcomputer, and addresses and data are exchanged via this bus.

FIG. 2 is a block diagram of the execution time measuring circuit shown in FIG. As shown in FIG. 2, this execution time measuring circuit 1
A PRD signal 141 for instructing the reading of the operation code from the program memory 170, a PEND signal 142 indicating the execution end timing of the instruction, and the contents of the PC 150 are input to 60, and two compare registers (hereinafter referred to as CMS).
And CME) 161 and 162. These registers 161 and 162 are registers capable of reading and writing data from the CPU 110 via the address / data bus 180, and hold values thereof and PC1.
The contents of 50 are constantly compared, and if they match, the match signals EQS and EQE are made active "1".

The execution time measuring circuit 160 also includes various gates, flip-flops 163 and 164, and a timer 165. The gates G6 and G7 are inverting elements and input EQE and EQS, respectively. Also,
The gates G1 to G5 and G8 are logical product (AND) elements, the AND gate G1 inputs the PRD signal 141 and EQS, and the AND gate G2 inputs the output of the AND gate G1 and the output of the inverting element G6. Furthermore, AND gate G
3 inputs the EQE and the PRD signal 141, and inputs the AND gate G4PEND signal 142, the output of the flip-flop 163 and the output of the inverting element G6. And AND
The gate G5 inputs the output of the flip-flop 164 and the clock φ, and the AND gate G8 inputs EQS and the output of the AND gate G1.

On the other hand, the flip-flop (hereinafter referred to as F / F) 163 is "" when the output of the AND gate G3 is "1".
It is set to "1", and when the output of the AND gate G2 is "1", it is reset to "0", and its output is the AND gate G.
4 is input. The F / F 164 is reset to "0" when the output of the AND gate G1 is "1", and its output is input to the AND gate G5. Timer (hereinafter T
165) is cleared to zero when the output of the AND gate G8 is "1", and the output of the AND gate G5 is "1".
It is a timer that increments by 1 when "1".
This allows the CPU to operate via the address / data bus 180.
The timer value of TM165 can be read from 110.

Next, the operation of the microcomputer 100 for executing the instructions (opcode group) stored in the program memory 170 by the CPU 110 will be described.

First, P for instructing the reading of the opcode
When the RD signal 141 becomes active "1", the CPU1
10 reads out the operation code of the address indicated by the PC 150 from the program memory 170 via the address / data bus 180 and stores it in the instruction storage register IR130. At this time, the PC 150 adds +1 by the PRD signal 141.
Incremented. Next, since the operation code stored in the IR 130 is input to the timing signal generation circuit 140, the timing signal generation circuit 140 decodes the operation code to generate a signal for controlling the operation of each unit in the microcomputer 100 and execute the instruction. To start. After that, when the read operation is performed by the number of opcodes forming the sequential instruction and the execution of one instruction is completed, the timing signal generation circuit 140 sets the PRD signal 142, which is the instruction execution end timing, to active “1”. , PRD signal 141 is activated to "1", and the operation of reading the operation code is performed for the execution of the next instruction. The above operation is the operation of reading and executing the operation code in one instruction, and thereafter, the same operation is sequentially continued.

Next, the operation of the microcomputer 100 when measuring the program execution time will be described with reference to FIG.

FIG. 3 is a timing chart for explaining the operation of the execution time measuring circuit shown in FIG. As shown in FIG. 3, the execution time measuring circuit 160 first detects the CPU 110.
C measures the start address and end address of the program to be measured before measuring the program execution time.
It is stored in the MS 161 and the CME 162. Here, the measured program is a program that starts with instruction 1 and ends with instruction N, and its start address is 0100H (H
Indicates hexadecimal notation) and end address is 0200H
Will be described.

First, when the PC 150 becomes 0100H, it matches the stored value 0100H of the CMS 161.
The coincidence signal EQS becomes active "1". At this time, E
QS is "1" and the PRD signal 141 is "0"
Since the output of the gate G7 is "1" at
The output of 8 becomes "1". Therefore, TM165 is cleared to zero. Further, since the PC 150 always indicates the address of the next instruction to be executed, the instruction at address 0100H has not been read from the program memory 170 at this point, and the instructions up to 00FFH have been executed.

Next, the PRD signal 141 is active "
When it becomes 1 ", the operation code at address 0100 is read from the program memory 170 and decoded by the timing signal generation circuit 140 via IR0130, so that the instruction execution is started. At this time, EQS is already" 1 ". Therefore, the output of the gate G1 becomes “1.” Since the EQE is “0”, the gate G6 becomes “1”.
Since the output of G1 becomes "1" and the output of G1 becomes "1", the output of the gate G2 becomes "1".
Is reset to "0" and the F / F 164 is set to "1". Furthermore, when G8 becomes "0", TM
The clear operation for 165 is canceled, and the gate G5
Output becomes active "1" every clock φ,
TM165 is 0000H to 0001H, 0002H,
, The increment operation of +1 is started. In this embodiment, the PRD signal 141 is active “1”.
Is the start timing of the instruction.

Next, the PC 150 is incremented to 0.
Since it becomes 101H, the coincidence signal EQS of the CMS 161
Are inconsistent and become inactive "0". Further, when the PRD signal 141 becomes active "1", P
Since the operation code of 0101H indicated by C150 is read from the program memory 170 and is decoded by the timing signal generation circuit 140 via the IR 130, the instruction execution operation is further performed. At this time, since EQS is already "0", the gates G1 to G7 and the F / Fs 163, 16 are
4 is not changed. Note that the instruction that is being executed first is an instruction consisting of two opcodes at addresses 0100H and 0100H, and this is called instruction 1.

When the execution of the instruction 1 is completed, the timing generation circuit 140 activates the PEND signal 142 indicating the completion timing of the instruction execution to "1" and activates the PRD signal 141 to read the next instruction 2. The operation code is set to "1" and the operation code at address 0102H is read. Hereinafter, the same operation is sequentially continued, and the TM 165 continues the increment operation.

Further, when the instruction execution progresses and the PC 150 becomes 0200H, the CME 162 causes the coincidence signal EQ.
E is set to active "1". At this point still 01
Instruction N-1 up to FFH has been executed. Then 02
PRD signal 141 to read the operation code of 00H
Becomes active "1", EQE is "1", the output of the gate G3 becomes "1", and the F / F163
Is set to "1". At this time, at the same time, the instruction N-1
PEND signal 142 indicating the end of execution of
Although it becomes 1 ", since G6 is" 0 ", the gate G
4 remains "0". It is assumed that one opcode of 0200H constitutes the instruction N.

Next, PE indicating the end timing of the instruction N
When the ND signal 142 becomes active "1", F / F1
Since 63 is "1" and G6 is "0", the gate G4 becomes "1" and the F / F 164 is reset to "0". After that, since the gate G5 is always "0", the increment operation of the TM165 is stopped.

By the above operation, the start address and end address of the program are set in advance, and the increment operation of the timer is performed from the start to the end time of the program, whereby the execution time of the program can be measured. After this,
By reading the value of TM165, the CPU 110 can know the execution time of the program to be measured from the read value and the clock φ.

The start and end addresses of the CMS 161 and CME 162 may be set at any time before execution of the measured program. Therefore, it does not affect the environment at the time of execution of the measured program. further,
If the start and end addresses of the program to be measured set in the compare registers CMS161 and CME162 are the same, it is possible to measure the execution time of an instruction consisting of at least one opcode. It can be used as a means for selecting an instruction having a short execution time. In this embodiment, the address and data stored in the PC 150 and the TM 165 are set to 4
The hexadecimal number of digits (that is, 16 bits) is shown, but the present invention is not limited to this.

FIG. 4 is a block diagram of a microcomputer showing a second embodiment of the present invention, and FIG. 5 is a block diagram of the execution time measuring circuit shown in FIG. As shown in FIGS. 4 and 5, in this embodiment, a flag 166 for permitting the execution time measuring circuit 160 described in the first embodiment to clear the TM 165, an output of the flag 166, and a gate G8. The execution time measuring circuit 160a is used in which an AND element G9 that generates a clear signal for the TM165 from the output is newly added. The rest of the configuration and operation are the same as those described in the first embodiment, so description thereof will be omitted here.

In this embodiment, when the program to be measured in the first embodiment is started, EQS is "1" and the gate G8 is set.
Is changed to "1", the clear operation for the TM165, which was performed, is changed. That is, the flag 166
When "1" is set, the clear operation for the TM165 at the start of the program is permitted, and the TM165 is cleared when the gate G9 becomes "1". Further, the flag 166 is set to "1".
When it is set to "0", the clear operation for the TM168 at the start of the program is prohibited, and even if the gate G8 becomes "1", the gate 9 becomes "0" so that the clear operation for the TM165 is not performed.

This makes it possible to totalize the execution times of a plurality of programs when measuring the execution times of the programs. An example of its use is shown below in FIG.
A description will be given using (a) and (b).

FIGS. 6A and 6B are flow charts for explaining the operation of the execution time measuring circuit and the internal timer (TM) shown in FIG. 5, respectively. Figures (a), (b)
In the execution time measurement time 160a, first, the start address and the end address are set in the CMS 161 and the CME 162 before the execution of the first measurement program is started. At this time, the flag 166 is set to "1". Keep it. Therefore, when the first measurement program is started, the TM16
5 is cleared and the increment operation is started from the timer value 0000H.

Next, after the execution of the first measurement program is completed, the start address and end address of the second measurement program are set in CMS 161 and CME 162. At this time, the flag 166 is set to "0". Therefore, the TM 165 is not cleared at the start of execution of the second measurement program, and the increment is started from the timer value at the end of execution of the first measurement program.

The same applies to the case of measuring the measurement programs after the third measurement program, but the flag 166 is used.
Does not set "0" and sets the flag 166 again.
Since the TM 165 continuously performs the increment operation until it is set to "1", the total execution time from the program 1 to the program N can be measured.

[0037]

As described above, the microcomputer of the present invention, when measuring the execution time of the program,
A start address and an end address of the program are set in the compare register of the execution time measurement circuit, and a match signal generated based on a constant comparison operation with the program counter (PC) and a read instruction signal of an instruction generated by the timing signal generation circuit And the instruction execution end signal directly increments the dedicated timer within the program execution time and reads the timer after the program execution is finished to measure the program execution time. Since the operation before and after execution of is not included at all, there is an effect that the execution time of the program can be measured extremely accurately.

Further, since all the measuring operations in the microcomputer of the present invention are performed by dedicated hardware, there is no influence on the operations of the CPU and peripheral hardware used in the program to be measured, and There is an effect that the execution time can be measured while maintaining the original environment in which the measured program was to be executed.

Further, according to the present invention, the clearing / non-clearing of the timer at the start of the program can be designated by designating the flag for controlling the clearing operation of the timer for measuring the execution time. The effect is that the execution time can also be measured.

[Brief description of drawings]

FIG. 1 is a block diagram of a microcomputer showing a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an execution time measuring circuit shown in FIG.

FIG. 3 is a timing chart for explaining the operation of the execution time measuring circuit shown in FIG.

FIG. 4 is a block diagram of a microcomputer showing a second embodiment of the present invention.

5 is a configuration diagram of an execution time measuring circuit shown in FIG.

FIG. 6 is a flowchart for explaining the operation of the execution time measuring circuit shown in FIG. 5 and a timer therein.

[Explanation of symbols]

 100 Microcomputer 110 CPU 120 Address / Data Bus Control Circuit 130 Instruction Storage Register (IR) 140 Timing Signal Generation Circuit 141 Instruction Read Instruction Signal 142 Instruction Execution End Signal 150 Program Counter (PC) 160, 160a Execution Time Measurement Circuit 161, 162 compare register 163, 164 flip-flop 165 timer (TM) 166 timer clear enable flag 170 program memory 180 address / data bus EQS, EQE coincidence signal G1 to G5, G8, G9 AND element G6, G7 inversion element

Claims (1)

[Claims] 1. A program memory for storing a program, a program counter for indicating an execution address of an instruction, an instruction storage register for storing an instruction to be executed, and a timing signal for decoding various contents of the instruction storage register to generate various timing signals. A central processing unit having a generation circuit; and a program execution time measurement circuit for measuring the execution time of a predetermined program based on the timing signals output from the program counter and the timing signal generation circuit. The circuit is executed from an execution start time of the measured program based on an address storage unit that stores start and end addresses of the measured program, a timing signal output from the program counter, the address storage unit, and the timing signal generation circuit. A microcomputer comprising: a measuring unit that measures up to an end time, and the execution time of the measured program is measured by setting a start address and an end address of the measured program in the address storage unit.