JPS60209853A - Measuring device of program execution time - Google Patents

Measuring device of program execution time

Info

Publication number
JPS60209853A
JPS60209853A JP59066150A JP6615084A JPS60209853A JP S60209853 A JPS60209853 A JP S60209853A JP 59066150 A JP59066150 A JP 59066150A JP 6615084 A JP6615084 A JP 6615084A JP S60209853 A JPS60209853 A JP S60209853A
Authority
JP
Japan
Prior art keywords
execution time
program
program counter
address
timer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59066150A
Other languages
Japanese (ja)
Inventor
Yukio Imai
今井 幸夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59066150A priority Critical patent/JPS60209853A/en
Publication of JPS60209853A publication Critical patent/JPS60209853A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To measure a program execution time on a basis of a timer and the result of comparison by comparing the address in a program counter of an electronic computer with the address designated from an operation panel. CONSTITUTION:When a program 12 is executed, contents of a program counter 11 are updated successively. Contents of the program counter 11 are compared with the measurement start address and the measurement end address of the execution time, which are inputted from an operation panel 14, by a program counter comparing circuit 15. As the result, if contents of the program counter 11 coincide with the measurement start address of the execution time, a measurement start signal is sent to an execution time arithmetic circuit 16, and a time T1 is read from a timer 17. The program execution is advanced; and when contents of the program counter 11 coincide with the measurement end address as the comparison result, a measurement end signal is sent to the arithmetic circuit 16, and a time T2 is read from the timer. Thus, an execution time T is calculated in accordance with equation T=T2-T1.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明はプログラムの実行時間の計測装置に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a device for measuring program execution time.

〔従来技術〕[Prior art]

第1図は従来のプログラム実行時間計測のプログラムの
フローチャートラ示す図である。図において、プログラ
ムがスタートするとステップ(1)で時間T1 の測定
が行なわれステップ(2)の処理A。
FIG. 1 is a flowchart of a conventional program execution time measurement program. In the figure, when the program starts, time T1 is measured in step (1) and processing A is performed in step (2).

ステップ(3)の処理Bが実行された後、ステップ(4
)で時間T2 の測定が行なわれる。次にステップ(5
)ではステップ(1)とステップ(4)で測定された時
間T1 およびT2 からプログラム実行時間Tが計算
される。
After step (3) process B is executed, step (4)
) at time T2. Next step (5
), the program execution time T is calculated from the times T1 and T2 measured in steps (1) and (4).

T = T2− ’r1 ・・・(1)Tニブログラム
実行時間 T1:計測開始時間 T2:計測終了時間 従来のプログラム実行時間計測は以上のように構成され
ているため、ステップ(2)の処理のみ計測したい場合
はステップ(2)の後でステップ(41,+51−実行
するようにプログラムを変更することが必要でまた任意
の間の実行時間を計測しようとすると。
T = T2 - 'r1 ... (1) Tniprogram execution time T1: Measurement start time T2: Measurement end time Since the conventional program execution time measurement is configured as described above, only the process of step (2) is performed. If you want to measure it, you need to change the program to execute step (41, +51-) after step (2), and if you want to measure the execution time during an arbitrary period.

そのつどプロクラムを変更しなければならない欠点があ
った。
The drawback was that the program had to be changed each time.

〔発明の概要〕[Summary of the invention]

この発明はかかる欠点を改善するためになされたもので
あり、 1JA、子計算機のブロクラムカウンタのアド
レスと操作パネルより指定されるアドレス全比較し比較
結果とタイマを用いてプログラム実行時間音計測するも
のである。
This invention was made in order to improve such drawbacks. 1JA, the address of the block counter of the slave computer is compared with all the addresses specified from the operation panel, and the program execution time is measured using the comparison result and a timer. It is something.

〔発明の実施例〕[Embodiments of the invention]

以下第2図に示すこの発明の一実施例について説明する
。第2図においてαOは電子計算機、Uはプログラムカ
ウンタ、a2はプログラム、 Q31はプログラムカウ
ンタ入力回路、 (+41は操作パネル、aSはプログ
ラムカウンタ比較回路、μeは実行時間演算回路、α力
はタイマ、α秒はD / A変換器、(I9はアナログ
データ出力機器である。
An embodiment of the present invention shown in FIG. 2 will be described below. In Figure 2, αO is an electronic computer, U is a program counter, a2 is a program, Q31 is a program counter input circuit, (+41 is an operation panel, aS is a program counter comparison circuit, μe is an execution time calculation circuit, α power is a timer, α seconds is a D/A converter, (I9 is an analog data output device.

プログラムO2の実行に先立ち操作パネルよりプログラ
ムa邊の中で実行時間計側に必要な実行時間計測開始ア
ドレスと終了アドレスを指定する。入力されたアドレス
はプログラムカウンタ比較回路(161に保持される。
Prior to the execution of program O2, the necessary execution time measurement start address and end address are specified on the execution time meter side in program a from the operation panel. The input address is held in the program counter comparison circuit (161).

電子計算機(1(lのプログラムttaはプログラムカ
ウンタIによって実行が管理される。これは一つの命令
の実行ごとに1が加えられ9次に実行すべき命4Pヲ示
し、またジャンプ命命のときは、この内容を入れ換えて
ジャンプ先のアドレスを示すなどによりプログラムの進
行全管理するものである。
Execution of the program tta of an electronic computer (1 (l) is managed by a program counter I. This is incremented by 1 every time one instruction is executed, and indicates the next instruction 4P to be executed. Also, in the case of a jump instruction, is used to manage the entire progress of the program by replacing this content and indicating the jump destination address.

プログラムα2が実行されると、プログラムカウンタ(
111は上記プロクラムQ3の内容にしたがって逐次更
新される。上記プログラムカウンタ(3)の内容は、プ
ログラムカウンタ入力回路0によって入力されプログラ
ムカウンタ比較回路Iで、操作パネルα6より入力され
た実行時間計測開始アドレス。
When program α2 is executed, the program counter (
111 is updated sequentially according to the contents of the program Q3. The contents of the program counter (3) are the execution time measurement start address input by the program counter input circuit 0 and input by the program counter comparison circuit I from the operation panel α6.

実行時間計測終了アドレスと比較される。上記プログラ
ムカウンタにおいて、プログラムカウンタ入力回路0で
入力されたアドレスと操作パネルIから入力嘔れた実行
時間計測開始アドレスとを比較し等しい場合は計測開始
信号を実行時間演算回路ueK送る。
It is compared with the execution time measurement end address. In the program counter, the address input at the program counter input circuit 0 and the execution time measurement start address input from the operation panel I are compared, and if they are equal, a measurement start signal is sent to the execution time calculation circuit ueK.

この信号により、実行時間演算回路(Ieはタイマ(8
)より時間T1を読み保持する。また、プログラム(I
7Jの実行が進み、プログラムカウンタ入力回路Q31
で入力されたアドレスが操作パネルIから入力された実
行時間計測終了アドレスと比較式れ等しい場合は、計測
終了1g号を実行時間演算回路(lGK送る。この信号
により実行時間演算回路(161はタイマα力より時間
T2 k読み保持するとともに先の計測開始時間T1 
とからブロクラム実行時間Tを計算する。
This signal causes the execution time calculation circuit (Ie is a timer (8
), read and hold the time T1. In addition, the program (I
7J progresses and the program counter input circuit Q31
If the address input in is equal to the execution time measurement end address input from the operation panel I, the measurement end number 1g is sent to the execution time calculation circuit (lGK).This signal causes the execution time calculation circuit (161 is a timer From α force, time T2 k reading is held and previous measurement start time T1
The block execution time T is calculated from .

T = T2−Ti Tニブログラム実行時間 T1:実行時間計測開始時間 T2:実行時間計測終了時間 計算はれたプログラム実行時間TはD / A変換器0
秒に送られアナログ信号に変換されて、アナログデータ
出力機器α9例えばペンレコーダ匠出力される。
T = T2 - Ti T Program execution time T1: Execution time measurement start time T2: Execution time measurement end time calculation The calculated program execution time T is D/A converter 0
The signal is sent in seconds, converted into an analog signal, and outputted from an analog data output device α9, for example, a pen recorder.

〔発明の効果〕〔Effect of the invention〕

以上のようKこの発明によれば、操作パネルより実行時
間計測したい任意の玉量を指定できるため、プログラム
を変更することなく、プログラムの実行時間の計測がで
きる。また、プログラム実行時間がアナログデータとし
て出力できるため。
As described above, according to the present invention, since it is possible to specify an arbitrary amount of balls for which the execution time is to be measured from the operation panel, the execution time of the program can be measured without changing the program. Also, the program execution time can be output as analog data.

リアルタイムシステムのプロクラムの場合に各状態にお
ける実行時間を連続的に見ることができる。
In the case of a real-time system program, the execution time in each state can be viewed continuously.

【図面の簡単な説明】[Brief explanation of drawings]

第1し1は、従来のプログラム実行時間計測のフローチ
ャートを示す図、第2図はこの発明の一実施例を示す図
である。 図において(1)〜(5)はプロクラムの各ステップ。 αGは電子計算機、 +Illはプログラムカウンタ、
(I3はプログラム、αJはプログラムカウンタ入力回
路。 Iは操作パネル、aSはブロクラムカウンタ比較回路、
 (161は実行時間演算回路、 (171はタイマ、
aSはD / A変換器、α9はアナログデータ出力機
器である。 代理人大岩増雄
1 is a diagram showing a flowchart of conventional program execution time measurement, and FIG. 2 is a diagram showing an embodiment of the present invention. In the figure, (1) to (5) are each step of the program. αG is an electronic computer, +Ill is a program counter,
(I3 is the program, αJ is the program counter input circuit. I is the operation panel, aS is the block diagram counter comparison circuit,
(161 is an execution time calculation circuit, (171 is a timer,
aS is a D/A converter, and α9 is an analog data output device. Agent Masuo Oiwa

Claims (1)

【特許請求の範囲】[Claims] 電子計n機のプログラムカウンタを読み込むプログラム
カウンタ入力回路と、プログラム実行時間計測開始アド
レスと終了アドレスを入力する操作パネルと、上記プロ
クラムカウンタ入力(ロ)路から入力されたアドレスと
上記操作パネルから入力されたアドレスを比較するプロ
クラムカウンタ比較回路と、タイマと、上記プロクラム
カウンタ比較回路からの信号と、上記タイマの設定時間
からブロクラム実行時間全割算する実行時間演算回路と
、上記実行時間演算回路の演算結果をアナロク出力する
ためのD / A変換器を備えたこと全特徴とするプロ
グラム実行時間計測装置。
A program counter input circuit that reads the program counter of the electronic meter, an operation panel that inputs the program execution time measurement start address and end address, and an address input from the program counter input (b) path and input from the operation panel. a program counter comparison circuit that compares the programmed addresses; a timer; a signal from the program counter comparison circuit; an execution time arithmetic circuit that divides the total program execution time from the set time of the timer; A program execution time measuring device characterized by being equipped with a D/A converter for analog output of calculation results.
JP59066150A 1984-04-03 1984-04-03 Measuring device of program execution time Pending JPS60209853A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59066150A JPS60209853A (en) 1984-04-03 1984-04-03 Measuring device of program execution time

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59066150A JPS60209853A (en) 1984-04-03 1984-04-03 Measuring device of program execution time

Publications (1)

Publication Number Publication Date
JPS60209853A true JPS60209853A (en) 1985-10-22

Family

ID=13307548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59066150A Pending JPS60209853A (en) 1984-04-03 1984-04-03 Measuring device of program execution time

Country Status (1)

Country Link
JP (1) JPS60209853A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03201044A (en) * 1989-12-27 1991-09-02 Matsushita Electric Ind Co Ltd Method and device for measurement of software performance

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03201044A (en) * 1989-12-27 1991-09-02 Matsushita Electric Ind Co Ltd Method and device for measurement of software performance

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