JPS63173660A - Driving circuit for thermal head - Google Patents
Driving circuit for thermal headInfo
- Publication number
- JPS63173660A JPS63173660A JP62006531A JP653187A JPS63173660A JP S63173660 A JPS63173660 A JP S63173660A JP 62006531 A JP62006531 A JP 62006531A JP 653187 A JP653187 A JP 653187A JP S63173660 A JPS63173660 A JP S63173660A
- Authority
- JP
- Japan
- Prior art keywords
- elements
- heat generating
- block
- thermal head
- generating elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010438 heat treatment Methods 0.000 claims description 22
- 230000002349 favourable effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- 230000020169 heat generation Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/315—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
- B41J2/32—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
- B41J2/35—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads providing current or voltage to the thermal head
- B41J2/355—Control circuits for heating-element selection
- B41J2/3551—Block driving
Landscapes
- Electronic Switches (AREA)
Abstract
Description
【発明の詳細な説明】
イ)産業上の利用分野
本発明は複数の発熱素子が一列に配されたサーマルヘッ
ドの駆動回路に関する。DETAILED DESCRIPTION OF THE INVENTION A) Industrial Application Field The present invention relates to a drive circuit for a thermal head in which a plurality of heating elements are arranged in a row.
(ロ)従来の技術 第3図はこの種サーマルヘッドの典型例を示す。(b) Conventional technology FIG. 3 shows a typical example of this type of thermal head.
例えば512ドツトからなる発熱素子(ml)〜(”s
12)が均等間隔で一列に配されている。これら発熱
素子(ml)〜(m512)の各々には512個のアン
ドゲート(A1)〜(As 12 )が対応付けられて
いる。For example, a heating element (ml) consisting of 512 dots ~ ("s
12) are arranged in a line at equal intervals. 512 AND gates (A1) to (As 12 ) are associated with each of these heating elements (ml) to (m512).
512ビツトから成るシフトレジスタ(SR)及びラッ
チ回M(LA)は、各1ビツトづつアントゲ−)(A1
)〜(As 12 )に対応して配されている。The shift register (SR) and the latch circuit M (LA) each consisting of 512 bits are divided into an ant game (A1
) to (As 12 ).
512ビツトの記録データDはクロクク信号CLKに応
じてシフトレジスタ(SR)にシリアルに入力された後
、ラッチ信号りによりう乍チ回路(LA)に転送される
。The 512-bit recording data D is serially input to the shift register (SR) in response to the clock signal CLK, and then transferred to the latch circuit (LA) in response to the latch signal.
第1、第2、第3及び第4ストローブ信号STする。従
って、第1〜第4ストローブ信号ST1〜ST4が順次
出力されると、アントゲ−)(A1)〜(A512)は
、順次連続する128個づつが駆動され、発熱素子(m
l)〜(mslz)にラッチ回路(LA) (D内容4
C15答して通電パルスが印加される。First, second, third and fourth strobe signals ST. Therefore, when the first to fourth strobe signals ST1 to ST4 are sequentially output, 128 successive heat generating elements (m
l) ~ (mslz) latch circuit (LA) (D content 4
In response to C15, an energizing pulse is applied.
即ち、第1〜第4ストローブ信号ST1〜ST4△ロッ
ク及び素子(m3as)〜Cm512)の第4ブロック
の各128ドツトの4つのブロックに分割して駆動され
る。That is, the first to fourth strobe signals ST1 to ST4Δlock and the fourth block of elements (m3as) to Cm512) are divided into four blocks of 128 dots each and driven.
このようにして分割駆動を行なうことにより、サーマル
ヘッドへの供給′@源の小型化を図ると共に、サーマル
ヘッドの異常な蓄熱を防止している。By performing divided driving in this manner, the supply source to the thermal head can be made smaller, and abnormal heat accumulation in the thermal head can be prevented.
(ハ)発明が解決しようとする問題点
ところで、上述の如き駆動方法によって発熱素子の配設
方向に全黒の情報を記録した場合、上記各ブロック間の
境界部分の記録濃度が、その他の部分のそれより非常に
低くなってしまう。これは各ブロックの内部に位置する
発熱素子は、夫々自身の発熱に加えて両隣りからの発熱
の影響を受けるため高温となるが、各ブロックの端の発
熱索子(例えば、第3図中の発熱索子(71tn)(ガ
129)等)は、一方の隣りからの発熱の影響しか受け
ないので、各ブロックの内部に位置する発熱素子の温度
に比して低温となるためと考えられる。(c) Problems to be Solved by the Invention By the way, when all black information is recorded in the direction in which the heat generating elements are arranged by the driving method as described above, the recording density at the boundary between the blocks is different from that at the other parts. It will be much lower than that of . This is because the heating elements located inside each block reach a high temperature because they are affected by heat generation from both sides in addition to their own heat generation, but the heating element at the end of each block (for example, This is thought to be because the heating cord (71tn) (ga 129), etc.) is only affected by heat generation from one neighbor, so the temperature is lower than that of the heating element located inside each block. .
斯る欠点を解消すべく、特開昭60−132771号公
報によれば、各ブロック間の境界位置の発熱素子に印加
する通電パルスの長さを、その他の発熱素子をこ印加す
るものより長くし、これにより上述の如きブロック間の
境界部分の記録濃度の低下を防止している。In order to eliminate this drawback, according to Japanese Patent Application Laid-Open No. 60-132771, the length of the energizing pulse applied to the heating element at the boundary between each block is longer than that applied to other heating elements. However, this prevents the recording density from decreasing at the boundary between blocks as described above.
しかし乍ら、斯る駆動では、一部分の記録を行なうに際
して複数種の通電パルスを選択的に使い分けなければな
らず、駆動回路が複雑となる。However, in such driving, a plurality of types of energizing pulses must be selectively used when recording a portion, which makes the driving circuit complicated.
に)問題点を解決するための手段
本発明によるサーマルヘッドの駆動回路は、一列に配さ
れたfnl 、 012 、・・・、mlのM個の発熱
素子を(fnl 、 1nH+1 、 n12)141
、 In(1(−1+1 〕) 、 (fn2 。2) Means for Solving the Problems The thermal head drive circuit according to the present invention has M heating elements of fnl, 012, . . . , ml arranged in a row (fnl, 1nH+1, n12)141
, In(1(-1+1)), (fn2.
”)l+2 m ”” e −(M−11+2.))
I−e (ms + m2)11 ・・’ ttnm)
のN個のブロックに分割して結線したサーマルヘッドト
、該サーマルヘラトラ上記フロック毎に順次駆動する駆
動制御回路とを備えたことを特徴とする。”)l+2 m ””e −(M-11+2.))
I-e (ms + m2)11...' ttnm)
The present invention is characterized by comprising a thermal head which is divided into N blocks and wired together, and a drive control circuit which sequentially drives the thermal head for each of the blocks.
(ホ)作用
本発明によれば、一列に配されたM個の発熱素子が離散
状態となるようにブロック化されて駆動されるので、全
ての発熱素子が他の発熱素子からの影響を受けることな
く同一状態で発熱駆動され(へ)実施例
第1図は本発明の一実施例を示すブロック図である。サ
ーマルヘッド(1)に設けられた512ドツトからなる
発熱素子(ml)〜(m512)は均等間隔で配されて
おり、これら発熱素子(ml)〜(ms 12 )の各
々には512個のアンドゲート(A1)〜(A512)
が対応付けられている。更に、512ビツトからなるシ
フトレジスタ(SR)及びラッチ回路(LA)が1ビツ
トづつアンドゲート(A1)〜(A512)に対応付け
られて配されている。(E) Effect According to the present invention, since the M heating elements arranged in a row are driven in blocks so as to be in a discrete state, all the heating elements are influenced by other heating elements. Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention. The heating elements (ml) to (m512) consisting of 512 dots provided on the thermal head (1) are arranged at equal intervals, and each of these heating elements (ml) to (ms12) has 512 ANDs. Gate (A1) ~ (A512)
are associated. Further, a shift register (SR) and a latch circuit (LA) each consisting of 512 bits are arranged in correspondence with each bit of AND gates (A1) to (A512).
駆動制御回路(2)から発せられる第1、第2、第3及
び第4ストローブ信号ST1.ST2.Sr3及びSr
1は、夫々アンドゲート(A1)〜(As1z)を4つ
$きに128個づつ制御している。従って、第1〜第4
ストローブ信号STI〜ST4が順次出力されると、各
ストローブ信号に対応する128個のアンドゲートが順
次駆動され、512ドツトの発熱素子(ml)〜(”5
12)は、素子(ml ) w (ms ) s ”’
? ) e・・・(m509 )の第1ブロツク、素子
(ni2) e (m6) # (”10J、・・・+
(−51o)の第2ブロツク、素子(rns) t
(my) +(m11.・・・、(msll)の第3ブ
ロツク、素子(m4) * (”a )*(m12)s
・・・e(−s12)の第4ブロツクの4つおきの各1
28ドツトづつの4つのブロックに分割されて駆動され
ることとなる。First, second, third and fourth strobe signals ST1. ST2. Sr3 and Sr
1 controls 128 AND gates (A1) to (As1z) for every four dollars. Therefore, the first to fourth
When strobe signals STI to ST4 are sequentially output, 128 AND gates corresponding to each strobe signal are sequentially driven, and 512 dot heating elements (ml) to ("5
12) is the element (ml) w (ms) s''
? ) e...(m509) first block, element (ni2) e (m6) # ("10J,...+
(-51o) second block, element (rns) t
(my) + (m11...., 3rd block of (msll), element (m4) * ("a) * (m12)s
...Each 4th block of the 4th block of e(-s12)
It is divided into four blocks of 28 dots each and driven.
なお、512ビツトの記録データDはクロック信号CL
Kに応じてシフトレジスタ(SR)にシリアルに入力さ
れた後、ラッチ信号りによりラッチ回路(LA)に転送
される。Note that the 512-bit recording data D is clock signal CL.
After being serially input to the shift register (SR) according to the signal K, the signal is transferred to the latch circuit (LA) by the latch signal.
第2図は本発明の一実施例の動作を示すタイミング図で
ある。FIG. 2 is a timing diagram showing the operation of one embodiment of the present invention.
まず、512ビツトからなる記録データDがクロック信
号CLKに基いてシフトレジスタ(SR)に書き込まれ
る。その後、ラッチ信号りによりラッチ回路(LA)に
転送される。First, recording data D consisting of 512 bits is written into the shift register (SR) based on the clock signal CLK. Thereafter, the data is transferred to the latch circuit (LA) by the latch signal.
そして、駆動制御回路(2)は順に第1、第2、第3及
び第4ストローブ信号STI、ST2.ST!i及びS
r1を出力する。これにより、512ドツトの発熱素子
(ml)〜(”512)は、4つおきの128ドツトづ
つの第1、第2、第3及び第4ブロツクに分割されて駆
動される。The drive control circuit (2) then sequentially sends first, second, third and fourth strobe signals STI, ST2 . ST! i and S
Output r1. As a result, the 512 dot heating elements (ml) to ("512) are divided into first, second, third and fourth blocks of 128 dots every fourth and driven.
なお、発熱素子の分割数は上記実施例に限らず任意に決
定される。Note that the number of divisions of the heating element is not limited to the above embodiments, and can be determined arbitrarily.
(ト)発明の効果
本発明によれば、一列に配された複数の発熱素子は、離
散状態の複数のブロックに分割されて駆動されるので、
全ての発熱素子の発熱温度が均一となり、濃度むらの発
生を防止することができる。(G) Effects of the Invention According to the present invention, a plurality of heating elements arranged in a line are divided into a plurality of blocks in a discrete state and driven.
The heat generation temperature of all the heating elements becomes uniform, and the occurrence of density unevenness can be prevented.
第1図は本発明の一実施例を示すブロック図、第2図は
その動作を説明するタイミング図、第3図は従来例のサ
ーマルヘッドの構成を示すブロック図である。
(11・・・サーマルヘラI’、(ml)〜(m512
)・・・発熱素子、(2)・・・駆動制御回路。FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a timing diagram explaining its operation, and FIG. 3 is a block diagram showing the configuration of a conventional thermal head. (11... Thermal spatula I', (ml) ~ (m512
)...heating element, (2)...drive control circuit.
Claims (1)
発熱素子を(m_1、m_N_+_1、m_2_N_+
_1、…、m_(_M_−_N_+_1_))(m_2
、m_N_+_2、…、m_(_M_−_N_+_2_
))、…、(m_N、m_2_N、…、m_M)のN個
のブロックに分割して結線したサーマルヘッドと、該サ
ーマルヘッドを上記ブロック毎に順次駆動する駆動制御
回路とを備えたことを特徴とするサーマルヘッドの駆動
回路。(1) m_1, m_2, ..., m_M heating elements arranged in a row (m_1, m_N_+_1, m_2_N_+
_1, ..., m_(_M_-_N_+_1_))(m_2
, m_N_+_2, ..., m_(_M_-_N_+_2_
)), . Thermal head drive circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62006531A JPS63173660A (en) | 1987-01-14 | 1987-01-14 | Driving circuit for thermal head |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62006531A JPS63173660A (en) | 1987-01-14 | 1987-01-14 | Driving circuit for thermal head |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63173660A true JPS63173660A (en) | 1988-07-18 |
Family
ID=11640937
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62006531A Pending JPS63173660A (en) | 1987-01-14 | 1987-01-14 | Driving circuit for thermal head |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63173660A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0230564A (en) * | 1988-07-21 | 1990-01-31 | Casio Comput Co Ltd | Printer |
US5075701A (en) * | 1990-07-17 | 1991-12-24 | Matsushita Electric Industrial Co., Ltd. | Thermal recording head having group-wise actuable heating elements |
WO1995017308A1 (en) * | 1993-12-23 | 1995-06-29 | Intermec Corporation | Method of controlling a thermal printhead |
-
1987
- 1987-01-14 JP JP62006531A patent/JPS63173660A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0230564A (en) * | 1988-07-21 | 1990-01-31 | Casio Comput Co Ltd | Printer |
US5075701A (en) * | 1990-07-17 | 1991-12-24 | Matsushita Electric Industrial Co., Ltd. | Thermal recording head having group-wise actuable heating elements |
WO1995017308A1 (en) * | 1993-12-23 | 1995-06-29 | Intermec Corporation | Method of controlling a thermal printhead |
US5548688A (en) * | 1993-12-23 | 1996-08-20 | Intermec Corporation | Method of data handling and activating thermal print elements in a thermal printhead |
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