JPS63169034A - Semiconductor device assembling apparatus - Google Patents

Abstract

PURPOSE:To accurately position the electrodes of a semiconductor chip to electrode sections formed on a substrate by positioning the electrodes of the chip to the sections on the basis of an image sensed by the infrared light reflected from the chip or the substrate. CONSTITUTION:After the electrodes 6 of a semiconductor chip 5 are opposed to the electrode sections 3 of a substrate 1 to be roughly positioned, the infrared light from an illuminator 14 is irradiated to the chip 5 and the substrate 1. If part of the chip 5, i.e., a chip body 7 is formed of a material mainly containing silicon, the light is transmitted through the body 7, and reflected by the predetermined part of the chip 5 or the substrate 1, the electrodes 6 of the chip or the electrode sections 3 of the substrate to be incident to an image sensor 15. The electrodes 6 of the chip are positioned to the electrodes 3 formed on the substrate 1 by positioning means on the basis of the sensed image. Thus, an accurate positioning can be performed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device assembly apparatus for mounting a semiconductor chip on which electrodes are formed by overlapping it on a lead frame on a substrate.

[Conventional technology]

Since IK, when assembling semiconductor devices, after the semiconductor chip is tie-bonded to the substrate, each electrode of the semiconductor chip and the lead frame on the substrate are individually connected using A1 wire or Au wire. It has been known.

By the way, a small and low = 1 stroke camera, 'Y+rl,
In order to realize molds, etc., each component of the electronic circuit, that is, the semiconductor device, mounted in these must be small and thin. Furthermore, in order to commercialize conductor devices at a low cost, it is necessary to shorten the time required to assemble the conductor devices. In the above-mentioned wire bonding, each electrode of the semiconductor chip and the lead frame on the substrate are connected with wires, and this 1g connection work is performed separately for each electrode, so it is possible to miniaturize the semiconductor device and improve assembly. rThere is a limit to how much work time can be shortened.

For this reason, a semiconductor device assembly apparatus has been developed in which the lead frame on the substrate and each electrode of the semiconductor chip are faced to each other and directly bonded using predetermined bumps, without using wires such as AJL wires or Au wires. .

FIGS. 9(a) and 9(b) are plan views, respectively, of a substrate and a semiconductor chip to be bonded by this type of semiconductor device assembly apparatus. Note that in FIG. 9(b), the surface of the semiconductor chip 5 facing the substrate 1 is shown.

In FIG. 9(a), the substrate 1 is a ceramic substrate of, for example, a hybrid IC. A metal pattern 2 as a lead frame is formed on the substrate 1, and an electrode portion 3 to which the main FD 26 of the semiconductor chip 5 is to be bonded is provided at the tip of the km pattern 2.

The chip body 7 of the semiconductor chip 5 is mainly made of silicon, and includes, for example, an intrinsic silicon semiconductor, a P-type silicon semiconductor doped with a p-type impurity such as boron, and a silicon semiconductor doped with a mouth-type impurity such as arsenic. The electrode 6 is made of A1 metal or A1 type silicon semiconductor.
u Made of metal.

FIG. 10 shows that the electrode part 3 of the substrate 1 and the lamp 6 of the r-conductor chip 5 as shown in FIGS. 1.71 to find out the answer to the question ``Jj'', and Figure 10(a) shows the answer ``4Jj!'' FIG. 10(b) is a diagram showing the state before adhesion, and FIG. 10(b) is a diagram showing the state after the electrode 12 is attached. Note that the first
01A (a), (b), Fig. 9 (a), (
10(a) and 10(b) are shown, and the method of adhesion shown in FIGS. 61-9
．． 4330, known as face-down bonding or flip-chip bonding.

In order to perform this face-down bonding or flip-chip bonding, solder bumps 4 are formed in advance on the electrode portions 3 of the substrate 1. Then the first
As shown in 017I(a), the electrode part 3 of the substrate l and ゛('
- Place the electrode 6 of the conductor chip 5 accurately (:f).Then, 'I', solder the electrode part 3 of the conductor chip 5 and the electrode part 3 of the substrate 1 using, for example, thermocompression bonding. The bump 4 is pressed and bonded using iW Mt.

As a result, the semiconductor chip 5 is reliably mounted on the substrate 1''2 as shown in FIG. 10(b), making it possible to reduce the size of the semiconductor device. The bonding of the metal putter〉・2 to the electrode part 3 is done at the same time with one alignment, so the assembly time 1'
This makes it possible to significantly shorten the work time.

[Problem that the invention seeks to solve]

However, traditional semiconductor devices by face-down bonding or flip-chip bonding are difficult to achieve! In the vertical device, the electrode 6 of the semiconductor chip 5 is arranged to face the electrode part 3 of the metal pattern 2 of the substrate 1, so that the electrode part 3 of the metal pattern 2 of the semiconductor chip 5 and the electrode part 3 of the metal pattern 2 are arranged to face each other.
It was not possible to easily check from the outside whether the positions of the two were aligned with each other. That is, the semiconductor chip 5
Since the chip body 7 of is mainly made of silicon, Ii
The electrode 6 or the positive part 3 does not pass through the visible rays and is exposed from the outside.
It was not possible to directly image the position of

For this purpose, conventionally, instead of aligning the electrodes 6 of the semiconductor chip 5 and the electrode portions 3 of the metal pattern 2 in a straight line, I was making arrangements. This alignment is i
Based on the detailed image obtained by first imaging the semiconductor tube 5 and the substrate l using the illuminating light beam, and then taking the image! l
', the outer peripheral edge pattern of the conductor chip 5 and the predetermined reference line pattern of the substrate 1 are extracted and compared, and when the two pattern positions match, the pattern of the electrode 6 of the half-piece chip 15 is extracted. It was assumed that the position coincided with the position of the electrode portion 3 of the metal pattern 2.

By the way, when forming the electrode 6 on the semiconductor chip 5,
Some variation occurs in the position of the electrode 6 with respect to the outer periphery of the semiconductor chip. Therefore, based on the outer periphery of the semiconductor chip 5, <the conventional alignment t! -, there was a problem that the electrode 6 and the electrode part 3 could not be accurately aligned, and the yield of assembled semiconductor devices could not be improved.

The present invention is capable of accurately aligning the electrodes of a semiconductor chip and the electrode portion of a substrate, thereby improving the yield of assembled semiconductor devices.
An object of the present invention is to provide a P-conductor device assembly apparatus.

[Means for solving problems]

The present invention is directed to a conductor device 411 device of the type in which an electrode portion formed on a substrate and an electrode of a semiconductor chip are bonded together while facing each other. an illumination device that illuminates the semiconductor chip and/or the substrate; an imaging device that images the infrared light reflected from the conductor chip and/or the substrate; The device is characterized by comprising positioning means for aligning the electrode portion formed on the substrate and the electrode of the semiconductor chip.

[Effect]

In the present invention, first, the electrode portion of the substrate and the electrode of the semiconductor chip are roughly positioned so as to face each other, and then the semiconductor chip and the substrate are irradiated with infrared light from an illumination device. If a part of the semiconductor chip, for example, the chip body, is formed of a material mainly composed of silicon, infrared light passes through the chip body and reaches a predetermined part of the semiconductor chip and/or the substrate, for example, an R conductor. The light is reflected by the electrode of the chip or the electrode portion of the substrate and enters the imaging device. Based on the image captured by the imaging device, the positioning means aligns the electrodes formed on the substrate and the electrodes of the semiconductor chip.

〔Example〕

Examples of the present invention will be described below based on the +71 plane.

FIG. 1 is a schematic diagram of the entire conductor device assembly apparatus of the present invention.

In FIG. 1, the semiconductor device assembly apparatus includes a substrate 1,
For example, a supply magazine 10 that supplies a ceramic substrate for a hybrid IC, a transport unit 11 that transports the substrate 1 supplied from the supply magazine 10, an XY servo mechanism 12 that moves the semiconductor chip 5 to a predetermined position, and a semiconductor An illumination device 14 that irradiates the chip 5 and/or the substrate 1 with infrared light, an imaging device 15 that images the infrared light reflected from the semiconductor chip 5 and/or the substrate 1, and a face-down bonding device. It has a housing 1 ( ) that houses a conductor tube 5 and a substrate 1 that are pre-chip bonded.

The substrate 1 and the 16-conductor chip 5 are shown in Figure 9(a).
The semiconductor chip 5 is made by Tsugezo as shown in (b), and the semiconductor chip 5 includes a chip body 7 made of silicon as L material IFI, and A
It consists of an electrode 6 made of ρ gold metal or Au metal.

The XY servo mechanism 12 includes an arm 13 for gripping the semiconductor chip 5, and moves the semiconductor chip 5 to a predetermined position by controlling the arm 13 in the X direction, the X direction, and the θ direction. ing.

Further, the illumination device 14 generates infrared light having a wavelength of approximately ]1100 nm or more. The infrared light from this illumination device 14 illuminates the 't'-8 chip 5 and/or the substrate 1, but the chip body 7 of the semiconductor chip 5 is made of a three-component material including silicon. , Siri: 1n is 1
Since infrared light with a wavelength of 100n5nP1-L is transmitted, the infrared light from the illumination device 14 is transmitted through the chip body 7.The infrared light transmitted through the chip body 7 is located below the chip body 7. The light is reflected by the electrode 6 of the AL, FF class (which does not transmit infrared light), and the reflected image is captured by the imaging device 15.

(The i-device 15 is an industrial television camera, and can detect even infrared light with a wavelength of 2000 nm or more, for example.)
b A vidicon having an O'S-based photoconductive surface or a charge-coupled device having long wavelength spectral characteristics is used. This imaging device 15 captures an electrode image of a predetermined region of the semiconductor chip 5 and/or substrate 1 that is to be aligned.

FIG. 2 is a configuration diagram of a control section of the semiconductor device 511 stand-up apparatus shown in FIG. 1.

In FIG. 2, the control section of the semiconductor device assembly apparatus is controlled by a processor 20. As shown in FIG. Processor 20 operates according to a control program stored in ROM 21.

The processor 20 is connected to an operation 1rT for giving a predetermined instruction thereto, that is, a control panel 22, a transport section 11, an XY servo machine 12, and an imaging device 15.
Furthermore, the semiconductor chip 5 imaged by the imaging device 15
an A/D converter 23 that converts the electrode image etc. from analog to digital; and an image memory 2 that stores the electrode image (1vD1 image etc.)
4 and a monitor device 26 are connected.

The probe→j20 controls the 1τ feeding section 11 based on instructions from the control JlI board 22, and moves the substrate 1 at a predetermined position J. Also, the XY servo mechanism 12
is controlled to position the conductive chip 5 at a predetermined position on the substrate 1.

The monitor device 26 is composed of, for example, a CR'I' display, and displays a mold surface image of the semiconductor chip 5 on the screen to check whether the electrodes 5 of the semiconductor chip 5 are accurately positioned on the electrode portions 3L of the substrate 1. This is to monitor the situation with 11 eyes. Whether or not to use the monitor device η26 can be instructed by the operator from the control panel 22. When using the monitor device 26, the operator can check the positions of the electrodes 6 of the conductor chip 5 without looking at the display screen, and can check the positions of the electrodes 6 of the semiconductor chip 5 on the control panel 22. In operation, the XY servo mechanism 12 allows further manual control.

As will be described later, when only the electrode image of the electrode 6 of the semiconductor chip 5 is captured by the illumination device 14 and the imaging device 15, the electrode section 3 of the substrate 1 cannot be accurately positioned at a predetermined position DP of the transport section 11. It is necessary to store the electrode image of the electrode section 3 that should originally be imaged in the reference pattern storage memory 25 as a reference pattern in advance.

On the other hand, if the electrode section 3 of the substrate 1 can also be actually imaged, the reference pattern in the reference pattern storage memory 25 is not used.

The overall operation of such semiconductor device assembly equipment is explained in the third section.
A schematic explanation will be given based on flowchart 1 in the figure.

First, in step $1, the operator operates the control mold 22 to operate the transport unit 11, and sends the substrate 1 supplied from the supply magazine 10 in the direction of arrow R to the position DP shown in FIG. is positioned at position DP.

When the substrate 1 is positioned at the position SP in step S1, the process proceeds to step S2. At step S2! ,t,
Activate XYt-bore arg12, thereby arm 1
The semiconductor dip 5 held by the substrate 3 is moved to a predetermined position on the substrate 1'' and positioned.

Note that at this stage, the electrodes 6 of the semiconductor chip 5 are connected to the substrate 1.
is not accurately positioned at the electrode portion 3J-.

In this way, the conductor chip 5 is placed in a predetermined position on the base [1].
Once the position has been roughly determined, the process proceeds to steps S3 to S8 for accurate positioning.

In step S3, an image of the electrodes of the semiconductor chip 5 and the like are captured and subjected to image processing. That is, in step S3, approximately 1100 nml?
The substrate 1 and the conductor chip 5 are irradiated with infrared light having wavelengths J, , J-. Since this infrared light passes through the chip body 7 of the IL conductor chip 5, which is mainly made of silicon, the A1 metal electrode of the IL conductor chip 5 located below the chip body 7 is transmitted through the infrared light. 6 etc., is reflected by the electrode 6 etc.), and is imaged by the imaging device 15 as an electrode image Wi. This electrode image f is the A/'D converter 2
3, and is subjected to image processing such as binarization processing, 5L and noise removal processing (not shown), and then stored in the image memory 24.

Next, in step S11, it is determined whether or not the monitor device 26 is to be used. Note that whether or not to use the monitor device 7126 may be determined in advance at the time of system editing before the start of operation of this device, or may be specified each time by the control panel 22 during operation.

When it is determined in step S4 that the monitor device 26 is to be used, the process advances to step S5, and the image memory 24
The electrode image of the semiconductor chip 5 inside is displayed on the screen of the monitor device 26.

Next, in step S6, the displayed screen is simply WIf
Determine whether the information is for verification purposes only. If the display is only for confirmation, manual positioning by the operator is not performed, and the process proceeds to automatic positioning processing in step S8. On the other hand, in step S6, if the display is not just for N recognition, this means that the positioning process is performed by the operator's T: movement, and the process proceeds to step S7.

In step S7, the operator operates the control panel 22 while looking at the display screen to control the XY servo mechanism 12 on the control panel 22.
based on the electrode 6 of the semiconductor chip 5, vi, 1
accurately position it on the electrode section 3.

On the other hand, if it is determined in step S4 that the monitor device 26 is not used, or if it is determined in step S6 that the monitor device 26 is used only for confirmation display, the electrodes of the semiconductor chip 6 are connected to the substrate in step S8. The processor 20 automatically checks whether or not the electrode part 3 of 1 is accurately positioned.
XY servomechanism 12 is automatically controlled by processor 20 until accurate positioning is achieved.

After the electrodes 6 of the semiconductor chip 5 are accurately positioned on the electrode portions 3 of the substrate 1 in step S7 or step S8 in this way, the process proceeds to step S9, where face-down bonding or flip-chip bonding is performed by a method such as thermocompression bonding. Do the following. A magazine 16 for storing the bonded substrate 1 and the conductor 16
and complete the process.

1 of the conductor device 111 device according to the present invention.
In this embodiment, the VRI imager 15 receives only the infrared light reflected by the electrode 6 made of metal or Au metal on the semiconductor depth 5, as shown in Section 4-1. Only the electrode image of the conductor chip 5 is captured. Such a situation occurs when the infrared light from the illumination device 14 cannot pass through the bumps 4 on the electrode section 3 of the substrate 1, and a voltage image of the electrode section 3 cannot be captured.

Therefore, in the first embodiment, since it is not possible to image the electrode image of the electrode portion 3 of the substrate 1, the electrode image of the electrode portion 3 to be imaged is stored as a reference pattern in advance as a base pattern. t6 must be stored in the memory 25. In this case, in the screen display process of step S5 in FIG. 31 is displayed on the display screen of the monitor device 26 as shown in FIG. Note that if two of the plurality of :T[6 of the semiconductor chip 5 are aligned with the corresponding electrode portions 3 of the substrate 1, all the electrodes 6 of the semiconductor chip 5 and all the electrodes 1 of the substrate 1 are aligned.・[Part 1 3
Therefore, only the two electrode images 30 necessary for alignment and the corresponding reference pattern 31 are shown in FIG.

Further, in the automatic positioning process in the 3171st step S8, the printer 17 setter 20 positions the electrode 6 of the semiconductor chip 5.
In the example shown in FIG. 5, in which pattern matching is performed between the electrode part (tlL30 and the reference pattern 31), one :f';
(-64 image 30 is the reference pattern 3 corresponding to this
1 by Δx in the X direction and Δy in the y direction, and furthermore, the electrode image 30 is tilted by an angle Δθ with respect to the reference pattern 31. Therefore, as a result of pattern matching, it is determined that the electrode image 30 and the reference pattern 31 do not exactly match each other.

At this time, the processor 20 further controls the XY servo mechanism 12 so that the main image 30 of the electrode 6 of the semiconductor depth 5 and the base pattern 31 are completely 1 (intersecting with each other). until the electrode 6 of the substrate 1 is considered to be accurately positioned on the electrode 1.
x=0. The semiconductor chip 5 is moved until Δy=O, Δθ−20) is not satisfied.

Thereafter, face-down bonding or flip-chip bonding in step S9 of FIG. 3 is performed.

In this way, in the first embodiment, the illumination device 14 that outputs infrared light with a wavelength of approximately 1100 nm or more is used to illuminate the electrode 6 located below the chip body 7, which cannot be imaged with normal visible light. Since it is possible to obtain an image of the electric current (φi),
If the substrate 1 is accurately positioned on the transport section 11 at a position zpp corresponding to a preset reference pattern,
Compared to conventional positioning based on the outer periphery of the semiconductor chip 5, the positioning of the electrodes 5 of the semiconductor chip 5 and the electrodes 11i6 of the substrate 1 can be made more accurate.

In the second embodiment of the semiconductor device assembly apparatus according to the present invention, when the bumps 4 are formed in advance to such an extent that the outer periphery of the electrode section 3 of the substrate 1 is exposed as shown in FIG. , A of semiconductor chip 5! In addition to the infrared light from the J metal or Au metal electrode 6, a part of the infrared light reflected from the metal electrode portion 3 of the substrate 1 is also reflected as JW (91).

In this case, in the screen display process in step S5 of FIG. 3, the electrode image 33 of the electrode section 3 of the substrate 1 and the electrode image 32 of the electrode 6 of the semiconductor depth 5 are displayed simultaneously as shown in FIG. Ru. At this time, the reference pattern is not required. Note that the electrode image 33 has a defect 34 caused by the bang 11.
is occurring.

Further, in the automatic positioning process in step S8 in FIG. 3, the processor 20 determines whether or not these electrode images 32 and 33 are mutually beneficial.

This determination can be made, for example, by using the I.
It can be determined by calculating the number of black pixels in a binarized image that is not a Q image. That is, as shown in FIG. 7, when the electrode images 32 and 33 do not overlap, the number of black pixels in the captured binary 1H image is large, and when they completely overlap, the number of black pixels is the minimum. Become.

The processor 20 controls the XY navigation mechanism 12 so that the number of black pixels in the captured binary image is minimized, and the electrode image 32 of the electrode O of the semiconductor chip 5 and the overlapped portion 3 of the substrate 1 are The electrode image 33 of the semiconductor chip 5 is aligned perfectly with the electrode image 33 of the semiconductor chip 5, and the electrode 6 of the semiconductor chip 5 is accurately positioned on the electrode portion 3 of the substrate 1.
), move the conductor chip 5.

After that, follow step 1 in step S in FIG. Perform face-down bonding or flip-chip bonding.

In addition, in the description of the second series, it is assumed that the bumps 4 are formed to such an extent that the outer peripheral edge of the electrode part 3 of the substrate 1 is exposed. ,
For example, if a transparent adhesive containing metal powder is used, even if the electrode part 3 of the substrate 1 is covered with the bumps 4, infrared light will pass through the bumps 4, so the electrode image of the electrode part 3 will not be visible. Obtainable.

At this time, the voltage 1 of the electrode section 3. ! i! Since there is no defect in the image due to bumps, the electrode part f! of the electrode 6 of the conductor chip 5 is 1'. %32 and electrode image 3 of electrode part 3 of substrate 1
2 can be detected with higher accuracy.

As described above, according to the second embodiment, the electrode image 32 of the electrode 6 of the semiconductor chip 5 as well as the electrode image 33 of the electrode portion 3 of the substrate 1 can be captured using infrared light. By determining the overlap between the electrode image 32 and the electrode image 33 based on the number of black pixels, the degree of overlap between the electrode 6 of the semiconductor chip 5 and the electrode portion 3 of the substrate 1 can be directly determined, and the semiconductor chip 5 can be positioned more accurately. I can do something.

8th I is a diagram for explaining a third embodiment of the semiconductor device assembly apparatus according to the present invention.

In the apparatus for standing conductor device M1 according to the third embodiment, as shown in FIG. For example, a metal reference mark 113 attached to 42
By aligning these, the electrical pads 6 of the semiconductor chip 5 and the electrode portions 3 of the substrate 1 are accurately aligned. In this third embodiment, similarly to the second embodiment described above, when the conductor chip 5 and the substrate 1 are irradiated with infrared light of approximately 1100 nm or more from the illumination device 14, , infrared light reflected from the reference mark 41 on the upper surface 40 of the r6 conductor chip 5, and infrared light transmitted through the chip body 7 mainly made of silicon and reflected from the reference mark 42 on the surface 42 of the substrate 1. The #Fi image of the light is formed by the l1i3 imager 15. Depending on whether the number of black pixels in the entire captured image is small or not, the overlap between the image of the reference mark 41 and the image of the reference mark 42 is reflected from the conductor chip, f: infrared light and/or the substrate. Since the infrared light reflected from the substrate is imaged to accurately align the electrodes of the semiconductor chip and the electrodes of the substrate, it is possible to significantly improve the steps of the assembled semiconductor devices. 611, drawing no. 11"7J is a schematic diagram of the conductor device assembly apparatus of the present invention, and FIG. 2 is a schematic diagram of the conductor device assembly 1"L shown in FIG. 1. FIG. 3 is a block diagram of the control unit that controls the device, and FIG.
IA for explaining the first embodiment of the thick body device assembly apparatus, FIG. 5 shows the alignment of both the ili and fli images of the IR conductor captured by the first embodiment of the present invention and the reference pattern. 6 is a diagram for explaining a second embodiment of the semiconductor device assembly apparatus according to the present invention, and FIG. 7 is a diagram for explaining a semiconductor chip imaged by the second embodiment of the present invention. FIG. 8 is a diagram showing both electrode images and the electrode image of the substrate, and FIG. 8 detects the base.

When the number of black pixels is large, it is determined that the image of the reference mark 41 and the image of the reference mark 42 do not completely overlap, so the processor 20 continues processing until the number of black pixels becomes the minimum.
controls the XY servo 41112 to move the conductive chip 5 to a position where the reference marks 41 and 42 match accurately.

In this way, according to this third example, even if the electrode section 3 of the substrate 1 is completely covered by the bumps 4 that do not transmit infrared light, it is impossible to perform a GI image. , a reference mark 41 provided on two surfaces 40 of the semiconductor chip 5 and a reference mark 12 on the front surface 42 of the substrate 1.
By aligning with
Since it can be considered that the electrode portion 3 of the substrate 1 and the electrode portion 3 of the substrate 1 are aligned, the electrode 6 of the semiconductor chip 5 can be positioned regardless of the state of the electrode portion 3.

〔Effect of the invention〕

As explained above, according to the present invention, a semiconductor chip and/or a substrate is irradiated with infrared light. , FIG. 9(a) shows the plane of the substrate I, and FIG. 9121(b)
) is a plan view of the semiconductor chip on the side facing the substrate, No. 10
The figure is a diagram for explaining face town bonding or friggin tip bonding.
FIG. 10(a) is a diagram showing the semiconductor chip and the substrate before bonding, and FIG. 10(b) is a diagram showing the conductor chip and the substrate after bonding.

DESCRIPTION OF SYMBOLS 1... Substrate, 3... Electrical folding part, 4... Bump, 5
... A conductor chip, 6... Electrode, 7... Chip body, 11-t"11 sending part, 12-XY-1; l--
Bouum.

14... Illumination device, 15... Imaging device, 24...
Image memory, 25... Reference pattern storage memory, 30.32.33...T, polar image, 31... Reference pattern, 311... Missing, tl 1
, 42...Reference mark patent applicant Hamamatsu Photonics Co., Ltd. Agent Patent attorney Masaru Uemoto Yutsutsu 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 9 (a) Figure 10

Claims (1)

[Claims] 1) In a semiconductor device assembly apparatus of the type in which an electrode portion formed on a substrate and an electrode of a semiconductor chip are bonded together while facing each other, infrared light transmitted through a portion mainly made of silicon is used. an illumination device that irradiates the semiconductor chip and/or the substrate; an imaging device that images the infrared light reflected from the semiconductor chip and/or the substrate; 1. A semiconductor device assembly apparatus comprising: positioning means for aligning the electrode portion and the electrode of the semiconductor chip. 2) The semiconductor device assembly apparatus according to claim 1, wherein the illumination device generates infrared light with a wavelength of about 1100 nm or more. 3) The imaging device images infrared light transmitted through a chip body of a semiconductor chip mainly made of silicon and reflected by the electrodes of the semiconductor chip, and the positioning means captures an image of the semiconductor imaged by the imaging device. Claim 1, characterized in that the electrodes of the semiconductor chip and the electrode portions of the substrate are aligned by pattern matching between both images of the electrodes of the chip and a preset reference pattern of the electrode portions of the substrate. The semiconductor device assembly apparatus according to item 1. 4) The imaging device images the infrared light transmitted through the chip body of the semiconductor chip mainly made of silicon and reflected by the electrodes of the semiconductor chip and the electrode portion of the substrate, and the positioning means The number of black pixels in the binarized image captured by the device is counted, and when the number of black pixels is the minimum, both images of the electrode of the semiconductor chip and the image of the electrode part of the substrate completely overlap, and the semiconductor 2. The semiconductor device assembly apparatus according to claim 1, wherein it is determined that the electrodes of the chip and the electrode portions of the substrate are aligned. 5) The imaging device captures infrared light that is reflected by a reference mark provided on the top surface of the semiconductor chip and a reference mark provided on the substrate surface after passing through the chip body of the semiconductor chip mainly made of silicon. the positioning means counts the number of black pixels in the binarized image taken by the imaging device, and when the number of black pixels becomes the minimum, the reference mark provided on the top surface of the semiconductor chip and the substrate The semiconductor device assembly apparatus according to claim 1, wherein it is determined that the electrodes of the semiconductor chip and the electrode portions of the substrate are aligned when the reference marks provided on the surface completely overlap with each other. .