JPS5867033A - Wire bonding method - Google Patents
Wire bonding methodInfo
- Publication number
- JPS5867033A JPS5867033A JP56165745A JP16574581A JPS5867033A JP S5867033 A JPS5867033 A JP S5867033A JP 56165745 A JP56165745 A JP 56165745A JP 16574581 A JP16574581 A JP 16574581A JP S5867033 A JPS5867033 A JP S5867033A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- wire bonding
- line sensor
- bonding
- recognized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10162—Shape being a cuboid with a square active surface
Abstract
Description
【発明の詳細な説明】
本発明は、半導体素子上の電極と実装基板上のリード部
とをワイヤボンディングするワイヤボンディング方法に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a wire bonding method for wire bonding electrodes on a semiconductor element and lead portions on a mounting board.
実装基板上のリード部の位置検出は、従来二次元カメラ
によって特徴を持った代表的な2本のり一ド部の位置検
出を行い、他のリード部はあらかじめ学習または記憶さ
せておいた上記検出した2本のリード部との相対的な位
置情報により、ボンディング位置を計算し、ワイヤボン
ディングしている。しかし、半導体装置上のリードの本
数が多く、小型化にと龜なってワイヤボンディングの位
置決めに高精度が要求され、しかもリード各々の間隔精
度が悪く、リード自身大きさ、形状とバラツキが多くな
っている。To detect the position of the lead part on the mounting board, conventional two-dimensional cameras are used to detect the position of two typical lead parts with characteristics, and other lead parts are detected by the above-mentioned detection method that has been learned or memorized in advance. The bonding position is calculated based on the relative positional information of the two lead parts, and wire bonding is performed. However, the number of leads on a semiconductor device is large, and as miniaturization accelerates, high precision is required for wire bonding positioning. Furthermore, the spacing accuracy between each lead is poor, and the leads themselves have many variations in size and shape. ing.
したがって、従来の認識法のように代表的な位置を認識
して、全リードのボンディング位置を計算し求める方法
では、ボンディングの位置精度が満足できない。そのた
め、ワイヤボンディングを1不可能である。また、リー
ド19のそれぞれ特徴ある位置あるいはボンディング位
置に関係ない位置を認識し、その位置からワイヤボンデ
ィング位置を計算し求やても、リードそれぞれが大きさ
、形状1位置のバラツキを持つためワイヤボンディング
することは困難である。゛よりて、1illlした位置
とワイヤボンディング位置を異った位置圧すると、ワイ
ヤボンディングの精度が満足できない。そのため、目視
またはリード1本手つ2次元カメラによって映倫を取り
込み位置検出を行なっている。しかし、この方法は、信
頼性、生産性の面で問題がある。Therefore, the conventional recognition method, which recognizes representative positions and calculates the bonding positions of all the leads, cannot satisfy the bonding position accuracy. Therefore, wire bonding is impossible. Furthermore, even if the wire bonding position is determined by recognizing each characteristic position of the lead 19 or a position unrelated to the bonding position and calculating the wire bonding position from that position, the wire bonding is It is difficult to do so. Therefore, if a different position pressure is applied to the 1 illumination position and the wire bonding position, the accuracy of wire bonding cannot be satisfied. Therefore, the position is detected by visual observation or by using a two-dimensional camera with one lead. However, this method has problems in terms of reliability and productivity.
本発明の目的は、上記した従来技術の欠点をなくし、微
細化された半導体素子上の電極と実装基板上のリード部
とを高精度にワイヤボンディングできるようにしたワイ
ヤボンディング方法を提供するKある。SUMMARY OF THE INVENTION An object of the present invention is to provide a wire bonding method that eliminates the above-mentioned drawbacks of the prior art and enables highly accurate wire bonding between electrodes on a miniaturized semiconductor element and lead portions on a mounting board. .
即ち1本発明は、高精度、高速認識を目的としてライセ
ンサ(自己走査製固体撮像素子)を用いて、1画偉で高
精度に数十率のリード部の位置検出を行い、半導体装置
の実装基板上の各各全てのリード部の位置g*を行い、
このl!識したリード部の中心位置をワイヤボンディン
グ位置とし、その位置へワイヤボンディングすることを
特徴とするワイヤボンディング方法である。そのために
、実装基板上リード部のリード幅、リード間隔の精度に
関係なくワイヤボンデる。Specifically, the present invention uses a licensor (self-scanning solid-state image pickup device) for the purpose of high-accuracy and high-speed recognition, and detects the position of a lead part with high precision of several tens of pixels in 1-picture width, thereby improving the mounting of semiconductor devices. Perform the position g* of each and every lead part on the board,
This l! This wire bonding method is characterized in that the center position of the identified lead portion is set as a wire bonding position, and wire bonding is performed to that position. For this purpose, wire bonding is performed regardless of the accuracy of the lead width and lead spacing of the lead portion on the mounting board.
以下本発明を図に示す実施例にもとづいて具体的に説明
する。The present invention will be specifically described below based on embodiments shown in the drawings.
第1図は本発明の一実施例であり、半導体装置8はθ方
向に移動可能なボンディングテーブル10上にある。ラ
インカメラ1は、ボンディングツール5と同一のXYテ
ーブル24上にあり、ラインセンサC,C0D1等の(
自己走査塵撮偉素子)のラインセンナの視野範囲20に
おいて上記半導体装置基板上のリード19のワイヤボン
ディング位置を検出する。すなわち、半導体装置8の実
装基板上のリード19は、ミラー4を介し結像レンズ7
により適切な倍率でラインカメラ1のラインセンサ上に
結像される。この結像された偉をラインセンナで検出す
る際のラインセンナとリードとの位置関係は第2図(α
)に示すように互いKはぼ直角゛な位置関係とする。そ
の一部の拡大図を第2図(A)に示す。このとき、ライ
ンカメラ1のラインセンサによって光学走査すると出力
は同図0のようにリード19a、19b、19c、19
d 。FIG. 1 shows one embodiment of the present invention, in which a semiconductor device 8 is placed on a bonding table 10 that is movable in the θ direction. The line camera 1 is located on the same XY table 24 as the bonding tool 5, and the line sensors C, C0D1, etc.
The wire bonding position of the lead 19 on the semiconductor device substrate is detected in the field of view 20 of the line sensor of the self-scanning dust sensor. That is, the leads 19 on the mounting board of the semiconductor device 8 are connected to the imaging lens 7 through the mirror 4.
An image is formed on the line sensor of the line camera 1 at an appropriate magnification. Figure 2 (α
), the positions K are approximately perpendicular to each other. An enlarged view of a portion thereof is shown in FIG. 2(A). At this time, when the line sensor of the line camera 1 performs optical scanning, the output is as shown in FIG.
d.
19gの照度に対応した振幅情報となり、信号処理回路
15において、しきい値Vrxで2値化を行なう。同図
(d)の2値化された信号波形をインターフェース16
を介し計算機17に送る。計算機17は、2値化信号の
中心位置t、〜tlを基準位置P(走査周期信号)から
計算によって求め、リード19の中心位置(同図(A)
のラインカメラの視野範囲20上の点24eL、24h
、24c、24dN24g )を検出しこの位置をワイ
ヤボンディング位置とする。次に計算機17は、インタ
ーフェース16を介し、・モータ駆動回路13.モータ
9を制御し、ボンディングテーブル10を回転させ、更
Kx−yテーブル24をモータ3.6でラインカメラ1
をポインディン・ツール5と共にX−Y方向に移動させ
、第3図に示すようにラインセンナの光学的結像位置を
20.21.22.25と移動し、全てのリード19の
位置を前記方法で検出する。そのwtIIIItシた位
置へワイヤボンディングするため、計算機17はインタ
ーフェース15を介し、モータ駆動回路11゜12、L
5 、モータ5.6.9を制御し、同時にモータ駆動回
路14.モータ2を制御し、ボンディングツール5によ
って実装基板上のリード19のU識した゛°中心位置と
、上記ラインカメラ1で検出された半導体素子18上の
電極とのワイヤボンディングを行なう。The amplitude information corresponds to an illuminance of 19 g, and is binarized in the signal processing circuit 15 using a threshold value Vrx. The binarized signal waveform shown in FIG.
It is sent to the computer 17 via. The computer 17 calculates the center position t, ~tl of the binarized signal from the reference position P (scanning period signal), and calculates the center position t, ~tl of the binary signal, and calculates the center position of the lead 19 (see FIG.
Points 24eL, 24h on the field of view 20 of the line camera
, 24c, 24dN24g) are detected and this position is determined as the wire bonding position. Next, the computer 17 connects the motor drive circuit 13 via the interface 16 to the motor drive circuit 13. The motor 9 is controlled to rotate the bonding table 10, and the Kx-y table 24 is then connected to the line camera 1 by the motor 3.6.
along with the pointing tool 5 in the X-Y direction, and the optical imaging position of the line senna is moved to 20, 21, 22, 25 as shown in FIG. Detect with. In order to perform wire bonding to the wtIIIt position, the computer 17 connects the motor drive circuits 11, 12, and L via the interface 15.
5, controls the motor 5.6.9 and simultaneously controls the motor drive circuit 14. The motor 2 is controlled, and the bonding tool 5 performs wire bonding between the U-identified center position of the lead 19 on the mounting board and the electrode on the semiconductor element 18 detected by the line camera 1.
なお、半導体素子18上の電極の相対的位置精度は高精
度に形成されているため、2個所程度の電極の位置を認
識して実装基板との相対的位置関係が求まれば、あとは
計算機17のメモリに記憶された電極パターンの位置情
報を読み出すと共にこの位置情報に上記実装基板との相
対的位置関係の補正を加えて、X−Yテーブル24゜ボ
ンデングテーブル10を制御すれば、半導体素子18上
への電極のワイヤボンデングを行つことが出来る。Note that the relative positional accuracy of the electrodes on the semiconductor element 18 is formed with high precision, so once the positions of about two electrodes are recognized and the relative positional relationship with the mounting board is determined, the rest is done using a computer. If the positional information of the electrode pattern stored in the memory 17 is read out, the positional information is corrected for the relative positional relationship with the mounting board, and the X-Y table 24° bonding table 10 is controlled, the semiconductor Wire bonding of electrodes onto element 18 can be performed.
以上説明したように本発明は、ラインセンサを用いて各
々全てのリードを位置認識し、この1111した中心位
置にワイヤボンディングするものであるから、リード幅
、リード間隔の精度。As explained above, the present invention uses a line sensor to recognize the positions of all the leads and performs wire bonding at the center positions of the 1111 points, so the accuracy of lead width and lead spacing is very high.
リードピン数に関係なくワイヤボンディングする全自動
ワイヤボンダを実現することができ。A fully automatic wire bonder that performs wire bonding regardless of the number of lead pins can be realized.
しかもラインセンナを用いることにより一方向の視野範
囲がTV左カメラ4倍となり、しかも。What's more, by using the line sensor, the field of view in one direction is four times that of the TV left camera.
2次元画偉処理に比べ、−次元ijigI!6理で済む
ため高速にw1wIt処理を行処理とができる効果も奏
する。。Compared to two-dimensional image processing, -dimensional image processing! Since only 6 operations are required, the w1wIt processing can be performed at high speed with the row processing. .
第1図は本発明の一実施例による全自動ワイヤボンダの
構成図、第2図(α)は実装基板上のリードと2インセ
ンサとの対応関係を示す平面図。
第2図(A)はII2図(α)のリードの拡大図、第2
図(C)はラインセンサから得られる信号波形を示した
図、第2図(d)は第2図(C) K示すこの映倫信号
を所定のしきい値Vriで2値化した2値化信号を示す
図、第3図は実装基板上のリードに対応してラインセン
サを配置した場合を示した図である。
1・・・・・・・・・・・・ラインカメラ4 ・・・・
・・・・・・・・ ミ ラ −5・・−・・・・・
・・・ボンディングツール7・・−・・・・・・・・結
偉レンズ
8・・・・・・・・・・・・半導体装置代3!A*!士
薄 EB *J、、大、1yf51 図
?、2園FIG. 1 is a configuration diagram of a fully automatic wire bonder according to an embodiment of the present invention, and FIG. 2 (α) is a plan view showing the correspondence between leads on a mounting board and a 2-in sensor. Figure 2 (A) is an enlarged view of the lead in Figure II2 (α),
Figure (C) shows the signal waveform obtained from the line sensor, and Figure 2 (d) shows the signal waveform obtained from the line sensor. FIG. 3, a diagram showing signals, is a diagram showing a case where line sensors are arranged corresponding to leads on a mounting board. 1・・・・・・・・・・・・Line camera 4 ・・・・
・・・・・・・・・ Mira -5・・・・・・・・・・
...Bonding tool 7...Kuiwei lens 8...Semiconductor equipment fee 3! A*! Shi Usui EB *J,, Large, 1yf51 Figure? , 2 gardens
Claims (1)
ボンディング位置を−リード部の巾方向に自己走査する
ライン・イメージ・センナで撮偉し、この撮偉された映
像信号により、上記実装基板リード部の位置を認識し、
このg織された位置に対応してボンディングツールまた
はボンディングテーブルの少なくとも一方を位置制御し
て、半導体装置の半導体素子上の電極と実装基板リード
部の認識した位置との電気的接続点を自動的にワイヤポ
、ンデイングすることを特徴とするワイヤボンディング
方法字鮫咎。The wire bonding positions of all the leads on the mounting board of the semiconductor device are photographed using a line image sensor that self-scans in the width direction of the leads. recognize the position of the part,
The position of at least one of the bonding tool or the bonding table is controlled in accordance with the woven position to automatically connect the electrical connection point between the electrode on the semiconductor element of the semiconductor device and the recognized position of the lead part of the mounting board. A wire bonding method characterized by wire bonding.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56165745A JPS5867033A (en) | 1981-10-19 | 1981-10-19 | Wire bonding method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56165745A JPS5867033A (en) | 1981-10-19 | 1981-10-19 | Wire bonding method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5867033A true JPS5867033A (en) | 1983-04-21 |
Family
ID=15818265
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56165745A Pending JPS5867033A (en) | 1981-10-19 | 1981-10-19 | Wire bonding method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5867033A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6349236U (en) * | 1986-09-17 | 1988-04-04 | ||
EP0634791B1 (en) * | 1993-07-16 | 2004-01-28 | Kaijo Corporation | Wire bonder and wire bonding method |
-
1981
- 1981-10-19 JP JP56165745A patent/JPS5867033A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6349236U (en) * | 1986-09-17 | 1988-04-04 | ||
JPH0314047Y2 (en) * | 1986-09-17 | 1991-03-28 | ||
EP0634791B1 (en) * | 1993-07-16 | 2004-01-28 | Kaijo Corporation | Wire bonder and wire bonding method |
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