JPS63165914U - - Google Patents
Info
- Publication number
- JPS63165914U JPS63165914U JP5910487U JP5910487U JPS63165914U JP S63165914 U JPS63165914 U JP S63165914U JP 5910487 U JP5910487 U JP 5910487U JP 5910487 U JP5910487 U JP 5910487U JP S63165914 U JPS63165914 U JP S63165914U
- Authority
- JP
- Japan
- Prior art keywords
- modulation
- circuit
- pll
- compensates
- relating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Description
第１図はこの考案の一実施例を示すブロツク図
、第２図は第１図の主要部の詳細を示す回路図、
第３図は従来のＰＬＬを用いたＦＭ変調回路を示
す回路図、第４図はこの考案に係る回路を用いた
場合の変調度と、従来回路を用いた場合の変調度
を示すグラフである。
図中、１……ＶＣＯ回路、２……ＬＰＦ回路、
３……バツフア回路、１２……変調用可変リアク
タンス素子（変調用可変容量ダイオード）。
Fig. 1 is a block diagram showing an embodiment of this invention, Fig. 2 is a circuit diagram showing details of the main parts of Fig. 1,
Fig. 3 is a circuit diagram showing an FM modulation circuit using a conventional PLL, and Fig. 4 is a graph showing the modulation degree when using the circuit according to this invention and the modulation degree when using the conventional circuit. . In the figure, 1...VCO circuit, 2...LPF circuit,
3...Buffer circuit, 12...Variable reactance element for modulation (variable capacitance diode for modulation).
Claims (1)
変調用可変リアクタンス素子に対して発振周波数
に応じたバイアス電圧を、上記ＰＬＬの制御電圧
に関係させることによつて変調度の周波数変化を
補償したＦＭ変調回路。 In an FM modulation circuit using a PLL circuit,
An FM modulation circuit that compensates for frequency changes in modulation degree by relating a bias voltage corresponding to an oscillation frequency to a modulation variable reactance element to a control voltage of the PLL.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5910487U JPH066597Y2 (en) | 1987-04-17 | 1987-04-17 | FM modulation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5910487U JPH066597Y2 (en) | 1987-04-17 | 1987-04-17 | FM modulation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63165914U true JPS63165914U (en) | 1988-10-28 |
| JPH066597Y2 JPH066597Y2 (en) | 1994-02-16 |
Family
ID=30890286
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5910487U Expired - Lifetime JPH066597Y2 (en) | 1987-04-17 | 1987-04-17 | FM modulation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH066597Y2 (en) |
-
1987
- 1987-04-17 JP JP5910487U patent/JPH066597Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH066597Y2 (en) | 1994-02-16 |
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