JPH0191313U - - Google Patents

Info

Publication number
JPH0191313U
JPH0191313U JP18735387U JP18735387U JPH0191313U JP H0191313 U JPH0191313 U JP H0191313U JP 18735387 U JP18735387 U JP 18735387U JP 18735387 U JP18735387 U JP 18735387U JP H0191313 U JPH0191313 U JP H0191313U
Authority
JP
Japan
Prior art keywords
variable capacitance
detection circuit
circuit
series
high frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18735387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18735387U priority Critical patent/JPH0191313U/ja
Publication of JPH0191313U publication Critical patent/JPH0191313U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は本考案に係るPLL検波回
路の一実施例を説明するためのもので、第1図は
その概略回路構成図、第2図は具体的回路構成図
である。第3図はPLL検波回路の従来例を示す
概略回路構成図である。 11……PLL検波回路、12……発振用同調
回路、13a,13b……可変容量ダイオード。
1 and 2 are for explaining one embodiment of the PLL detection circuit according to the present invention, FIG. 1 is a schematic circuit diagram thereof, and FIG. 2 is a concrete circuit diagram thereof. FIG. 3 is a schematic circuit configuration diagram showing a conventional example of a PLL detection circuit. 11...PLL detection circuit, 12...oscillation tuning circuit, 13a, 13b...variable capacitance diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 2個の可変容量ダイオードを高周波的に直列で
直流的に並列に接続して各可変容量ダイオードに
制御電圧を印加するようにしたことを特徴とする
発振用同調回路を有するPLL検波回路。
A PLL detection circuit having an oscillation tuning circuit, characterized in that two variable capacitance diodes are connected in series in high frequency and in parallel in direct current, and a control voltage is applied to each variable capacitance diode.
JP18735387U 1987-12-08 1987-12-08 Pending JPH0191313U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18735387U JPH0191313U (en) 1987-12-08 1987-12-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18735387U JPH0191313U (en) 1987-12-08 1987-12-08

Publications (1)

Publication Number Publication Date
JPH0191313U true JPH0191313U (en) 1989-06-15

Family

ID=31478512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18735387U Pending JPH0191313U (en) 1987-12-08 1987-12-08

Country Status (1)

Country Link
JP (1) JPH0191313U (en)

Similar Documents

Publication Publication Date Title
JPH0191313U (en)
JPS621425U (en)
JPS61151433U (en)
JPS6361808U (en)
JPS62146364U (en)
JPS63117107U (en)
JPS6326125U (en)
JPS6239342U (en)
JPS63125422U (en)
JPH0224641U (en)
JPH0390113U (en)
JPS625722U (en)
JPH01180897U (en)
JPS6268331U (en)
JPH0366223U (en)
JPS6355632U (en)
JPS61195105U (en)
JPS6358304U (en)
JPS61149416U (en)
JPS62203517U (en)
JPS62133429U (en)
JPH01146615U (en)
JPH0191329U (en)
JPS61134110U (en)
JPS6239330U (en)