JPS63165860U - - Google Patents

Info

Publication number
JPS63165860U
JPS63165860U JP5880887U JP5880887U JPS63165860U JP S63165860 U JPS63165860 U JP S63165860U JP 5880887 U JP5880887 U JP 5880887U JP 5880887 U JP5880887 U JP 5880887U JP S63165860 U JPS63165860 U JP S63165860U
Authority
JP
Japan
Prior art keywords
semiconductor element
programmable
programmable area
area
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5880887U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5880887U priority Critical patent/JPS63165860U/ja
Publication of JPS63165860U publication Critical patent/JPS63165860U/ja
Pending legal-status Critical Current

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  • Semiconductor Memories (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の実施例を示す断面図、第２図
は本実施例においてのＲＯＭライタによる書き込
みを示す概略図である。 １は混成集積回路基板、２は絶縁樹脂膜、３は
導電路、４，５は半導体素子、６は樹脂、７はケ
ース。 FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a schematic diagram showing writing by a ROM writer in this embodiment. 1 is a hybrid integrated circuit board, 2 is an insulating resin film, 3 is a conductive path, 4 and 5 are semiconductor elements, 6 is a resin, and 7 is a case.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所望形状の導電路が形成された混成集積回路基
板上にあらかじめ所望のデータが書き込まれたプ
ログラム可能な半導体素子あるいはプログラム可
能な領域を有する半導体素子を前記混成集積回路
基板上に直接固着し、前記導電路と前記プログラ
ム可能な半導体素子あるいはプログラム可能な領
域を有する半導体素子とをワイヤで接続し、前記
プログラム可能な領域を有す半導体素子及びプロ
グラム可能な領域を有する半導体素子を樹脂封止
し前記データの解読を不可能とすることを特徴と
する混成集積回路。 A programmable semiconductor element in which desired data is written in advance or a semiconductor element having a programmable area is directly fixed onto the hybrid integrated circuit board on which a conductive path of a desired shape is formed, and the The conductive path and the programmable semiconductor element or the semiconductor element having a programmable area are connected with a wire, the semiconductor element having the programmable area and the semiconductor element having a programmable area are sealed with a resin, and the semiconductor element having the programmable area is sealed with a resin. A hybrid integrated circuit characterized in that data cannot be deciphered.
JP5880887U 1987-04-17 1987-04-17 Pending JPS63165860U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5880887U JPS63165860U (en) 1987-04-17 1987-04-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5880887U JPS63165860U (en) 1987-04-17 1987-04-17

Publications (1)

Publication Number Publication Date
JPS63165860U true JPS63165860U (en) 1988-10-28

Family

ID=30889713

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5880887U Pending JPS63165860U (en) 1987-04-17 1987-04-17

Country Status (1)

Country Link
JP (1) JPS63165860U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001093275A1 (en) * 2000-05-30 2001-12-06 Hitachi,Ltd Semiconductor device and mobile communication terminal

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5937737B2 (en) * 1978-05-25 1984-09-11 新日本製鐵株式会社 Steel materials for hot forging
JPS6013746B2 (en) * 1980-04-17 1985-04-09 三井東圧化学株式会社 fluidized bed catalyst

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5937737B2 (en) * 1978-05-25 1984-09-11 新日本製鐵株式会社 Steel materials for hot forging
JPS6013746B2 (en) * 1980-04-17 1985-04-09 三井東圧化学株式会社 fluidized bed catalyst

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001093275A1 (en) * 2000-05-30 2001-12-06 Hitachi,Ltd Semiconductor device and mobile communication terminal

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