JPS63164494A - Electronic circuit component - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is suitable for use in electronic circuit boards on which integrated circuits (ICs) are mounted, packages in which semiconductor integrated circuit elements are stored, and the like. Regarding circuit parts.

Conventional technology In recent years, circuit wiring formed on circuit wiring boards has become increasingly finer and more dense, and for this reason, manufacturing technology for circuit wiring boards has been developed to meet these demands. .

A first conventional technique for manufacturing such a circuit wiring board is to screen print a high melting point metal material such as molybdenum or tungsten on a base material made of, for example, alumina-based ceramics, and then print it on a substrate made of, for example, 15
A technique is known in which baking is performed at a temperature of about 00°C.

In such conventional technology, since screen printing technology is used to form circuit wiring, the width of the circuit wiring needs to be at least 100μ, which limits the miniaturization and high density of such circuit wiring boards. There is a problem with being imposed. Another problem with this prior art is that the dielectric constant of the ceramics used for the base material is unnecessarily high, for example, about 10, and this combined with the resistance in the circuit makes it difficult for high-speed signal propagation. There was a problem in that high-speed operation of electronic circuits constructed using this technology became impossible.

As a second conventional technique to solve such problems, a polyimide film is formed on a base material such as ceramics, a metal material is deposited on the film, and then etched to form a circuit in a desired pattern. A technique is used in which wiring is formed and this process is repeated to form a single-layer or multi-layer circuit wiring board.

Compared to the first conventional technique described above, this conventional technique has the advantage that the width of the circuit wiring can be narrowed to about 25 μm, and that miniaturization and high density of circuit wiring boards can be improved. In addition, the polyimide film that realizes electrical insulation between circuit wiring has a relatively small dielectric constant of 3 to 3.5, and therefore the signal propagation speed can be increased compared to the case of using the first conventional technology. The processing speed of electronic circuits created can be improved.

In addition, for example, integrated circuits (IC) and large-scale integrated circuits (
In electronic circuit boards on which LSI (LSI), hybrid integrated circuits, etc. are mounted, polyimide resin is used in the structure consisting of a conductive layer and its glabella insulating film or protective film, or in the package in which semiconductor integrated circuit elements are stored. A technique of forming a metal thin film thereon as circuit wiring is widely used.

From the standpoint of electrical insulation, polyimide resin has relatively high heat resistance and low dielectric constant among polymers, and is known to have a wide range of resistance to various processing treatments such as vapor deposition and plating. .

On the other hand, the second conventional technique has a problem in that the reliability of the adhesion strength between the polyimide resin film and the circuit wiring is unnecessarily low. This problem will be pointed out in detail in the Examples section below as an experimental result regarding a comparative example compared to the present invention, but an outline will be given below.
For example, circuit wiring made of metal materials such as chromium, molybdenum, titanium, etc., was exposed to oxidation during a high-temperature storage test at 150°C. It was confirmed that the adhesion strength decreased from 5 kg/am'' to about 1 kg/l''.

That is, polyimide resins that have been commonly used in the past are represented by the following general formula, and the functional group R1 is, for example, an imide resin that is generally used.

The conventionally used types of functional groups shown above are electron-donating, and due to the thermal instability of the bonding state between such functional groups and metal atoms, the above-mentioned A situation is occurring.

That is, the polyimide resin and the metal are in close contact with each other through a chemical bond of -C-O-metal or -C-metal, which is formed by donating the outer shell electrons of the metal to the carbonyl group portion of the polyimide resin. The inventor of the present invention has confirmed that in conventional polyimide resins, the electron density of the -N-C=0 structure is low. This fact indicates that XPS (X-rayP l+ot
oeleetron Spectroscope (
Confirmed by ESCA)) analysis.

In the manufacturing process of circuit wiring boards as described above, a photolithography process and a drying process for forming a polyimide precursor into a polyimide structure are employed, and these processes include various heat treatment processes. Furthermore, the process of puff-caging semiconductor integrated circuit elements also includes a heat treatment process, and heat generation is also common during the operation of the *m circuit that has become a product. Therefore, if the adhesion strength between the polyimide resin g resin and the metal layer such as circuit wiring deteriorates in such a thermal environment as described above, the Fr wire of the circuit wiring or the peeling of the semiconductor integrated circuit element from the package may occur. This is a serious situation that could occur.

UjB 1 point to be solved by the invention The present invention has been made in view of the above-mentioned problem α, and it significantly improves the reliability of vF bonding strength between a polyimide resin and a metal thin film, and improves the reliability of the vF bonding strength in a thermal environment. The purpose of the present invention is to provide electronic circuit components with significantly improved reliability.

The present invention provides an electronic circuit component formed by forming a metal thin film on a polyimide resin formed on the surface of a base material. Type 9 is selected, and the electronic circuit component is characterized in that at least one of the functional groups R1 and R2 is an electron-withdrawing group.

In a preferred embodiment of the present invention, the electron-withdrawing group is selected from the types represented by the general formula: (n = 1* or 2) (bond = 2 or 4) (bond = 2 or 4) This is considered a W sign.

In another preferred embodiment, at least the surface of the metal thin film that contacts the polyimide claw is made of molybdenum (Mo),
Chromium (Cr), titanium (Ti), tungsten (W)
or an alloy of two or more thereof.

In yet another preferred embodiment, at least one of ceramics, glass, and metal is selected as the base material.

In yet another preferred embodiment, the polyimide resin layer is
It is characterized by being formed into a key having a thickness of 2 to 50μ.

Further, in a preferred embodiment of the present invention, the metal thin film is film Q250.
It is characterized by being formed by ~4000 people.

In yet another preferred embodiment, the portion of the metal thin film that does not contact the polyimide resin layer is made of aluminum (AI), m(
It is characterized in that at least one of Cu) and gold (A u) is selected.

Effect According to the present invention, a polyimide resin layer is formed on the surface of a base material constituting an electronic circuit component, and gold ltgIIl! is formed on the layer.
form. At this time, the type of polyimide resin represented by the following general formula, O is selected. In addition, in the above structural formula, at least one of the functional groups R1 and R2 is selected as an electron-withdrawing group.

The inventor of the present invention has confirmed that in polyimide resins having functional groups R1゜R2 selected as electron-withdrawing groups, the electron density in the -N-C=0 structural part of the -shell structural formula is low. Ta. This is X P S (X -ray
P botoelectron S pectrosc
confirmed by the OPE (ESCA) analysis method. In such a case, the structural portion of the polyimide structural resin shown in formula 12 becomes more likely to receive electrons from the metal atoms of the metal thin film formed on the polyimide resin layer, and therefore the polyimide structural resin and the metal are W c is formed when the outer shell electrons of are donated to the carbonyl group of polyimide.
In the chemical bond of the -o-M structure or the 10-M structure, the bonding energy is much higher than that of polyimide resins having functional groups as described in the prior art section. Therefore, even in a high-temperature oxygen atmosphere, the bond between the polyimide resin and the metal is not broken, and reliability regarding adhesion strength is dramatically improved.

In the structure of the polyimide resin used in the present invention shown in the first formula above, at least one of the functional groups R1 and R2 is
It is selected from the following electron-withdrawing groups (n = 1 or 2) (bonds = 2 or 4) (bonds = 2 or 4) represented by the following general formulas.

Polyimide again! (li! is the metal Tf formed on the layer
! In the film, at least the surface in contact with the polyimide resin layer is made of molybutin (Mo), chromium (CrL, titanium (
It is formed from at least one of Ti) and tungsten (W), or an alloy of two or more thereof. This type of metal is the gold Jl! W a
W! to the polyimide resin layer than the aluminum (AZ), copper (Cu), and gold (Au) that make up the parts that do not contact the polyimide resin layer in l:. It has been confirmed that the i-wear strength is high.

This polyimide resin layer is formed by applying a polyimide resin precursor, which will be described later, onto the surface of the base material by a so-called spinner method or spray method, and heat-treating it at 300°C to 400°C.
After forming a film with a thickness of 50 .mu.m, through-holes for connection and the like in the case of forming a multilayer structure are formed by photolithography or the like.

The gold-14 thin film formed thereon is applied onto the polyimide resin layer using sputtering, ion blating, etc., and is etched using photolithography, during which time the water-trenost layer used as a mask is peeled off. By removing it, a desired circuit wiring pattern is realized. By repeating such steps, a multilayer wiring circuit board can be realized.

Embodiment (I) Manufacturing process of circuit board 1 FIG. 1 shows a multilayer wiring circuit board (hereinafter referred to as
1 is a cross-sectional view of a circuit board (abbreviated as a circuit board) 1; Referring to FIG. 1, a circuit board 1 includes a first wiring layer 3 having a structure as described later on an insulating substrate 2 made of, for example, a ceramic material.
is formed, and the imide fI formed on it
It is connected to the second wiring layer 6 at a desired position via the through hole 5 of the 4Iltr layer 4. This second wiring layer 6 and ml
The wiring layer 3 is basically insulated by the polyimide resin layer 4.

Further, a polyimide resin N7 is formed on this second wiring layer 6, and through an inlet through hole 8 of this polyimide resin layer 7,
The third wiring layer 9 is connected to the tl&2 wiring layer 6 at a desired position. The combination of the wiring layer 3.6 and the polyimide resin layers 4, 7 formed thereon will be described as two layers in this example, but it is generally possible to have a multilayer structure of three or more layers. Light and light are performed in the same way.

FIG. 2 is a cross-sectional view taken along the section line ``---'' in FIG. Referring to FIG. 2, the second wiring layer 6 sandwiched between the polyimide resin layers 4.7 is made of polyimide! Adhesive layer 10°11, which is the surface in contact with 1fflt4.7, and adhesion N1
It consists of a wiring N12 formed between 0 and 11. The adhesive layer 10.11 is made of at least one of molybdenum, chromium, titanium, and tungsten, or an alloy of two or more thereof. In this embodiment, the adhesion layer 10 is formed from a simple substance of molybdenum Mo.
l! The wiring layer 12 is formed from at least one of aluminum AN, copper Cu, and gold Au.
2 is formed from a simple substance of copper (Cu).

The manufacturing process of the circuit board 1 having the structure described above will be described with reference to FIGS.

(1) Manufacturing process of the first wiring layer 3 First, molybdenum-copper is formed on the insulating substrate 2 shown in FIG. 1 by a sputtering method. This is a film of molybdenum with a thickness of 0.
2μm and copper were sputtered to a film thickness of 0.4μ in the same patch, followed by electrolytic plating of copper to a 3μ thick mackerel, followed by sputtering of a 0.1#-thick film. Form.

(2) Processing process of J1 wiring layer 3 On the multilayer metal*m obtained as described above, so-called phosphor-based renost is applied by a spinner method.

In the spinner method, the insulating substrate 2 on which the multilayer metal WI film is formed is suctioned and fixed on a predetermined stage, the resist in liquid form is dropped, and then this stage is rotated at, for example, 1000 rpm for 10 seconds. Make it pine.

The centrifugal force at this time causes the liquid resist to uniformly diffuse outward in the radial direction, allowing the resist to be coated on the metal WI film with a uniform thickness. At this time, what is applied is a so-called resist precursor, and it is necessary to volatilize the solvent from this precursor. Therefore, for example, 8
The liquid resist is half-dried by heating at 0° C. for 40 minutes, a so-called bre-baking process.

Next, in order to form a predetermined wiring pattern, a mask on which a predetermined wiring pattern is drawn is placed on the resist at 19.
! The resist layer is exposed to light.

By such so-called direct exposure, a resist pattern having the same dimensions as the mask can be obtained. The structure including the resist layer exposed in this way is developed using, for example, a xylene developer, and then a so-called boss bake process is performed, that is, in order to make the resist material resistant to the etching process described later. 'll in the air 13
Heating is performed at 0° C. for 30 minutes to thermally crosslink the Renost material and form a strong film. Furthermore, this improves the adhesion to the underlying multilayer gold 1!4Ti layer.

Next, the chromium layer configured as described above is etched. This is done by immersing the substrate on which the metal thin film layer and resist layer are formed in 36% hydrochloric acid. # of the lower layer of! Etching of the layer is carried out by immersion in an aqueous ammonium persulfate solution, followed by etching of the molybdenum layer.

This is done by immersion in an aqueous potassium 7-erythyanide solution. After all of the gold I4 thin film layer has been etched in this way, the Renost layer is peeled off at 80°C. % solution for 20 minutes. The stripping solution used here is usually a commercially available pIi type.

(3) Insulating Layer (Polyimide Resin 17) Film Forming Step A polyimide precursor having a composition as will be described later is applied onto the circuit board 1 after the etching step. This is done, for example, by the spinner method as described above, in which the stage is rotated for 10 seconds at, for example, 2000 rpm+*. This allows the polyimide precursor to be coated with a uniform thickness.

Subsequently, heating is performed at 80° C. for 40 minutes in the air to evaporate the solvent from the polyimide precursor and semi-dry it.

Next, the semi-dried polyimide precursor is subjected to a curing step. This is because by heat-treating the polyimide precursor, the molecules constituting the precursor are imidized to form the desired polyimide structure. . The processing conditions are
For example, using a conveyor-type continuous furnace, heating is performed for 1 hour at 400"cR in a nitrogen bath atmosphere. As a result, the polyimide precursor becomes the desired polyimide structure, and l!
The insulating film (polyimide resin 7I7) having a thickness of 10 μm is obtained.

(4) Insulating N (Polyimide Resin Layer 7) Processing Process This process is for forming through holes 5 in the polyimide resin layer 4, as shown in FIG. On the polyimide film after the curing treatment, 3μ of silicon oxide (Sin) is applied.
Sputtering is performed to obtain the film thickness of the ring. Subsequently, a positive renost was applied using the spinner method (1200 rpm, rotation for 10 seconds), and the mixture was heated at 85°C for 90 minutes in an air atmosphere.
Heating is performed for 0 minutes to semi-dry the entire resist. Next, the above-described contact exposure is performed to form a pattern for forming predetermined through holes 5, etc., and development is performed using an alkaline developer.
Heat treatment at 5°C for 30 minutes (post-bake shop J!!
The Rennost material is thermally crosslinked.

After this, ammonium hydrogen heptadide water! ? II I: Immersion and etching of silicon oxide. Subsequently, in order to peel off the Renost layer, 2
Immersed for 0 minutes. Thereafter, the polyimide resin layer 4 is etched according to the silicon oxide pattern. This is reactive ion etching i/! This is done using cra. Next, the silicon oxide that served as a mask layer for etching the polyimide resin layer is peeled off. This is done by immersing it in the aqueous ammonium hydrogen heptadide solution.

(5) Film formation process of second wiring layer 6 This is the first wiring layer IIA/ll shown in the above (I)-(1).
! The multilayer wiring circuit board 1 can be manufactured by repeating the processing steps 1 to 4.

(n) Remarks on the manufacturing process of polyimide precursor The Stn method of the polyimide precursor that is wetted in the manufacturing process of the circuit board 1 described in section (1) will be described.

N-methyl-2-pyrrolidone solution W70 og 2! Weigh into a flask. Add to this 2.5 noaminonitrobenzene 92. Add the solvent at 50°C while stirring to completely dissolve. 2.5 After the diaminonitrobenzene is completely dissolved, 124 g of pyromellitic anhydride is added little by little to the solution while stirring.

Allow to react in this state for 30 minutes. Thereafter, the system temperature is raised to 80° C., and the reaction is continued for an additional 30 minutes.

The inside of this reaction system is kept in a nitrogen bath atmosphere. The polyamide carboxylic acid thus obtained is used as a polyimide precursor.

O Acid anhydride 00 The inventor of the present invention has confirmed that the polyimide resin layers 4 and 7 manufactured using a polyimide precursor such as diamine polyamide carboxylic acid di exhibit the characteristics shown in Table 1 below. .

(III) Polyimide resin layer 4, 7 upstream wiring layer 3, 6
Regarding the reasons for limiting the film thickness in °9 (1) Regarding the polyimide resin layers 4 and 7 (a) When the film thickness of the polyimide resin layer 4.7 is 2μ or less ■Through pinholes that occur in the polyimide resin layer 4.7 Therefore, there is a risk that a short circuit will occur between the upper and lower wirings [3, G, and 9].

■When the circuit board 1 shown in No. 11XI has a multilayer structure, it is possible to flatten the unevenness caused by the patterning of the wiring layer of the insulating substrate 2@ of the polyimide resin layer, or the unevenness caused by through holes in the same polyimide resin layer. First, it becomes difficult to microfabricate the upper metal layer.

2) Increased capacitance causes signal waveform distortion when high frequency signals are used.

■It becomes difficult to control the characteristic impedance. Sunawa too,
Characteristic impedance compatible with integrated circuit chips (30~
The inventor of the present invention has confirmed that the polyimide resin layer needs to have a thickness of 2 to 50 .mu.m in order to suppress the resistance to 150 .OMEGA.

(a) When the film thickness is 50μ or more ■The volumetric stress of the polyimide resin layer increases, and the polyimide resin layer
The adhesion of the resin layer decreases, resulting in peeling.

■When the circuit board 1 has a multilayer structure due to thermal stress of the polyimide resin layer, stress is applied to the wiring #IN in the through hole B as shown in FIG. The reliability of electrical continuity between the second wiring layer 6 and the #1 wiring 411M3 is lost.

(2) Film thickness of 17110.11 (see Figure 2) (25
0 to 4,000 people) and (a) below 250 Å ■ Adhesive layer 10.11 (molybdenum, chromium, titanium, tungsten, etc.) and wiring layer 12 (tM, aluminum,
(e.g., gold) diffuses into each other due to heat, and the Kirkendall effect causes the wiring layer 12 to come into contact with the underlying insulating substrate 2 or polyimide resin layer 4.7, resulting in deterioration of adhesion strength. do.

(b) When the film thickness is 4000 Å or more ■ The residual stress (tensile stress) of the adhesive layer 10.11 becomes large, and the wiring layer 3.6.9 formed in a predetermined pattern
Cracks occur in the underlying polyimide resin layer at areas where stress is concentrated, such as the corners of the frame.

(3) Il of wiring layer 12! Regarding I-thickness 0.5 to 15 μm ring (a) When the film thickness is 0.5 μm or less ■ Electrical resistance value is inversely proportional to cross-sectional area, so in this case, the electrical resistance value becomes unnecessarily large, and the line base JR1
It cannot be used as

(If the film thickness is 15 μm or more, the wiring layer formed including this wiring #1112 is 4°6.
The residual stress of 9 is thick (and the underlying polyimide ff
1l! tFI! 4.7 etc., cracks occur.

(2) When processing (etching) the wiring layer 12, if the thickness a is large, the degree of etching in the width direction becomes unnecessarily large, making it difficult to process fine wiring.

(IV) Adhesion strength test method The present invention uses the circuit board 1 described above with reference to FIGS. 1 and 2 as an example thereof, but the object of the present invention is to In order to improve the adhesion strength between the polyimide resin layers 4 and 7 and the wiring layers 3.6.9 above and below them, a test piece 13 as shown in FIG. The adhesion strength between N14 and metal layer 15 was measured.

(1) Method for creating the test piece 13 ■ Film formation process for the polyimide resin layer 14 The polyimide precursor whose manufacturing process was explained in section (n) above is placed on the insulating substrate 16 made of a ceramic material, for example, using the spinneret described above. Next, the polyimide precursor is semi-dried by heating (pre-baking) at 80° C. for 40 minutes in the air. That is, using a conveyor-type continuous furnace, heating was carried out for about 1 hour at 400"c'R in a nitrogen γ gas atmosphere to thermally crosslink the m
Polyimide with a thickness of 10μ! to form a fat layer 14.

■Metal layer 15 film formation step Molybdenum of 0.2μ is deposited on the polyimide resin layer 14.
Tsuru and copper are formed to a thickness of 0.4 .mu.m by sputtering. M of the 3μ theory with copper on top! Formed on F7 by electrolytic plating.

■ Processing process of the metal layer 15 The spinner method (1000 rpm at 1000 rpm)
2 seconds) to apply a precursor of a neutral resist.

Thereafter, heating (brebake) was performed at 80°C for 40 minutes in an air atmosphere, and the contact exposure described above was performed using a 1 μm2 dot pattern mask. 30℃ inside
Heating (post-bake) is performed for 30 minutes to thermally crosslink the resist.

The resist on which the desired circuit wiring pattern has been baked is etched with copper by dipping it in an aqueous solution of ammonium persulfate.
Etching of the molybdenum layer is carried out by immersion in an aqueous solution of potassium 7-erythyanide.Then, in order to peel off the resist layer, a conventional commercially available stripping solution (80°C) is used.
Soak for 20 minutes.

■Solder dipping process molten solder (Pb:5n=60:40.250℃)
Dip for a second.

■Measurement method Diameter 1.51tvaf) tRI11wo 1am”
f) First soldering perpendicularly to the 418 layer 15 After fixing the insulating substrate 16, the copper wire is pulled up perpendicularly in the opposite direction to the insulating substrate 16. In this way, the load applied to the copper wire when the metal layer 15 is peeled off is taken as the adhesion strength.

(V) Using polyimide 1fJflt shown by the general formula of the measurement results, 1
A high temperature storage test is conducted in an air atmosphere at 50°C. At this time, the test and adhesion strength measurements are carried out as explained in the item "(V) Measurement method" above at each time interval as shown in the PIS 3 table below. At this time, the functional groups R1, used in the polyimide resin used according to the present invention and the conventional polyimide resin used as a comparative example,
R2 is as shown in Table 2 below.

Table 2 The results of the adhesion strength test as described above for various combinations of functional groups R1 and R2 are shown in Table 3 below.

(Margins below) The symbol “-” in the column of polyimide structure in Table 3 is
Each of the prior art electron-donating groups shown in Table 2 is used in any combination.

As described above, in the circuit board 1 of this embodiment, ffi'! between the polyimide resin layer 4.7 and the wiring layers 3 and 6.9! Since the strength is improved and the reliability regarding adhesion strength under a thermal environment is improved, the multilayer wiring circuit board 1 can be made to have a much more useful appearance.

As described above, the polyimide resin layers 4 and 7 and the
3.6.9 realizes a mutually stable chemical bond, so deterioration of adhesion strength is prevented during the photolithography process in the multilayer wiring manufacturing process and heat treatment in the polyimide, K-A process, etc. , distribution during the manufacturing process
@3.6.9 @ separation is prevented.

This prevents the connection failure at the through-hole portion of the polyimide resin layer 4 as described above. Further, when mounting an integrated circuit with a chip using the circuit board 1 of this embodiment, deterioration of the adhesion strength of the gold X film during a heat treatment process or the like can be prevented.

Metal I of the wire bonding part, wire bonding pad, and solder bump part in the above-mentioned integrated circuit element
I! Deterioration of adhesion strength is prevented.

In addition, the bond between the metals of the J polyimide resin layer is stable even during the heat process when electronic circuits and the like are mounted on the circuit board 1, and the subsequent reliability is significantly improved.

FIG. 4 is a plan view of an integrated circuit device 17 according to another embodiment of the present invention, and FIG. 5 is a sectional view taken along the section line V--■ in FIG. This embodiment will be described with reference to FIGS. 4 and 5. A polyimide resin layer 20, a wiring layer 21, and a polyimide resin layer 22 are formed on an insulating substrate 19 made of a ceramic material or the like through the same manufacturing steps as those of the first embodiment described above. Such an insulating substrate 1
9. In the puff cage 18 consisting of the polyimide resin layers 20, 22 and the wiring layer 21, the peripheral edge of the integrated circuit cable 17gA of the uppermost polyimide resin layer 22 is peeled off and removed as shown in FIG. The wiring layer 21 and
For example, wire bonding.

The puff cage 18 that stores the integrated circuit device 17 in this way
Processes using various thermal atmospheres are also performed in the manufacturing process of !, as shown in the first example above. ! ! By employing this manufacturing process, the puff cage 18 can also achieve the same effects as those described in the previous embodiments.

Effects As described above, according to the present invention, the adhesion strength between the polyimide resin layer and the metal thin film formed on the surface of the polyimide resin layer is significantly improved. The reliability of F bonding strength is significantly improved compared to the conventional technology even in a thermal environment. Therefore, even under various heat treatment processes in the process of manufacturing electronic circuit components and heat generation treatment processes when using electronic circuit components as products, the metal thin film realized as circuit wiring etc. There is no peeling from the surface, significantly improving quality and reliability.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a circuit board 1 according to an embodiment of the present invention, tA
2 is a sectional view of the vicinity of the second wiring layer 6, FIG. 3 is a sectional view of a test piece 13 for measuring adhesion strength, and FIG. 4 is an integrated circuit X element 17 used as another embodiment of the present invention. FIG. 5 is a simplified plan view of the puff cage 18 of FIG.
- It is a sectional view seen from ■. 1... Circuit board, 2.16... Insulating board, 3...
PJJ1 wiring layer, 4, 7, 14, 20. 22... Polyimide resin layer, 5.8... Through hole, 6... Second wiring #1ffi, 9... Third wiring layer, 10. 11-
...Contact layer, 12...Wiring layer, 17...Integrated circuit element, 18...Package agent Patent attorney Number of strokes Keiichi Part 2 Figure 5 Procedural amendment (method) % formula % 2. Invention Name of electronic circuit component 3, relationship to the case of the person making the amendment Applicant's address name (663) Kyocera Corporation Representative 4, agent address 1-13-38 Nishihonmachi, Nishi-ku, Osaka Shinko-san Building Country Equipment EX 0525-5985 1NTAPT
J International FAX GIII & GII (06)538-
02476, the seal of the patent applicant's agent on W4 document subject to amendment and Specification 7, contents of the amendment (1) The seal of the patent applicant's agent is as shown in the attached sheet. (2) Engraving of the specification (no changes to the contents). that's all

Claims (7)

[Claims] (1) In electronic circuit parts made by forming a metal thin film on a polyimide resin formed on the surface of a base material, polyimide resin has general formulas, ▲mathematical formulas, chemical formulas, tables, etc.▼... (1) An electronic circuit component characterized in that the type of functional group represented is selected, and at least one of the functional groups R1 and R2 is an electron-withdrawing group. (2) The above electron-withdrawing group has a general formula, ▲mathematical formula, chemical formula, table, etc.▼(NO_2)_n,
▲There are mathematical formulas, chemical formulas, tables, etc.▼ (n = 1 or 2) (bond = 2 or 4) ▲There are mathematical formulas, chemical formulas, tables, etc.▼ (COH)_n (n = 1 or 2) (bond = 2 or 4) The electronic circuit component according to claim 1, wherein the electronic circuit component is selected from the types represented by: 2 or 4). (3) At least the surface of the metal thin film that comes into contact with the polyimide resin is composed of at least one of molybdenum (Mo), chromium (Cr), titanium (Ti), and tungsten (W), or two or more of them. An electronic circuit component according to claim 1, characterized in that it is made of an alloy of the type. (4) The electronic circuit component according to claim 1, wherein at least one of ceramics, glass, and metal is selected as the base material. (5) The electronic circuit component according to claim 1, wherein the polyimide resin layer is formed to have a layer thickness of 2 to 50 μm. (6) The electronic circuit component according to claims 1 and 3, wherein the metal thin film is formed to a thickness of 250 to 4000 Å. (7) At least one of aluminum (Al), copper (Cu), and gold (Au) is selected for the portion of the metal thin film that does not contact the polyimide resin layer. The electronic circuit component described in item 3.