JPS63159441U - - Google Patents
Info
- Publication number
- JPS63159441U JPS63159441U JP5178487U JP5178487U JPS63159441U JP S63159441 U JPS63159441 U JP S63159441U JP 5178487 U JP5178487 U JP 5178487U JP 5178487 U JP5178487 U JP 5178487U JP S63159441 U JPS63159441 U JP S63159441U
- Authority
- JP
- Japan
- Prior art keywords
- data
- input
- parallel
- output
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Information Transfer Systems (AREA)
Description
第１図はこの考案の一実施例である入出力デー
タ交換装置のシステム図、第２図は第１図におけ
るリモート入出力装置の内部構成を示すブロツク
図、第３図は従来の入出力データ交換装置のシス
テム図である。
１１：第１のプロセツサ、１２：直列伝送路、
１３：第２のプロセツサ、１４：リモート入出力
装置、１５：並列データバス、１６：伝送入出力
制御部、１７：並列バス入出力制御部、１８：伝
送用レシーバ／ドライバ部。
Fig. 1 is a system diagram of an input/output data exchange device that is an embodiment of this invention, Fig. 2 is a block diagram showing the internal configuration of the remote input/output device in Fig. 1, and Fig. 3 is a system diagram of a conventional input/output data exchange device. FIG. 2 is a system diagram of a switching device. 11: first processor, 12: serial transmission line,
13: second processor, 14: remote input/output device, 15: parallel data bus, 16: transmission input/output control section, 17: parallel bus input/output control section, 18: transmission receiver/driver section.
Claims (1)
能を備えた第１のプロセツサと、並列データバス
を介して並列データの入出力伝送機能を備えた第
２のプロセツサとの間の入出力データ交換装置に
おいて、前記第１のプロセツサと第２のプロセツ
サとの間に、少なくとも直列データを並列データ
に変換して並列データバスに出力し並列データバ
スからの並列データを直列データに変換して直列
伝送路に出力する並列バス入出力制御部を有する
伝送入出力制御部を備えたことを特徴とする入出
力データ交換装置。 Input/output data exchange between a first processor equipped with a serial data input/output transmission function via a serial transmission line and a second processor equipped with a parallel data input/output transmission function via a parallel data bus. In the apparatus, between the first processor and the second processor, at least serial data is converted into parallel data and outputted to a parallel data bus, and parallel data from the parallel data bus is converted into serial data and serially transmitted. 1. An input/output data exchange device comprising a transmission input/output control section having a parallel bus input/output control section for outputting data to a parallel bus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5178487U JPS63159441U (en) | 1987-04-06 | 1987-04-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5178487U JPS63159441U (en) | 1987-04-06 | 1987-04-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63159441U true JPS63159441U (en) | 1988-10-19 |
Family
ID=30876366
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5178487U Pending JPS63159441U (en) | 1987-04-06 | 1987-04-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63159441U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS605371A (en) * | 1983-06-24 | 1985-01-11 | Oki Electric Ind Co Ltd | System bus extension system |
-
1987
- 1987-04-06 JP JP5178487U patent/JPS63159441U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS605371A (en) * | 1983-06-24 | 1985-01-11 | Oki Electric Ind Co Ltd | System bus extension system |
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