JPS63110947U - - Google Patents
Info
- Publication number
- JPS63110947U JPS63110947U JP371587U JP371587U JPS63110947U JP S63110947 U JPS63110947 U JP S63110947U JP 371587 U JP371587 U JP 371587U JP 371587 U JP371587 U JP 371587U JP S63110947 U JPS63110947 U JP S63110947U
- Authority
- JP
- Japan
- Prior art keywords
- data
- parallel
- interface unit
- input
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 230000002457 bidirectional effect Effects 0.000 description 1
Description
第１図は本考案を８ビツトのデータ入出力に適
用した場合のデータ入出力回路の構成図、第２図
は、従来のマイクロコンピユータシステムにおけ
るプリンタインターフエイス回路の構成図である
。
１…パラレルインターフエイスユニツト、２，
３…双方向バツフア、４…接続部、１１…パラレ
ルインターフエイスユニツト、１２…バツフア、
１３…接続部。
FIG. 1 is a block diagram of a data input/output circuit when the present invention is applied to 8-bit data input/output, and FIG. 2 is a block diagram of a printer interface circuit in a conventional microcomputer system. 1...parallel interface unit, 2,
3... Bidirectional buffer, 4... Connection section, 11... Parallel interface unit, 12... Buffer,
13... Connection part.
Claims (1)
に必要な制御信号をプログラムにより制御可能な
パラレルインターフエイスユニツトとプリンタに
ケーブルを介して接続可能な接続部と双方向にデ
ータ伝送可能で前記パラレルインターフエイスユ
ニツトと前記接続部の間に接続され、このパラレ
ルインターフエイスユニツトによりデータ伝送方
向が制御されるバツフアを含むことを特徴とする
データ入出力回路。 A parallel interface unit that can input/output parallel data and control signals necessary for input/output of parallel data by a program, a connecting part that can be connected to a printer via a cable, and a parallel interface that can transmit data bidirectionally. 1. A data input/output circuit comprising a buffer connected between the interface unit and the connection section, the data transmission direction of which is controlled by the parallel interface unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP371587U JPS63110947U (en) | 1987-01-13 | 1987-01-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP371587U JPS63110947U (en) | 1987-01-13 | 1987-01-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63110947U true JPS63110947U (en) | 1988-07-16 |
Family
ID=30783728
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP371587U Pending JPS63110947U (en) | 1987-01-13 | 1987-01-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63110947U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996027828A1 (en) * | 1995-03-06 | 1996-09-12 | Tadahiko Hisano | I/o expansion device and apparatus using the same |
-
1987
- 1987-01-13 JP JP371587U patent/JPS63110947U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996027828A1 (en) * | 1995-03-06 | 1996-09-12 | Tadahiko Hisano | I/o expansion device and apparatus using the same |
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