JPS63157935U - - Google Patents
Info
- Publication number
- JPS63157935U JPS63157935U JP1987051122U JP5112287U JPS63157935U JP S63157935 U JPS63157935 U JP S63157935U JP 1987051122 U JP1987051122 U JP 1987051122U JP 5112287 U JP5112287 U JP 5112287U JP S63157935 U JPS63157935 U JP S63157935U
- Authority
- JP
- Japan
- Prior art keywords
- pad electrode
- semiconductor device
- less
- long side
- short side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/25—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
Description
第１図は本考案の第１の実施例の半導体素子の
パツド電極周囲の平面図、第２図は本考案の第１
の実施例の半導体素子の接続後の状態を示す平面
図、第３図は第２図のＡ―Ａ′線の断面図、第４
図は本考案の第２の実施例の半導体素子のパツド
電極周囲の平面図、第５図は従来の半導体素子の
パツド電極周囲の平面図である。
１……半導体素子、２……パツド電極、３……
Ａｌ配線、４……素子領域、５……外部配線、６
……埋め込み樹脂、７……パツシベーシヨン膜、
８……酸化シリコン膜、９……Ｓｉ、１０……基
板。
FIG. 1 is a plan view of the area around the pad electrode of a semiconductor device according to the first embodiment of the present invention, and FIG.
3 is a plan view showing the state after connection of the semiconductor element of the embodiment, FIG. 3 is a sectional view taken along line A-A' in FIG.
This figure is a plan view of the area around the pad electrode of a semiconductor device according to a second embodiment of the present invention, and FIG. 5 is a plan view of the area around the pad electrode of a conventional semiconductor device. 1... Semiconductor element, 2... Pad electrode, 3...
Al wiring, 4...Element area, 5...External wiring, 6
...embedding resin, 7...passivation film,
8...Silicon oxide film, 9...Si, 10...Substrate.
Claims (1)
において、前記パツド電極の短辺を前記パツド電
極の長辺の１／２以下の長さとしたことを特徴と
する半導体素子。 (2) 前記パツド電極の前記短辺は３０μｍ以下
、前記長辺は６０μｍ以上であることを特徴とす
る実用新案登録請求の範囲第１項記載の半導体素
子。[Claims for Utility Model Registration] (1) A semiconductor device having a pad electrode for external connection, characterized in that the short side of the pad electrode is 1/2 or less of the long side of the pad electrode. element. (2) The semiconductor device according to claim 1, wherein the short side of the pad electrode is 30 μm or less, and the long side is 60 μm or more.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987051122U JPS63157935U (en) | 1987-04-03 | 1987-04-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987051122U JPS63157935U (en) | 1987-04-03 | 1987-04-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63157935U true JPS63157935U (en) | 1988-10-17 |
Family
ID=30875094
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987051122U Pending JPS63157935U (en) | 1987-04-03 | 1987-04-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63157935U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60132351A (en) * | 1983-12-21 | 1985-07-15 | Hitachi Ltd | Semiconductor device |
| JPS6242441A (en) * | 1985-08-19 | 1987-02-24 | Nec Corp | Integrated circuit device |
-
1987
- 1987-04-03 JP JP1987051122U patent/JPS63157935U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60132351A (en) * | 1983-12-21 | 1985-07-15 | Hitachi Ltd | Semiconductor device |
| JPS6242441A (en) * | 1985-08-19 | 1987-02-24 | Nec Corp | Integrated circuit device |