JPS63155818A - Switched capacitor type voltage comparator - Google Patents

Abstract

PURPOSE:To compare voltages with various kinds of reference voltages with the supply of only one reference voltage by connecting a capacitor in parallel connection to a capacitor to hold a reference signal via switches, and making a resulting divided voltage a new reference voltage. CONSTITUTION:In a status in which the capacitor 13 is not connected to the capacitor 1, a reference voltage Vref is supplied to the capacitor 1 at a first time and let the capacitor 1 hold the Vref, and at a second timing, an input signal Vin is inputted, and the voltages Vref and Vin are compared with each other through an inversion amplifier 3. Then, in a status in which the capacitor 13 is connected to the capacitor 1 in parallel connection via switches 14, 16 voltage Vref held at the first timing is divided to C1/(C1+C2).Vref at the second timing, and at the same time, the signal Vin is inputted, and the voltage Vin is compared with the reference voltage C1/(C1+C2).Vref which is different from the voltage Vref through the amplifier 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a switched capacitor type voltage comparator composed of a switch, a capacitor, and an amplifier, and in particular,
The present invention relates to a switched capacitor type voltage comparator suitable for voltage comparison using a reference voltage different from a reference voltage applied to the voltage comparator.

[Conventional technology]

FIG. 7 is a circuit diagram of a conventional switched capacitor type voltage comparator. In FIG. 7, l is a capacitor for holding the reference voltage applied to the voltage comparator, 2 is a capacitor for holding the offset voltage in order to cancel the offset voltage of the amplifier, 3 is an inverting amplifier,
4 is a switch that is turned off at the first timing and turned on at the second timing; 5 to 7 are switches that are turned on at the first timing;
A switch that turns off at the second timing, 8 is an input signal terminal, 9 is a reference voltage input terminal, 10 is an input signal source that generates the input signal Vjn, 11 is a reference voltage source that generates the reference voltage Vref, 12 is an output terminal It is.

The operation of this voltage comparator can be divided into two timings. First, the operation at the first timing will be explained. FIG. 8 shows the equivalent circuit of the voltage comparator at the first timing. At the first timing,
A reference voltage Vref is held in the capacitor 1. Furthermore, since the input terminal and output terminal of the inverting amplifier 3 are connected by the switch 7, the input voltage V of the inverting amplifier 3 is
, 4 are equal to the output voltage Vo, and the amplification degree of the inverting amplifier 3 is -A.

Letting the input offset voltage be Voff, the input voltage Vi of the inverting amplifier 3 is Vl = V.

= −AV, 4' = −A −(VJl−Voff) −”・+
1),', VA = π7Voff in V. ff ('-'A>1)...
-(2), and the input offset voltage Voff of the inverting amplifier 3 is held in the capacitor 2.

Next, the operation at the second timing will be explained.

FIG. 9 shows the equivalent circuit of the voltage comparator at the second timing. Capacitor 1 holds the reference voltage Vref, and capacitor 2 holds the input offset m voltage V of the inverting amplifier 3. Because it holds ff.

The input potential vA of the inverting amplifier 3 is calculated as follows, considering the direction of each potential: V,4 = Vin Vref + Voff
-...(3). Therefore, the output voltage (■0) of the inverting amplifier 3 is (■). =-A・y, / =-A・(V, (Voff) =-person' (Vin −Vref) −”・(
41, and the input offset voltage V of the inverting amplifier 3. f
f is canceled and input voltage Vin and reference voltage Vre
The difference in f is amplified and scaled by the inverting amplifier 3, and the result is the output terminal 1.
Appears in 2. In other words, the input voltage "I/in" and the reference voltage Vref are compared.

Incidentally, as a publicly known example related to the switched capacitor type voltage comparator explained above, I.E.
Journal Off Solid-State Circuits,
Nissii Vol. 13, June 1978, pages 294 to 298 (IEEE, Jou-rnal of 5o
lid-8tate C1rCuits, vol, 5C
-13, June 1978゜pp-294-298)
can be mentioned.

[Problem that the invention seeks to solve]

In the above-mentioned prior art, one type of reference voltage is applied to the voltage comparator and the voltage comparison operation is performed using the reference voltage.

The purpose of the present invention is to simply provide a reference voltage of lfl class,
An object of the present invention is to provide a switched capacitor type voltage comparator capable of voltage comparison operations using various reference voltages.

[Means for solving problems]

The above purpose is to connect a capacitor in parallel with a capacitor that holds a reference voltage through a switch, control the switch to divide the reference voltage that was initially held, and convert the divided voltage into a new one. This is achieved by using a reference voltage.

[Effect]

A first capacitor that holds a given reference voltage and a third capacitor that is provided in parallel with the first capacitor via a switch are connected in parallel under the control of the switch, and the reference voltage is held in the first capacitor. The reference voltage that had been divided is divided by the third capacitor, and the divided reference voltage is
The voltage between the electrodes of the capacitor (third capacitor) becomes the new reference voltage of the voltage comparator.

This makes it possible to realize a switched capacitor type voltage comparator that can perform voltage comparison operations at various reference voltages different from the reference voltage by simply supplying one type of reference voltage to the voltage comparator. .

〔Example〕

A fifth embodiment of the present invention will be described below with reference to FIG.

1 is a capacitor (capacitance value C,) for holding the reference voltage applied to this voltage comparator, and '13 is a capacitor (capacitance value C,) for dividing the reference voltage held in capacitor 1.
2 is a capacitor that holds the offset voltage in order to cancel the offset voltage of the amplifier, 3 is an inverting amplifier, 4 to 7 are switches that are periodically turned on and off by clock pulses, and 14 to 17 are switches that are turned on and off periodically with clock pulses. A switch that can be switched between turning on and off periodically with clock pulses and fixing it to either on or off, 8 is an input signal terminal, 9 is a reference voltage input terminal, 10 is an input signal v
11 is a reference voltage source that generates a reference voltage Vref, and 12 is an output terminal. The switches 4 to 7 are supplied with two opposing phases of clocks φ1 and φ, and when the clock pulses are at a high level H, the switches 4 to 7 are
7 is turned on, clock φ, and φ! do not become high level H at the same time. In Figure 1, switch 4~
The clock attached to 7 indicates that the switches 4 to 7 are turned on when the clock is at a high level H, and the figure shows that the clock φ1 is at a high level H. There is. FIG. 2 shows a timing chart of clocks φ and φ. The period of each clock is T.

Next, the operation of this embodiment will be explained by returning to FIG. In this embodiment, the following two types of operations are performed. 1st
The operation of M2 is a voltage comparison operation using the reference voltage applied to the voltage comparator, and the operation of M2 is a voltage comparison operation using a reference voltage different from the applied reference voltage. Each operation will be explained below.

The first operation is a voltage comparison operation using the reference voltage applied to the voltage comparator. In the first operation, the switches 14 to 14 can be switched between periodically turning on and off with clock pulses and fixing them to either on or off.
17, switch 15, 17 is on, switch 14
, 16 are fixed to off. Therefore, both electrodes of the capacitor 13 are kept grounded.

First, when clock φ is at high level H, switch 5
, 6.7 are turned on, and the reference voltage Vre is applied to this voltage comparator.
A reference voltage source 11 that supplies f is connected through a switch 5, a node between capacitors 1 and 2 is grounded through a switch 6, and an input terminal and an output terminal of an inverting amplifier 3 are connected through a switch 7. connected. FIG. 3 is an equivalent circuit diagram of this embodiment column when the clock φ1 is at a high level H.

Therefore, the reference voltage Vraf is stored in the capacitor 1, and the input offset voltage Voff of the inverting amplifier 3 is stored in the capacitor 2.

Next, when the clock φ becomes a low level L and the clock φ becomes a high level H, the switches 5 and 6.7 are turned off and the switch 4 is turned on instead, so the reference voltage source 11 is cut off. The node between capacitor l and capacitor 2 is no longer grounded, the input terminal and output terminal of inverting amplifier 3 are disconnected, and input signal source 10 that generates input signal Vin is now connected via switch 4. be done.

FIG. 7 is an equivalent circuit of this embodiment when the clock φ is at a high level H. Since the capacitor 1 holds the reference voltage Vref and the capacitor 2 holds the input offset voltage Voff of the inverting amplifier 3, the input potential vA of the inverting amplifier 3 is determined by considering the direction of each potential, VA=
Min Vref + vor f”...
It becomes +51. Since this is input to the input terminal of the inverting amplifier 3 which has the potential of the input offset voltage Voff, the input offset voltage is canceled and the actual input potential y, / of the inverting amplifier 3 is VA' = Vin - Vref - ”・(
It becomes 61. Therefore, input voltage Vin and reference voltage Vre
The difference in f is amplified and magnified by the inverting amplifier 3 and is output from the output terminal 1.
Appears in 2. In other words, the input voltage vin and the reference voltage Vr
This means that ef has been compared.

Next, the second operation will be explained. The second operation is a voltage comparison operation using a reference voltage different from the given reference voltage. In the second operation, the switches 14 to 17, which can be switched between being turned on and off periodically by clock pulses and being fixed to either on or off, are connected to switches 14 to 17, in which the clock φ1 is at a high level H. The switches 14 and 16 are turned on when the clock φ is at a high level H.

First, when the clock φ is at a high level H, the state is the same as when the clock φ of the first operation is at a high level H,
As shown in FIG. 6, the capacitor l has a reference voltage Vre
f is stored in the capacitor 2, and the input offset voltage V of the inverting amplifier 3 is stored in the capacitor 2. ff is stored. capacitor 1
3 has both electrodes grounded via switches 15 and 17.

Next, when the clock φ becomes a low level L1 and the clock φt becomes a high level H, the switches 5 to 7, 15, and 17 are turned off, and the switches 4, 14, and 16 are turned on instead. Therefore, the reference voltage source 11 is disconnected, and the node between capacitor 1 and capacitor 2 is no longer grounded.
Also, the input terminal and output terminal of amplifier 3 are disconnected,
This time, input signal source 10 generating input signal vin is connected via switch 4, and capacitor 13 is connected in parallel to capacitor 1 via switch 1416. FIG. 5 is an equivalent circuit of this embodiment when the clock φ is at a high level H.

Since the capacitor 13 is connected in parallel to the capacitor 1, the reference voltage Vref held by the capacitor 1 is divided by the capacitor 13, and the capacitor 2 is connected to the input offset voltage V of the inverting amplifier 3. ff is held, the input potential VA of the inverting amplifier 3 is as follows, taking into consideration the direction of each potential. This is the input offset i
t pressure V. Since it is input to the input terminal of the inverting amplifier 3 which has a potential of ff, the input offset [pressure is canceled;
The actual input potential ■A' of the inverting amplifier 3 becomes "'=vin"'Vref c1+ °°'8', and the input voltage Vin is different from the reference voltage Vref given to this voltage comparator. Above the reference voltage 'VrefC
, it has been compared with Jusei.

In the embodiments described above, voltage comparison can be performed in a time-division manner using two types of reference voltages by supplying one type of reference voltage to one switched capacitor type voltage comparator. Further, by adding a capacitor 13 and switches 14 to 17 for dividing the reference voltage held in the capacitor 1, it is also possible to perform voltage comparison using two or more types of reference voltages.

Next, a second embodiment of the present invention is shown in FIG.

This practical example uses a switched capacitor type voltage comparator that performs the first operation of the first embodiment, that is, a voltage comparison operation at a given reference voltage, and the second operation of the first embodiment, that is, , a switched capacitor type voltage comparator that performs a voltage comparison operation using a reference voltage different from a given reference voltage. Two switched capacitor type voltage comparators are provided at the same time. In FIG. 6, % 101 and 103 correspond to the capacitor 1 in the first embodiment (FIG. 1), and are capacitors for holding the reference voltage applied to the voltage comparator, and 102 and 104 are the first capacitors. A capacitor for holding the offset it pressure of the amplifier, which corresponds to capacitor 2 in the embodiment, 1o5 is capacitor 1 in the first embodiment.
3, a capacitor for dividing the voltage of the reference held in capacitor 103, 106°10
7 is an inverting amplifier; 108 to 111 are switches that are periodically turned on and off by clock pulses and correspond to switches 4 to 7 in the first embodiment; 111 to 115 are switches 4 to 7 in the first embodiment; The corresponding switches 116 to 119, which are periodically turned on and off by clock pulses, correspond to the switches 14 to 17 in the second operation of the first embodiment.
A switch that turns on and off periodically with clock pulses, 1
24 is a first output terminal that corresponds to the output terminal ratio in the first operation of the first embodiment, and 125 is a second output that corresponds to the output terminal 12 in the second operation of the first embodiment. It is a terminal. Further, a common input signal source 122 and a reference voltage source 123 are connected to the two switched capacitor type voltage comparators. Therefore, the first output terminal 12
4 outputs the comparison result between the reference voltage applied to the voltage comparator and the input voltage, and the second output terminal 125 outputs the comparison result between the reference voltage applied to the voltage comparator and the input voltage. The comparison result with the voltage will be output. These voltage comparison operations are the same as described in the first embodiment.

In this embodiment, by applying one type of reference voltage to the two Swiss/Tito capacitor type voltage comparators, each voltage comparator can simultaneously perform voltage comparisons using different reference voltages. Further, by further providing a switched capacitor type voltage comparator having a capacitor ios having a different capacitance value, it is also possible to perform voltage comparison using two or more types of reference voltages. Therefore, when a group of voltage comparators with different reference voltages are integrated into an IC, a reference voltage source that generates a different reference voltage to be applied to each voltage comparator is separately mounted on the IC, or IC
There is no need to separately prepare external reference voltage sources that generate different reference voltages and take in the respective reference voltages from separate pins of the IC.

〔Effect of the invention〕

According to the present invention, by simply applying one type of voltage to the voltage comparator, voltage comparison operations can be performed at various reference voltages different from the reference voltage.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the first embodiment of the present invention, FIG. 2 is a timing chart of clocks φl and φ, and FIG. 3 is a clock φ1 in the first operation of the first embodiment of the present invention. , is an equivalent circuit diagram when , is at a high level H, and FIG.
FIG. 5 is an equivalent circuit diagram when the clock φ is at a high level H in the first operation of the first embodiment of the present invention.
6 is a circuit diagram showing the second embodiment of the present invention, and FIG. 7 is a circuit diagram of a conventional switched capacitor type voltage comparator.
FIG. 8 is an equivalent circuit diagram of a conventional switched capacitor type voltage comparator at the first timing, and FIG. 9 is a circuit diagram of the conventional switched capacitor type voltage comparator at the second timing. be. In Figures 1.2, 3, 4, 6, 7.8, 1, 2,
13... Capacitor 3... Inverting amplifier 4-7. 14-17... Switch 8... Input signal terminal 9... Reference voltage input terminal 10... Input signal source 11... Reference voltage Source 1
2...Output terminals 101-105...Capacitors 106, 107...Inverting amplifiers 108-119...Switches 120...Input signal terminals 121...Reference voltage input terminals 122... - Input signal source 123... Reference voltage source 124, 125... Output terminal Q -12 concave seven reading. Discussion 3 Figure t 4 Figure 5

Claims (1)

[Claims] 1) A first capacitor holding a reference voltage and one electrode of the first capacitor are connected to a reference voltage input terminal at a first timing, and an input signal is connected at a second timing. a switch circuit connected to the terminal; a second capacitor having one electrode connected to the other electrode of the first capacitor; and a node connecting the first capacitor and the second capacitor connected to the first capacitor. a switch circuit that is grounded at a timing of , an amplifier whose input terminal is connected to the other electrode of the second capacitor, and a switch circuit that connects the input terminal and output terminal of the amplifier at a first timing. is configured, inputs the reference voltage at the first timing, and inputs the reference voltage at the second timing.
In a switched capacitor type voltage comparator that inputs an input signal at the timing of A capacitor and a switch circuit are provided, and the reference voltage held in the first capacitor at the first timing is changed to the reference voltage held in the first capacitor at the second timing.
A switched capacitor type voltage comparator circuit, characterized in that it has a function of comparing voltages using a reference voltage different from the reference voltage given to the voltage comparator by dividing the voltage by a capacitor and simultaneously inputting an input signal. . 2) The switched capacitor type voltage comparator according to claim 1, further comprising a switch for controlling whether or not the reference voltage held in the first capacitor is divided by the third capacitor; By controlling the voltage comparator, a function is provided to perform two operations in a time-sharing manner: voltage comparison using a reference voltage given to the voltage comparator and voltage comparison using a reference voltage different from the reference voltage. A switched capacitor type voltage comparator featuring: 3) A switched capacitor type voltage comparator that compares voltages using a given reference voltage, and a switched capacitor type voltage comparator that compares voltages using a reference voltage different from the given reference voltage as claimed in claim 1. By applying the same input signal and the same reference voltage to each voltage comparator, the voltage comparison result at the reference voltage applied to the input signal and the voltage comparison result at a reference voltage different from the reference voltage can be compared. A switched capacitor type voltage comparator characterized by simultaneously obtaining voltage comparison results.