JPH06232706A - Comparator - Google Patents

Abstract

PURPOSE:To compensate an input offset voltage by providing a capacitor storing an input offset voltage and 1st, 2nd and 3rd switches through which the input offset voltage is applied to the comparator. CONSTITUTION:Let a voltage inputted to input terminals 1, 2 respectively be V1, V2, an input voltage to a 2nd input 20 of an operational amplifier 4 be V3 and its output voltage be VOUT, then in the initial state where switches S1, S2 are closed and a switch S3 is open, an input offset voltage VOS is stored in a capacitor C. As a result, a voltage V3 (=V2+VOS) is inputted to the 2nd input 20 of the operational amplifier 4. When the switches S1, S2 are open and the switch S3 is closed, the voltage V3 is latched and when the voltage 1 inputted to the input terminal 1 increases and the voltage V2 inputted to the input terminal 2 is the same as the voltage V1, the output is inverted and the output voltage VOUT is outputted from the comparator.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a comparator, and more particularly to a compensation circuit for an input offset voltage.

[0002]

2. Description of the Related Art As shown in FIG. 5, a conventional comparator 4'has a structure consisting of two inputs, an input terminal 1 and an input terminal 2, and an output of an output terminal 3.

Next, the operation will be described with reference to FIG. 3 showing the relationship between the input voltage V1 and the input voltage V2 to the input terminal 1 and the input terminal 2 and the output voltage VOUT. Figure 3
When the input voltage V1 is raised with respect to the reference input voltage V2, the added value (V2 + VO) of the input offset voltage VOS of the comparator 4'and the input voltage V2 is obtained.
At the point R where S) and the input voltage V1 become equal, the output voltage VOUT is inverted and output.

[0004]

This conventional comparator 4 '.
Then, since the input offset voltage VOS arbitrarily changes due to manufacturing variations in the CMOS transistors that form the comparator, it is difficult to compare the input voltage V1 and the input voltage V2 with high accuracy.

The object of the present invention is to solve the above problems,
An object of the present invention is to provide a comparator capable of comparing the input voltages V1 and V2 with high accuracy.

[0006]

A first comparator according to the present invention has an operational amplifier, a third switch connected between a first input and a first input terminal of the operational amplifier,
A first switch connected between an output of the operational amplifier and a second input, and a second input of the operational amplifier and a second switch
Of the operational amplifier and a second switch connected between the first input and the second input terminal of the operational amplifier.

The configuration of the second comparator of the present invention is the same as that of the first comparator.
In the comparator, the first resistance is interposed between the second switch and the second input terminal, and the second resistance is interposed between the second switch and the output terminal. Is characterized by.

[0008]

The present invention will be described below with reference to the drawings. FIG. 1 is an equivalent circuit showing a comparator of the first embodiment of the present invention.

In FIG. 1, an operational amplifier 4 is used in this embodiment.
A third switch S3 connected between the first input 10 and the first input terminal 1 of the switch, a switch S1 connected between the output of the operational amplifier 4 and the second input 20, A capacitor C connected between the second input 20 and the second input terminal 2 of the operational amplifier 4, and a switch connected between the first input 10 and the second input terminal 2 of the operational amplifier 4. And S2.

Next, the operation of this embodiment will be described with reference to the switch input VS.
1, VS2 and VS3, the voltages V1 and V2 input to the input terminals 1 and 2, and the time variation of the input voltage V3 to the second input 20 of the operational amplifier 4 and the output voltage VOUT are shown in FIG. explain.

In FIG. 4, in the initial state in which the switches S1 and S2 are turned on and the switch S3 is turned off,
The input offset voltage is stored in the capacitor C, and V3 (= V2 + VOS) is stored in the second input 20 of the operational amplifier 4.
Is entered. Then, the switches S1 and S2 are turned off.
When F is turned on and the switch S3 is turned on, V3 is held, and when the voltage V1 input to the input terminal 1 is increased, the voltage V2 input to the input terminal 2 and the V1 are the same. When the voltage is reached, the output is inverted and a comparator that outputs the output voltage VOUT is obtained.

FIG. 2 is an equivalent circuit diagram showing a comparator of the second embodiment of the present invention. In FIG. 2, in the second embodiment, the resistor R1 is connected between the switch S2 and the input terminal 2 of the first embodiment, and the resistor R2 is connected between the switch S2 and the output terminal 3. A comparator having the structure, in which the output voltage VOUT of the first embodiment is amplified by R2 / R1 times and output, is obtained.

Here, the operational amplifier is an operational amplifier.

[0014]

As described above, the present invention compensates the input offset voltage by providing at least the capacitor for storing the input offset voltage and the switch for supplying the input offset voltage to the capacitor. This makes it possible to compare two input voltages with high accuracy.

According to the simulation result of the comparator based on the present invention, the effect that the conventional comparator having the offset voltage of 100 mV is reduced to 4 mV or less is obtained.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of a comparator according to a first embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of a comparator according to a second embodiment of the present invention.

FIG. 3 is a timing chart showing characteristics showing the operating principle of the comparator.

FIG. 4 is a timing diagram showing characteristics of the comparators of FIGS. 1 and 2.

FIG. 5 is a circuit diagram of a conventional comparator.

[Description of Reference Signs] 1 input terminal 1 (non-inverted) 2 input terminal 2 (inverted) S1, S2, S3 switch C capacitors R1, R2 resistance 4 operational amplifier 4'comparator 10 first input 20 second input

Claims (2)

[Claims] 1. An operational amplifier, a third switch connected between a first input and a first input terminal of the operational amplifier, and an output connected between the operational amplifier and a second input. A first switch, a capacitor connected between the second input and the second input terminal of the operational amplifier, and a first switch connected between the first input and the second input terminal of the operational amplifier. A comparator comprising two switches. 2. The device according to claim 1, wherein a first resistor is interposed between the second switch and the second input terminal, and a second resistor is provided between the second switch and the output terminal. A comparator characterized by interposing a resistor.