JPS63155694A - Manufacture of multilayer composite ceramic board - Google Patents
Manufacture of multilayer composite ceramic boardInfo
- Publication number
- JPS63155694A JPS63155694A JP30311186A JP30311186A JPS63155694A JP S63155694 A JPS63155694 A JP S63155694A JP 30311186 A JP30311186 A JP 30311186A JP 30311186 A JP30311186 A JP 30311186A JP S63155694 A JPS63155694 A JP S63155694A
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- laminate
- multilayer composite
- composite ceramic
- conductive pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title claims description 46
- 239000002131 composite material Substances 0.000 title claims description 25
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000758 substrate Substances 0.000 claims description 42
- 238000010304 firing Methods 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 13
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 239000004332 silver Substances 0.000 description 6
- 239000012212 insulator Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、導電パターンと抵抗パターンとが被着された
複数の絶縁体シートを積層し、得られた積層体を焼成し
て多層複合セラミック基板を作る多層複合セラミック基
板の製造方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention produces a multilayer composite ceramic by laminating a plurality of insulating sheets each having a conductive pattern and a resistive pattern adhered thereto, and firing the resulting laminate. The present invention relates to a method for manufacturing a multilayer composite ceramic substrate.
従来、この種の多層複合セラミック基板の導電パターン
に使用する導体ペーストとして、高価な金ペーストの代
わりに安価な銀・パラジウム系ペーストを用いることが
試みられており、特に銀のマイグレーションを防止する
目的で銀８５〜８０重量％−パラジウム１５〜２０重量
％のものが用いられている。Conventionally, attempts have been made to use inexpensive silver/palladium-based pastes instead of expensive gold pastes as conductive pastes for the conductive patterns of this type of multilayer composite ceramic substrate, with the aim of preventing silver migration in particular. 85 to 80% by weight of silver and 15 to 20% by weight of palladium is used.
この導電パターンは、上記銀−パラジウム導体ペースト
を使用して通常、スクリーン印刷法によりセラミック・
グリーンシートでできた絶縁体シート上に形成されてい
る。導電パターン等が印刷された後、第６図に示すよう
に、複数の絶縁体シートを８！ｉ層して積層体１５を形
成し、焼成することにより、多層複合セラミック基板が
出来上がる。This conductive pattern is typically printed on ceramics by screen printing using the silver-palladium conductor paste described above.
It is formed on an insulator sheet made of green sheets. After the conductive patterns, etc. are printed, as shown in FIG. By forming i-layers to form a laminate 15 and firing, a multilayer composite ceramic substrate is completed.
この場合、焼成工程で、導電パターン１６から銀が蒸発
して、導電パターン１６のハンダ付は性が劣化するのを
防ぐために、積層体１５をセラミック基板１７に挟んで
、焼成炉で焼成している。In this case, in order to prevent silver from evaporating from the conductive pattern 16 during the firing process and deteriorating the soldering properties of the conductive pattern 16, the laminate 15 is sandwiched between ceramic substrates 17 and fired in a firing furnace. There is.
上述した従来の多層複合セラミック基板の製造方法は、
焼成工程中に、積層体１５の外面に出ている銀−パラジ
ウムの導電パターン１６が軟化し、導電パターン１６と
積層体１５を挟みこむセラミック基板１７とを接着する
ため、焼成後、積層体１５が焼成されてできた多層複合
セラミック基板からセラミック基板１７を剥がすときに
、導電パターン１６の一部がセラミック基板１７に付着
し、多層複合セラミック基板から導電パターン１６の一
部を剥離させてしまうという欠点がある。The conventional method for manufacturing the multilayer composite ceramic substrate described above is as follows:
During the firing process, the silver-palladium conductive pattern 16 exposed on the outer surface of the laminate 15 is softened and the conductive pattern 16 and the ceramic substrate 17 sandwiching the laminate 15 are bonded together. When the ceramic substrate 17 is peeled off from the multilayer composite ceramic substrate formed by firing, a portion of the conductive pattern 16 adheres to the ceramic substrate 17, causing a portion of the conductive pattern 16 to be peeled off from the multilayer composite ceramic substrate. There are drawbacks.
本発明の多層複合セラミック基板の製造方法は、焼成工
程においてセラミック基板で積層体を挟みこんで焼成す
る際に該セラミック基板が積層体の導電パターンと接触
しないようにする凸部を積層体の上面および下面の導電
パターンと抵抗パターンとが形成されていない部位に形
成する工程を含む。In the method for manufacturing a multilayer composite ceramic substrate of the present invention, a convex portion is provided on the upper surface of the laminate to prevent the ceramic substrate from coming into contact with the conductive pattern of the laminate when the laminate is sandwiched between ceramic substrates and fired in the firing process. and a step of forming a conductive pattern and a resistive pattern on the lower surface in a region where they are not formed.
したがって、焼成後、セラミック基板を多層複合セラミ
ック基板からはずすとき、導電パターンをはがすことが
ない。Therefore, when the ceramic substrate is removed from the multilayer composite ceramic substrate after firing, the conductive pattern is not peeled off.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の多層複合セラミック基板の製造方法に
より加圧成形された積層体の第１の実施例の斜視図、第
２図は第１図の積層体１の加圧成形前の拡大分解断面図
、第３図は第１図の積層体１を焼成するときの状態を示
す側面図である。FIG. 1 is a perspective view of a first embodiment of a laminate formed by pressure forming by the method for manufacturing a multilayer composite ceramic substrate of the present invention, and FIG. 2 is an enlarged view of the laminate 1 in FIG. 1 before pressure forming. The exploded sectional view and FIG. 3 are side views showing the state when the laminate 1 of FIG. 1 is fired.
まず、セラミック・グリーンシートでできた絶縁体シー
ト５．６．７にそれぞれヴイアホール５１ａ、５１ｂ、
５１ｃ、６１ａ、６１ｂ、７１ａ、７１ｂ、を設（プる
。次に、絶縁体シート５のヴイアホール５１ａ、５１ｂ
に、導体ペースト（銀８５重量％、パラジウム１５重量
％）を埋込むように、導電パターン５２を印刷形成する
。次に、絶縁体シート６に抵抗ペーストで抵抗パターン
６３を印刷し、ヴイアホール６１ａに導体ペーストを埋
込むように導電パターン６２を印刷し、抵抗パターン６
３の電極部となる導電パターン６４とコンデンサの電極
となる導電パターン６５とを印刷し、導電パターン６４
．６５と接続する導電パターン６６を印刷形成する。絶
縁体シート７にコンデンサの電極となる導電パターン７
３と、導電パターン７３と接続された導電パターン７４
とを印刷し、絶縁体シート７の下面に、ヴイアホール７
１ｂに導体ペーストを埋込むように導電パターン７４と
接続して導電パターン７５を印刷し、ヴイアホール７１
ａに導体ペーストを埋込むように絶縁体シート７の下面
に導電パターン７２を印刷形成する。次に、印刷形成さ
れた絶縁体シート５．６．７を所定の金型に入れて積層
した後、温度１２０℃圧力２５０Ｋｇ／ｃｒＡで加圧成
形して外周部に高さ約０．５＃、幅約０．５ ｍの凸部
を有する積層体１（第１図）を形成する。次いで、第３
図に示すように積層体１をセラミック基板（アルミナ）
２の間に置き、温度８５０℃で焼成する。焼成後、セラ
ミック基板２を積層体１が焼成されてできた多層複合セ
ラミック基板よりはずす。そしてこの多層複合セラミッ
ク基板の凸部を切断することにより、多層複合セラミッ
ク基板が完成する。ここで、セラミック基板２を積層体
１が焼成されてできた多層複合セラミック基板よりはず
すとき、多層複合セラミック基板の外周部の凸部により
、多層複合セラミック基板の導電パターンとセラミック
基板２どの間にすき間が形成されているので、導電パタ
ーン５２，７２．７５が剥離することはない。First, insulator sheets 5, 6, and 7 made of ceramic green sheets are provided with via holes 51a, 51b, respectively.
51c, 61a, 61b, 71a, 71b. Next, the via holes 51a, 51b of the insulating sheet 5 are set.
A conductive pattern 52 is printed and formed in such a manner that a conductive paste (85% by weight of silver, 15% by weight of palladium) is embedded therein. Next, a resistance pattern 63 is printed on the insulating sheet 6 using resistance paste, and a conductive pattern 62 is printed so as to fill the via hole 61a with conductive paste.
A conductive pattern 64 that will become the electrode part of No. 3 and a conductive pattern 65 that will become the electrode of the capacitor are printed.
．． A conductive pattern 66 connected to 65 is formed by printing. A conductive pattern 7 serving as an electrode of a capacitor is provided on an insulating sheet 7
3, and a conductive pattern 74 connected to the conductive pattern 73.
and print the via hole 7 on the bottom surface of the insulator sheet 7.
A conductive pattern 75 is printed by connecting the conductive pattern 74 so as to embed conductive paste in the via hole 71.
A conductive pattern 72 is printed and formed on the lower surface of the insulating sheet 7 so that the conductive paste is embedded in the area a. Next, the printed insulator sheets 5.6.7 are placed in a predetermined mold and laminated, and then pressure molded at a temperature of 120 degrees Celsius and a pressure of 250 kg/crA to give a height of about 0.5# on the outer periphery. , a laminate 1 (FIG. 1) having a convex portion with a width of about 0.5 m is formed. Then the third
As shown in the figure, the laminate 1 is made of a ceramic substrate (alumina)
2 and fired at a temperature of 850°C. After firing, the ceramic substrate 2 is removed from the multilayer composite ceramic substrate formed by firing the laminate 1. Then, by cutting the convex portion of this multilayer composite ceramic substrate, a multilayer composite ceramic substrate is completed. Here, when the ceramic substrate 2 is removed from the multilayer composite ceramic substrate formed by firing the laminate 1, the convex portion on the outer periphery of the multilayer composite ceramic substrate creates a gap between the conductive pattern of the multilayer composite ceramic substrate and the ceramic substrate 2. Since the gap is formed, the conductive patterns 52, 72, 75 will not peel off.
このようにして得られた多層複合セラミック基板の導電
パターン５２．７２．７５にフラックスを塗布し、湿度
２３０℃に保った共晶ハンダに３〜５秒浸漬して導電パ
ターン５２，７２．７５にハンダ付けを行なった結果、
ハンダは導電パターン５２，７２．７５の表面積の９０
％以上に付き、良好なハンダ付【ブ性を示した。この原
因は、積層体１の外周部に形成した凸部の高さが約０．
５ ｍｍであるために、積層体１とセラミック基板２と
の間に空間があるにかかわらず、その空間体積が少なく
、導電パターン５２，７２．７５からの銀の蒸発量が少
ないためである。第４図は本発明の多層セラミック基板
の製造方法による積層体の第２の実施例の斜視図、第５
図は第４図の積層体１１を焼成するときの状態を示す側
面図である。Flux is applied to the conductive patterns 52, 72, 75 of the multilayer composite ceramic substrate thus obtained, and the conductive patterns 52, 72, 75 are immersed in eutectic solder kept at a humidity of 230° C. for 3 to 5 seconds. As a result of soldering,
The solder covers 90 of the surface area of the conductive patterns 52, 72.
% or more, indicating good soldering properties. The reason for this is that the height of the convex portion formed on the outer periphery of the laminate 1 is approximately 0.
5 mm, the volume of the space is small regardless of whether there is a space between the laminate 1 and the ceramic substrate 2, and the amount of silver evaporated from the conductive patterns 52, 72, 75 is small. FIG. 4 is a perspective view of a second embodiment of a laminate according to the method of manufacturing a multilayer ceramic substrate of the present invention;
This figure is a side view showing the state when the laminate 11 of FIG. 4 is fired.
前述の実施例では積層体１の外周部全部に凸部を形成し
たが、本実施例では積層体１１の四隅に一辺の長さが約
０．５ ｍｍの立方体状の凸部を形成したものである。In the above-mentioned embodiment, the convex portion was formed on the entire outer circumference of the laminate 1, but in this example, cubic-shaped convex portions each having a side length of about 0.5 mm were formed at the four corners of the laminate 11. It is.
その結果、前述の例と同様に導電パターンの剥離も発生
せず、半田付性のよい外部導電パターンを有する多層複
合セラミック基板が得られた。As a result, a multilayer composite ceramic substrate having an external conductive pattern with good solderability was obtained without peeling of the conductive pattern as in the previous example.
以上説明したように本発明は、焼成工程において、セラ
ミック基板が積層体の上面および下面の導電パターンと
接触しないようにする凸部を積層体の上面および下面に
形成することにより、焼成工程で、積層体の上面および
下面を覆うセラミック基板と積層体の外面層に形成され
た導電パターンとが接着しないため、焼成後、剥離のな
い、かつハンダ付は性の良好な外部導電パターンをもっ
た多層複合セラミック基板が得られる効果がある。As explained above, the present invention has a method of forming convex portions on the upper and lower surfaces of the laminate to prevent the ceramic substrate from coming into contact with the conductive patterns on the upper and lower surfaces of the laminate during the firing process. Since the ceramic substrate covering the top and bottom surfaces of the laminate and the conductive pattern formed on the outer layer of the laminate do not adhere to each other, a multilayer structure with an external conductive pattern that does not peel off after firing and has good solderability. This has the effect of providing a composite ceramic substrate.
第１図は本発明の多層複合セラミック基板の製造方法に
より加圧成形され７ｊ積層体１の第１の実施例の斜視図
、第２図は第１図の積層体１の加圧成形前の拡大分解断
面図、第３図は第１図の積層体１を焼成するときの状態
を示す側面図、第４図は本発明による積層体の第２の実
施例を示す斜視図、第５図は第４図の積層体１１を焼成
するときの状態を示す側面図、第６図は従来方法を示す
図である。
１．１１・・・積層体、 １ａ、１１ａ・・・凸部、２
．１２・・・セラミック基板、
５．６．７・・・絶縁体シー１−１
５１ ａ、５１ ｂ、５１ ｃ、−・・ヴイアホール、
５２・・・導電パターン、
６１ａ、６１ｔ）−ヴイアホール、
６２．６４．６５．６６．６７・・・導電パターン、６
３・・・抵抗パターン、
７１ａ、７１．ｂ・・・ヴイアホール、７２．７３．７
４．７５・・・導電パターン。
特許出願人 日本電気株式会社
１ａ凸録
第２図
１７仏ラミ１．り１１反
奴 ０１．・７FIG. 1 is a perspective view of a first embodiment of a 7j laminate 1 that is pressure-formed by the method for manufacturing a multilayer composite ceramic substrate of the present invention, and FIG. 2 is a perspective view of the laminate 1 of FIG. 1 before pressure-forming. FIG. 3 is an enlarged exploded sectional view, FIG. 3 is a side view showing the state when the laminate 1 of FIG. 1 is fired, FIG. 4 is a perspective view showing a second embodiment of the laminate according to the present invention, and FIG. 4 is a side view showing the state when the laminated body 11 of FIG. 4 is fired, and FIG. 6 is a diagram showing a conventional method. 1.11...Laminated body, 1a, 11a...Convex portion, 2
．． 12... Ceramic substrate, 5.6.7... Insulator seam 1-1 51 a, 51 b, 51 c, --... Via hole,
52... Conductive pattern, 61a, 61t)-via hole, 62.64.65.66.67... Conductive pattern, 6
3...Resistance pattern, 71a, 71. b... Via Hall, 72.73.7
4.75...Conductive pattern. Patent Applicant NEC Corporation 1a Convection Figure 2 17 French Rami 1. ri11 anti-guy 01.・7
Claims (1)
縁体シートを積層し、得られた積層体を焼成して多層複
合セラミック基板を作る多層複合セラミック基板の製造
方法において、 焼成工程においてセラミック基板で積層体を挟みこんで
焼成する際に該セラミック基板が積層体の導電パターン
と接触しないようにする凸部を積層体の上面および下面
の導電パターンと抵抗パターンが形成されていない部位
に形成する工程を含むことを特徴とする多層複合セラミ
ック基板の製造方法。[Claims] A method for manufacturing a multilayer composite ceramic substrate, in which a plurality of insulating sheets each having a conductive pattern and a resistive pattern attached thereto are laminated, and the resulting laminate is fired to produce a multilayer composite ceramic substrate. The conductive patterns and resistance patterns on the upper and lower surfaces of the laminate are formed with protrusions that prevent the ceramic substrate from coming into contact with the conductive patterns of the laminate when the laminate is sandwiched between ceramic substrates and fired in the firing process. A method for manufacturing a multilayer composite ceramic substrate, the method comprising the step of forming a multilayer composite ceramic substrate in a region where the ceramic substrate does not have a laminate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30311186A JPS63155694A (en) | 1986-12-18 | 1986-12-18 | Manufacture of multilayer composite ceramic board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30311186A JPS63155694A (en) | 1986-12-18 | 1986-12-18 | Manufacture of multilayer composite ceramic board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63155694A true JPS63155694A (en) | 1988-06-28 |
Family
ID=17917015
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30311186A Pending JPS63155694A (en) | 1986-12-18 | 1986-12-18 | Manufacture of multilayer composite ceramic board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63155694A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8780554B2 (en) | 2009-10-16 | 2014-07-15 | Fujitsu Limited | Electronic device |
-
1986
- 1986-12-18 JP JP30311186A patent/JPS63155694A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8780554B2 (en) | 2009-10-16 | 2014-07-15 | Fujitsu Limited | Electronic device |
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