JPS6314381B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to RAS (Reliability Availability Service) provided in information processing devices such as computers.
ability) to test the central processing unit (hereinafter abbreviated as CPU) of a computer, etc.
The present invention relates to a setting method for setting a setting state to be set in a host such as a host, and particularly relates to a state setting method for a RAS function test that includes means for making the setting state independent of a program.

(b) Background of the Technology There is a need to test whether or not the functions of information processing devices such as electronic computers are performed normally. The initial test method was to make the CPU execute one instruction at a time and judge whether it was good or bad.

As the various functions of electronic computers have improved, computer systems have also come to consist of a host and a service processor (hereinafter referred to as SVP). The systems described above are now equipped with RAS functions that can be performed.

However, when testing the RAS function, there is a lack of flexibility in how to set test items (settings that must be set on the CPU, etc.), and as a result, it is difficult to display various settings on the CPU. This is an impediment to the full performance of the RAS function, and there is a need for the development of technical means that can solve this problem.

(c) Prior Art and Problems Conventionally, the setting states set in the CPU for testing the RAS function were converted into software and incorporated into the program when the test program was developed.

This setting state is not constant;
Even after a test program has been developed, there may be cases where it is desired to make changes and test the program. For example, even in the same instruction, you can change the stop address, etc.
There are times when you want to test the RAS function by changing the state of the CPU, but with the conventional method, you have to add the test items to the existing program, which is not only cumbersome to change, but also difficult to do. This is a factor that impairs the performance of RAS functions.

(d) Purpose of the Invention The present invention was devised in view of the drawbacks of the conventional method as described above, and its purpose is to
The setting status can be set independently of the program,
The setting status can be set freely, making it flexible.
The object of the present invention is to provide a state setting method for a RAS function test that can demonstrate the RAS function.

(E) Structure of the Invention The object of the invention is to provide a method for generating various setting states in a CPU in order to test at least a RAS function provided in the CPU, in which each of the various setting states in at least one test item is A data table to be stored is provided independently from the CPU side program and SVP side program for the RAS function, the above data table is read in a predetermined order by one of the above programs, and the read setting status data is used by both of the above programs. hand
This is achieved by setting the configuration state on the CPU for RAS functional testing.

(F) Embodiments of the invention Examples of the invention will be described below with reference to the accompanying drawings.

FIG. 1 shows a system configuration for implementing the present invention. 1 is a CPU, which has a control storage (CS) 2 therein, is connected to a main storage unit (MSU) 3, and provides services via a channel unit (CHU) 4 and a conversation bus 5. Connected to processor (SVP) 6.
The CHU 4 has a control storage (CS) 7 for this purpose. 1, 3, and 4 constitute a host.

The SVP 6 has a memory (MEM) 8 and stores a basic program (Basic) which is SVP software, and a microprogram that is transferred to a required location and used to control its operation as described later. It is configured to be connected to a first floppy disk (FPD) 9 and a second floppy disk (FPD) 10 that stores a test program, as well as to a cathode ray tube device (CRT) 11.

The above MEM8 is connected via the SVP ring bus 12.
Connected to CS7,2 and MSU3.

Further, the above-mentioned test program consists of a control section, a test section, and a parent program, of which the control section and the parent program are referred to in the present invention.
Forms the SVP side program and SVP for normal processing
Along with the software (hereinafter abbreviated as Basic)
While stored in MEM8, test section and CPU1
The program for is a CPU side program according to the present invention, and
3 is now stored in memory.

And, independent of these CPU side programs and SVP side programs, a data table storing various setting state data of the CPU is stored in an appropriate storage means in the above-mentioned system. This data table constitutes a characteristic part of the present invention. The above data table is for FPD9, 10, MEM8, or
Although the information may be stored in any of the MSUs 3, for convenience of explanation, a case where the storage means is the MSU 3 will be described. Details of the contents of the data table are shown in FIG. In Figure 3, the test number is the test number of the host program, the flag is the type of comparison data, the entry is the size of the data group, the test execution PSW is the test execution address of the host program, and the CS stop address is the control storage stop address. The top address and collect data are the expected data of the execution results, and the actual data are the actual data of the execution results.

When the system starts operating, when the power is turned on, the Basic of the FPD 9 is written to the MEM 8 of the SVP 6, and control is transferred to that Basic. and,
Under the control of Basic, the microprogram of FPD9 connects CS of CHU4 via SVP ring bus 12.
7 and CS2 of CPU1 to make the system usable, and the SVP side program and CPU side program, which are programs for testing the RAS function, are written to MSU3 and CS2, respectively.
Assume that it has been loaded into MEM8.

Then, as shown in Figure 2, when the CPU side program is started (step S1), a step is performed to determine whether the data table has reached the final table.
You can check it in S2. If the determination is positive (Y), the process proceeds to the next test (step S3), but if the determination is negative (N), the process proceeds to step S4. In order to clarify the drawing, this step S4 illustrates the determination of whether or not test 1 in the data table DT has the required data group, that is, each of the data for the setting state described above. Test 1 determines whether there is data for establishing a different setting state, for example, data for establishing a desired setting state at different timings, that belong to the category of the same test item included in DT, for example Test 1. This is the part of the program that is configured to perform the following operations on all data belonging to the . This allows various environments to be set on the CPU without requiring changes to the software.

An example of a test of the RAS function according to the setting state will be described below in the case where a data group for the test 1 is read from the data table DT.

If it is found that there is data in test 1 of the data table DT (Y in step S4), secure the start address of that data group (step S4).
S5). Based on that data group, set up a test environment for CPU1 and pass control to the SVP side program,
Moreover, the CPU stops after notifying the start address (step S6).

In this way, when the SVP side program starts running (step S7), it first reads the contents of the data group from the first address of the data group (step S8), and then selects the address specified by the read data, such as the CS address (this address is The CPU is set to stop mode so as to stop the CPU operation (preset in the data group) (step S9), and the data of the test execution PSW in the data group is set to
PSW is set to start the CPU 1 (step S10), and the CPU 1 starts executing instructions from the beginning of the predetermined program (the beginning of the instruction execution IE in FIG. 2).

As a result of this execution, a constant check is made as to whether or not the CPU 1 has stopped in step S11 of the SVP side program.

If it is confirmed that CPU 1 has stopped at the CS address (stop address) mentioned above during the check (Y in step S11), then the error procedure number in the data group is referred to and the error number is processed. Select a routine, set the CPU to a state where an error occurs (steps S12 and S13),
The CPU 1 clock is normally generated and control is passed to the monitoring program of the SVP side program (step S14).

The monitoring program constantly checks the status of CPU1, collects log data in response to the occurrence of an abnormality, sets the PSW of CPU1 to the start address of the error processing EP, and passes control to the CPU side program (step S15). .

After the CPU side program executes the error handling EP and checks whether the instruction execution has been completed normally (steps S16 and S17), the process returns to step S2.
If there is different setting state data for the same test item, the same type of processing described above is repeated.

In this way, in the present invention, the setting state (test item) desired to be set for the CPU is in a data table that is independent of the CPU side program and the SVP side program. Therefore, it is not in the data table,
If you want to set a setting state that belongs to the same test item on the CPU, you can set the intended setting by simply replacing the contents of the data table without making any changes to the CPU side program or SVP side program. Set the state to CPU
You can test RAS functionality.

In addition, in the above embodiment, the case where the data table is set in advance has been explained, but
By changing the contents of the data table depending on the conditions occurring in the system, the flexibility that can be provided to the test intended by the present invention can be fully utilized.
You can test RAS functionality.

(g) Effects of the invention As described above, according to the present invention, any setting state belonging to the same test item can be
It can be set freely without changing the program for RAS functional testing, which provides flexibility in testing RAS functionality.

Further, effects such as being able to easily change the settings can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a system configuration for implementing the present invention, FIG. 2 is a flowchart for explaining the operation of the system shown in FIG. 1, and FIG. 3 is a diagram illustrating the contents of a data table in detail. In the figure, 1 is a central processing unit, 2 and 7 are control storages, 3 is a main storage device, 4 is a channel unit, 6 is a service processor, 9 and 10
is a floppy disk, 12 is an SVP link bus,
DT is a data table.

Claims (1)

[Claims] 1 In a method of generating various setting states in the CPU in order to test the RAS function provided in the CPU, a data table storing each of the various setting states in at least one test item is
It is provided independently from the CPU side program and SVP side program for the function, and the above program reads the above data table in a predetermined order, and the read setting status data is used by both of the above programs to perform a RAS function test. Setting status as above
A state setting method for RAS function testing characterized by setting in the CPU.