JPS5829053A - Program correction controlling method with interruption - Google Patents

Abstract

PURPOSE:To decrease the interruption time of debug and check, by preparing a correction routine control table and making a program to jump to this routine when a correction routine corresponding to this table exists. CONSTITUTION:If a program reaches a routine in error after the execution of a routine, the address is detected at an interruption control circuit 3 and a processor 1 and the circuit 3 stores an interruption generating address to an interruption generating register 4. In the interruption processing routine, the register 4 is read at first. In a correction routine, a correction routine control table MTBL is prepared in advance and after the read in the register 4, this MTBL is referenced. When the correction routine corresponding to the interruption generating address to be read exists, the program jumps to the correction routine address and after the execution of the correction routine, the program jumps to the next processing routine in skipping the routine in error.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a program modification control method using interrupts that aims to make program modification eight-fold and batch management. Conventionally, program modification involves recompiling or assembling the program when a program execution error occurs. Since the modification routines were stored in the program by patching or patching, there were the following drawbacks: ◎In other words, modification of a program that increases the number of 8 violets in the program requires reassembly and recompilation. In addition, in information processing systems where compiling and assembling procedures can be handled by Pac-Land processing, it is necessary to compare program modifications. However, in small-scale systems, it is often necessary to ask for help from a higher-level system or to load the C language processing system within the own system, making it difficult to debug programs and The inspection will be interrupted. In addition, in the case of a program that does not increase the program capacity, it is difficult to grasp the program modification status because it is stored in the program by the modification router/lpap.In addition, it is difficult to grasp the modification status of the program. It's easy! I#(- cannot be done.

The purpose of the present invention is to solve the above-mentioned drawbacks of the prior art C2, that is, to provide a program modification control that can reduce the interruption time of debugging and inspection, can grasp the percentage modification status, and can also modify programs stored in ROM. To provide a method, the present invention will be explained in more detail in Figure 1. Figure 1 shows an information processing device to which the program correction side measurement method of the present invention is applied, and 1 is a memo month. : Stored program E: Therefore, a processor that processes data; 2 is a memory that stores data, programs, interrupt handling routines, and modification routines; 5 is an interrupt that detects access to a predetermined address and generates an interrupt. control circuit, 4 is interrupt 7 by the interrupt control circuit
An interrupt generation address holding register stores the generated address, 5 is a path line connecting these components, and 6 is a control line that controls these components. @2g% Figure 5 62 There are programs 7 i; routine 7a% 7b, 7c, etc. that perform the modification side of the program according to the flow shown in 62.
If routine b is an incorrect routine, the access to the address of the incorrect routine 7b is detected by the interrupt control circuit 5, and the correction routine 8i (1=1 to N ) is predetermined and is stored at the address 0. Therefore, the program starts with routine 7a.
When the incorrect routine 7b is reached after execution, the interrupt control circuit 5 detects the address, and the processor 1 and the interrupt control circuit 3 store the interrupt generation address in the N interrupt generation register 4 via the path line 6. , jump to the interrupt processing routine 9 0 In the interrupt processing routine 9, as shown in FIG. , a modified routine control table (MTBL) as shown in Figure 4 is prepared, and this MTBL contains the program number and 1
After reading the 1-interrupt generation address and this (=corresponding modification routine address and flag F indicating whether the modification routine is valid or invalid for the number of modification routines, and reading the 1-interrupt generation address holding register r9a), The MTBL
9c), i
If there is a regular routine, it jumps to the corresponding modified routine address and modifies the modified routines C8 to C81. After executing the routine 7b, jump to the next processing routine 7C. On the other hand, if there is no corresponding correction routine (F='0"), C: is the interrupt generation address. C: Return 0 As mentioned above, I: In the present invention g2, the correction routines corresponding to the incorrect routine (2) are collectively stored in a predetermined area, and the address of the incorrect routine (: A modified routine control table t' in which addresses of corresponding modified routines are recorded is prepared, and when an access to an incorrect routine address is detected by the interrupt control circuit, ζ- uses the address as data and executes the modified routine control table 1. When the table is referenced and there is a corresponding modification routine, ζ: jumps to that routine. Therefore, when modifying a program that increases by 8, the modification routine that is reserved all at once is used. Since the modified rules can be stored in the storage area, there is no need for conventional cage reassembly or recompilation, and there is no need to change the program's memory layout, reducing the time required for debugging and reprocessing. It is short. Also, by memorizing information such as date and time, you can keep track of the modification status and manage all the correct routines at once. In order to keep the control table and correction routine in RAM 1m1+, C2 is ROλ.
N25 You can also modify your own memorized programs◎

[Brief explanation of the drawing]

Figure W41 is a configuration diagram of information processing equipment to which the present invention is applied;
, 2 is a flowchart showing an embodiment of the program modification control method according to the present invention C2, FIG. 3 is a flowchart of its interrupt processing routine, and FIG. sR4 is an example of a modification routine control table. 5... Pass line 6... Control line 7... Program patent dispatch ceremony Nippon Signal Co., Ltd. Figure 1 Figure 2

Claims (1)

[Claims] (Information processing device C equipped with an interrupt control circuit that generates an interrupt when an access to a predetermined address is detected in 11 program execution ≦: and a register that holds 1 interrupt generation address) A correction loop/control table is prepared in which the correct routine corresponding to the incorrect routine is stored in a predetermined area, and the address of the correction routine corresponding to the address of the incorrect routine is recorded in C. Starvation circuit C: When the address of an erroneous routine is detected, the address is used as data to refer to the correction routine control table, and if there is a corresponding correction routine, the routine is executed to jump. 2. A program modification control method using interrupt C2.