JPS63142776A - Contour correction circuit - Google Patents

Abstract

PURPOSE:To reduce the scale of a circuit by obtaining the contour correcting signal of a video camera in both horizontal/vertical directions through the use of the same signal generation circuit. CONSTITUTION:First and second delay circuits 16, 16a to delay respectively a video signal 1 by the time of the sum of one horizontal period 1H and a time DELTAt of about 200 ns are provided, and a signal 17 is the delayed output signal of the first delay circuit 16, and the signal 18 is the signal having passed further through the second (1H+DELTAt) times delay circuit 16a, and the circuit 19 is an edge signal generation circuit. Besides, the DELTAt is enough as far as it is sufficiently short compared with one horizontal period 63.56mus. (the DELTAt corresponds to the size of a horizontal edge.) Thus, a delay line, required for a horizontal edge signal generation circuit and for the time matching of the video signal for a horizontal edge signal generation, and the low-pass filter of a vertical edge signal, etc., come to be unnecessary, then the reduction of the scale of the circuit and a following cost reduction are achieved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a contour correction circuit for a video camera.

[Conventional technology]

FIG. 4 shows a block diagram of an example of a quadratic differential type contour correction circuit in a conventional video camera of this type. 1 is a high power video signal; 2 is an IH'ii delay circuit that delays the video input signal 1 by one horizontal scanning time (approximately 63.56 μS in the case of an NTSC signal, hereinafter abbreviated as IH);
3 is an IHM-delayed video signal (r?), 4 is a delay circuit for adjusting the phase of this IHM-delayed signal with the H edge signal by delaying Δ, and 5 is a delay circuit for adjusting the phase of the IHM-delayed video signal and contour correction. Iding Ci No. (hereinafter referred to as Edgy 1) No. 1
5 mixing circuit, 6 output video signal, 8 square contour correction 1
E signal (hereinafter referred to as edge signal) generation circuit, 9 is a low-pass filter for cutting unnecessary high-frequency components, 1
0 is a V edge signal, 11 is a waveform processing circuit, 12 is a mixing circuit of the V edge signal and the water 3F contour compensation i signal (hereinafter referred to as the H edge signal) 14, and 13 is an H edge signal generation circuit; Two Δ delay lines are provided, and a second-order differential type H edge signal is formed. 20 is an edge signal before waveform processing.

[Problem that the invention seeks to solve]

The conventional device with the above configuration has no operational problems, but as shown in the figure, the H edge signal (X)! 4 and V edge Shingetsu 10 are generated by separate circuits 13 and 8, respectively, so the scale of one circuit is large and 4 is complicated, and the cost is relatively expensive. Because it requires filters and consumes a lot of power, it is only used in high-end cameras for broadcasting and professional use, and for consumer use,
Edge signals have either been omitted, or a first-order differential type contour correction circuit having only either overshoot or undershoot has been employed.

The present invention has been made by paying attention to the problems of the conventional example as described below, and aims to eliminate the above-mentioned drawbacks and provide a contour correction circuit using a quadratic differential method that is inexpensive and has good performance. .

(Means for solving the problem) Therefore, in the present invention, at least one delay means having a delay time longer than 1H and shorter than 2H is provided, and the contour correction signal is transmitted through the delay means. The above object is achieved by configuring the delay signal to be formed by calculating the delayed signal and the signal that does not go through the delay signal.

(Function) With the 4G configuration as described in 1- below, the water/toe edge signal generation circuit, the delay line circuit necessary for time alignment of the video signal for generation of No. 83, and the low-pass filter for the vertical edge signal, etc. This may lead to a reduction in circuit scale and associated cost reduction.

(Example〕 Hereinafter, the present invention will be explained based on examples.

FIG. 1 is a block diagram of an embodiment of a quadratic differential type contour correction circuit according to the present invention, and FIGS. 2(a) to 2(f) are timing charts of each signal thereof.

(Structure) In FIG. 1, the same (equivalent) components as in FIG. 4 of the prior art example from 111 are represented by the same (or equivalent) symbols. That is, 1 is a human video signal, 5 is a mixing circuit for mixing a delayed video signal with an edge signal 15 which has undergone waveform processing such as noise reduction by the waveform processing circuit 11, 6 is an output video signal subjected to contour correction, 20a is the edge signal of the waveform processing hall.

Here, 16.16a is l wood period I, respectively.
first/second delay circuits for delaying the video signal 1 by a time equal to H plus a time Δt of approximately 200 ns;
17 is a delayed output signal of the first delay circuit 16, 18 is an output signal further passed through the second (1H+Δt) time delay circuit 16a, and 19 is an edge signal generation circuit. In addition, Δt
need only be sufficiently shorter than one horizontal period of 63.56 μs. (Δt corresponds to the thickness of the horizontal edge.) (Operation) Next, the operation of the configuration described below will be explained using FIG. 2. In FIG. 1, when the video signal 1 is input manually (this signal is designated as OH), the first delay circuit 16 obtains a signal 17 delayed by the time (1)1+Δt) (this signal is designated as IH+Δt). ). Next, using this second (IH+Δt) delay circuit 16a,
It is delayed by time (IH+Δt) to obtain a signal 18 delayed by (2H+Δ2t). The edge generation circuit 19 performs the following analog calculations on these three types of signals 1, 17 and 18 to obtain an edge signal 20a.

That is, edge output signal 6 = θ (OH signal 1 ■ (2H + Δ 2t
) Iba No. 1 8e2x (I H+4t)
This operation can be realized extremely easily using a known amplifier circuit. Note that Φ and θ represent addition and attenuation of signal levels, respectively, and + represents addition of delay time.

Here, in order to compare with the 21% timing chart No. 13, the conventional example circuit No. 4 is shown in FIGS. 5(a) to (h).
Each No. 42 timing chart illustrating the operation of the edge generation circuit shown in the figure is shown. Both Figures 2 and 5 show the case where the window (No. 3) is manually operated, and in both systems, two types of edge signals are obtained, one in the water direction and the other in the vertical direction.

However, when comparing both equations 1 and 2, the edge signal 20a according to the embodiment of the present invention in FIG. ), but since this is a vertical edge signal and the horizontal edge component is essentially unnecessary, it poses no problem in practice 11r.

FIG. 3 shows a concrete circuit block diagram of FIG. 1 for obtaining each signal of FIG. 1-2. That is, a concrete configuration example of the first/second (IH+Δt) delay circuit 16/'16a and the edge signal generation circuit 19 is shown. In the figure, 2
a is a CCD delay line, 2b is a low-pass filter, 2C is a clock pulse generation circuit, 19a is an addition circuit, 19b is a polarity inversion circuit, 19c is a double amplification circuit,
19d is an adder circuit, and lla is an amplifier circuit.

As shown, each (IH+Δt) delay circuit 16/1
6a includes each CCD delay line 2a and a clock signal 2C.
Each low-pass filter 2b is used to remove the leakage of , and the relaxation of the delay time between each delay line 2a and the low-pass filter 2b is (IH+Δt).

Further, Δt is generally selected to be about 200 ns, which is optimal for the width of the H edge.

In addition, the edge generation circuit 19 adds the human video signal 1 and the signal 18 in the adder circuit 19a, waits for the polarity reversal of No. 48 17 in the polarity inversion circuit 19b, and then amplifies it to 24H'r by the amplifier circuit 19c. This output is added to the output of the adder circuit 19a in tWf in an addition η) circuit 19d, and is configured to be guided to the waveform processing circuit 11 via the amplifier circuit 11a. This waveform processing circuit 11
is for reducing the noise of the edge signal 20a, etc., and its output is inputted to the mixing circuit 5 together with the signal 17, which is a well-known general type, and performs various processes such as Chris Bunning and level dependent processing. It is.

According to the configuration of the embodiment of the present invention described in detail above, in contrast to the conventional system which required two correction signal generation circuits for water "P"/return, two It is possible to obtain a second-order differential contour correction signal with a single signal generation circuit, and in addition, unlike the conventional example, the horizontal edge signal generation circuit and the time alignment of the video signal for horizontal edge signal generation are required. Delay lines, low-pass filters for vertical edge signals, etc. are no longer necessary, making it possible to reduce the circuit scale and reduce costs accordingly.

Note that each (IH+Δt) delay circuit 16,
If the delay element used for 16a is a glass delay line, by changing the delay time, or as shown in the example in FIG.
In the case of the extended wire 2a, this can be easily addressed by changing the design of the CCD element itself or by changing the design of the group delay time of the low-pass filter 2b for removing leakage clock signals.

(Other Embodiments) In the above embodiments, the second-order differential method is used for both the V-edge and the H-edge. Needless to say, it's a good thing.

FIG. 6 shows a block circuit diagram (corresponding to FIG. 1) of an embodiment of the contour correction circuit in the G-order differential method (however, the second-order differential method for H edges), and FIG. 7(a) to (g
), each signal timing chart (corresponding to Figure 2)
, and the second-order differential ``in the formula'! Travel example? A1.
In Figure 2, the same (phase "+) v# component is represented by the same (phase 1) symbol -.

The configuration and operation are substantially the same as those shown in FIGS. 1-2, so detailed explanations will be omitted. .

〔Effect of the invention〕

As explained in 1-1 below, according to the present invention, the contour correction signal of the video camera in both directions can be obtained by the same A and I generation circuit, so that the circuit size can be reduced. At the same time, it can contribute to cost reduction.

[Brief explanation of the drawing]

7j! 1 is a block diagram of an embodiment of the contour correction circuit in the second-order differential method according to the present invention, FIG. 2 is a timing chart of each signal in the circuit of FIG. 1, and FIG.
4 is a block diagram of an example of a conventional contour complement 1E circuit, FIG. 5 is a timing chart of each signal of the circuit shown in FIG. 4, and FIGS. 6 and 7 are , FIG. 1 and FIG. 2 are diagrams 1 and 2 of other embodiments in the second-order differential method, respectively.

Claims (1)

[Claims] Contour correction is performed by having at least one delay means having a delay time longer than one horizontal period and shorter than two horizontal periods, and calculating a delayed signal passed through the delay means and a signal not passed through the delay means. A contour correction circuit characterized by forming a signal.