JP2611040B2 - Video camera - Google Patents

Description

The present invention relates to a video camera, for example, a digital video camera.

The automatic iris adjustment of the conventional video camera has been performed by the configuration shown in FIG. In FIG. 1, reference numeral 1 denotes an image sensor formed of, for example, a CCD, and reference numeral 2 denotes an iris device. An output from the image sensor 1 is guided to an output terminal 5 via an amplifier 3 and an AGC circuit 4. The iris device 2 is configured by a motor or the like, and an iris according to an iris control signal is automatically set. At the same time, the output of the AGC circuit 4 is supplied to the peak detection circuit 7 via the gate circuit 6, and the output of the peak detection circuit 7 controls the iris device 2 and the AGC circuit 4. As shown in FIG. 2, the gate circuit 6 outputs one-third of one field (1 V) to the gate circuit 6.
A gate pulse is provided which causes a period of gate off.

The same thing as the iris control described above can be applied to a digital video camera, and multiplies the data corresponding to the gate pulse shown in FIG. 2 by the camera output.
The peak value or average value of the output is obtained, and the iris device may be controlled based on the peak value or the average value. However, for that purpose, it is necessary to add the data for one screen, and the number of bits of the addition result increases, resulting in a disadvantage that the hardware becomes large-scale. Also, if it can be processed by the microcomputer,
Although the circuit scale can be reduced, the data processing speed of the microcomputer is slower than the video data transmission rate.
Gate and peak detection (or average detection) as described above
Is not possible.

According to the present invention, control signals for iris control and gain control can be generated by processing the output of a digital video camera with small-scale hardware such as a microcomputer.

Hereinafter, an embodiment of the present invention will be described. In this example, as shown in FIG.
The image data is divided into nine blocks of .about.9I, video data included in each block is added, and data for each block is sent to the microcomputer for processing.

FIG. 4 shows the configuration of an embodiment of the present invention. The output of the image sensor 1 is converted into, for example, 8-bit video data of one sample by an A / D converter 10 and supplied to an adder 11. The output of the adder 11 is supplied to the delay circuit 12 having a delay amount of one sample and the registers 13A, 13B and 13C equal in number to the horizontal division number. The output of the delay circuit 12 is supplied to the adder 11, and the registers 13A, 13B, 13C
Is supplied to the adder 11 and the latch 15 via the gates 14A, 14B, 14C. This register 13A contains blocks 9A, 9
D and 9G are used to generate an addition output of the data contained in each of them. Is what you do. Reference numeral 16 denotes a decoder to which respective outputs of a horizontal counter 17 and a vertical counter 18 are supplied. Then, the decoder 16 generates a clear pulse for the delay circuit 12, a control pulse for the registers 13A, 13B, 13C, a gate pulse for the gates 14A, 14B, 14C, and a latch pulse for the latch 15.

An addition output, that is, average value data for each block obtained from the latch 15 is supplied to the microcomputer 19, and data processing is performed according to a predetermined program. When the average value data of each block 9A~9I and Da to Di, the microcomputer 19 generates the iris control signal by adding multiplied by the coefficient K ₁ ~K ₉ for these average value data. That is, the arithmetic processing of (K ₁ Da + K ₂ Db + K ₃ Dc +... + K ₉ Di) is performed. If the coefficients K ₁ , K ₂ , and K ₃ are set to 0, 1 /
Data of 3 is irrelevant. Also, the central block 9E
And 1 only factor K ₅ and corresponding, all other coefficients 0
In this case, central photometry is performed. What processing is performed by the microcomputer 19 is determined by a program. At the same time, the microcomputer 19 forms an AGC control signal for the AGC circuit 4 in the same manner as the iris control signal described above. Two control signals generated from the microcomputer 19 are supplied to the iris device 2 and the AGC circuit 4,
The iris value is adjusted according to the level of the iris control signal, and the gain of the AGC circuit 4 is adjusted according to the level of the AGC control signal.

The above-described formation of the average value data for each block will be described in detail. From the A / D converter 10, the first
When video data appears in order of a line, a second line,..., Accumulation is performed by the adder 11. Then, the accumulated data of the first line of the block 9A is stored in the register
After the delay circuit 12 is cleared, the accumulated data of the first line of the block 9B is set in the register 13B by the same operation, and the data of the first line of the block 9C is further set. Is set in the register 13C. If the second line of data occurs, gate 14A is turned on and the data stored in register 13A is provided to adder 11 to provide the second data for the first line of accumulated data in block 9A. The data of the line is further accumulated. The operation in the other blocks 9B and 9C is the same, and by repeating this operation, at a predetermined timing, the accumulated data of all the data of the block 9A appears at the output of the delay circuit 12, and this is latched. It is taken in by 15 and sent to the microcomputer 19. Further, the accumulated data of all the data of the blocks 9B and 9C are also generated at a predetermined timing at the output of the delay circuit 12, and are sent to the microcomputer 19 via the latch 15. When the above-described operations regarding the blocks 9A, 9B, and 9C are completed, the same operation is performed on the blocks 9D, 9E, and 9F, and then the same operation is performed on the blocks 9G, 9H, and 9I.

As described above, according to the present invention, the screen is divided into a plurality of blocks, an average value is formed for each block, and the average value is calculated by a microcomputer or the like. Can be processed using

[Brief description of the drawings]

FIG. 1 is a block diagram used to explain a conventional video camera, FIG. 2 is a waveform diagram of the gate pulse, FIG. 3 is a schematic diagram showing a screen division according to an embodiment of the present invention, and FIG. It is a block diagram of one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1 ... Image sensor, 2 ... Iris device, 9A-9I ... Block, 11 ... Adder, 13A, 13B, 13C ... Register, 19 ...
... microcomputer.

Claims (2)

(57) [Claims] A digital video signal obtained by A / D-converting an image signal from an image sensor is converted into a plurality of blocks in time series based on output signals from a horizontal counter and a vertical counter. Timing control means for generating a timing pulse for dividing the digital video signal into a digital video signal in each area corresponding to each block in accordance with the timing pulse from the timing control means. Accumulating means for accumulating digital data in the horizontal and vertical directions for each sample to form accumulated digital data; and accumulating digital data for each block obtained from the accumulating means. A microcomputer for generating control data, and control data generated by the microcomputer. Based on the video camera, characterized in that a control means for controlling the level of the output signal of the imaging device. 2. A digital video signal obtained by A / D-converting an image signal from an image sensor is converted into a plurality of blocks in a time series based on output signals from a horizontal counter and a vertical counter. Timing control means for generating a timing pulse for dividing the digital video signal into a digital video signal in each area corresponding to each block in accordance with the timing pulse from the timing control means. Accumulating means for accumulating digital data in the horizontal and vertical directions for each sample to form accumulated digital data; and accumulating digital data for each block obtained from the accumulating means. A microcomputer for multiplying a desired coefficient and generating control data based on each accumulated digital data after the multiplication. Data and, the based on the control data generated by the microcomputer, a video camera, characterized in that a iris control means for controlling the iris.