JPH0442868B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to video cameras, such as digital video cameras.

The auto iris adjustment of conventional video cameras is
This was done using the configuration shown in FIG. In the figure, 1 is an image sensor made of, for example, a CCD;
2 is an iris device, and the output from the image sensor 1 is sent to an output terminal 5 via an amplifier 3 and an AGC circuit 4.
guided by. The iris device 2 includes a motor and the like, and is configured to automatically set the iris according to an iris control signal. At the same time, the output of the AGC circuit 4 is supplied to the peak detection circuit 7 via the gate circuit 6, and the iris device 2A and the AGC circuit 4 are controlled by the output of the peak detection circuit 7. As shown in FIG. 2, a gate pulse generator 8 supplies the gate circuit 6 with a gate pulse that produces a gate-off period of about 1/3 of one field (1V) period.

Similar to the iris control described above,
It can also be applied to digital video cameras, by multiplying the data corresponding to the gate pulse shown in Figure 2 by the camera output, finding the peak value or average value of the output, and controlling the iris device using this. good. However, in order to do this, it is necessary to add data for one screen, and the number of bits in the result of the addition increases, resulting in a disadvantage that the hardware becomes large-scale. Also, if processing can be performed using a microcomputer, the circuit size can be reduced, but since the data processing speed of a microcomputer is slower than the transmission rate of video data, the gate and peak detection (or average value detection) processing described above is unnecessary. It is possible.

This invention makes it possible to generate control signals for iris control and gain control by processing the output of a digital video camera using small-scale hardware such as a microcomputer.

An embodiment of the present invention will be described below.
In this example, as shown in FIG.
The dimensional image is divided into nine blocks 9A to 9I, the video data contained in each block is added, and the data for each block is sent to a microcomputer for processing.

FIG. 4 shows the configuration of an embodiment of the present invention,
The output of the image sensor 1 is converted by an A/D converter 10 into video data of, for example, 8 bits per sample, and is supplied to an adder 11. The output of this adder 11 is a delay circuit 1 whose delay amount is equivalent to one sample.
2 and the number of horizontal divisions is equal to the number of registers 1.
3A, 13B, and 13C. The output of this delay circuit 12 is supplied to the adder 11, and the outputs of registers 13A, 13B, 13C are supplied to the adder 11 via gates 14A, 14B, 14C.
and supplied to latch 15. This register 13
A is for generating an addition output of data included in each of blocks 9A, 9D, and 9G, and register 13B is for generating an output of addition of data included in each of blocks 9B, 9E, and 9G.
Register 13C is related to blocks 9C, 9F, and 9I. Further, 16 indicates a decoder, to which each output of a horizontal counter 17 and a vertical counter 18 is supplied. Then, from the decoder 16, the delay circuit 1
Clear pulse for 2, register 13A, 13
B, control pulse for 13C, gate 14A,
Gate pulse for 14B, 14C, latch 1
A latch pulse for 5 is generated.

The summed output for each block obtained from the latch 15, that is, the average value data, is supplied to the microcomputer 19,
Data processing is performed according to a predetermined program. Average value data of each block 9A to 9I
Assuming Da to Di, the microcomputer 19 generates an iris control signal by multiplying these average value data by coefficients K ₁ to K ₉ and adding them. In other words, (K ₁ Da + K ₂ Db + K ₃ Dc +... +
K ₉ Di) calculation processing. Here the coefficient K ₁ ,
If K ₂ and K ₃ are set to 0, the data in the upper 1/3 of the screen is considered irrelevant. If only the coefficient _K5 corresponding to the central block 9E is set to 1 and all other coefficients are set to 0, center photometry will be performed.
What kind of processing the microcomputer 19 performs is determined by the program. A control signal generated from the microcomputer 19 is supplied to the iris device 2, and the iris value is adjusted according to the level of the control signal.

The formation of the above-mentioned average value data for each block will be explained in detail. When video data appears sequentially from the A/D converter 10 as the first line, second line, etc. in accordance with horizontal scanning, the adder 11 performs accumulation. Then, the accumulated data of the first line of block 9A is set in the register 13A, and then after the delay circuit 12 is cleared, the accumulated data of the first line of block 9B is set in the register 13A. The calculated value is set in register 13B, and the accumulated data of the first line of block 9C is set in register 13C. When the second line of data is generated, the gate 14A is turned on and the data stored in the register 13A is supplied to the adder 11, and the second line is added to the accumulated data of the first line in the block 9A. The data of the line is further accumulated. The operations in the other blocks 9B and 9C are similar, and by repeating this operation, at a predetermined timing, the sum of all the data in the block 9A appears at the output of the delay circuit 12. This is captured by the latch 15 and sent to the microcomputer 19. Further, the accumulated data of all the data of blocks 9B and 9C is also stored in the delay circuit 12.
The output signal is generated at a predetermined timing and is sent to the microcomputer 19 via the latch 15. When the above operations regarding blocks 9A, 9B, and 9C are completed, similar operations are performed on block 9.
D, 9E, and 9F, and then similar operations are performed for blocks 9G, 9H, and 9I.

Note that, unlike the above embodiment, the maximum value data may be detected for each block and sent to the microcomputer.

As mentioned above, in this invention, the screen is divided into multiple blocks, the average value or maximum value for each block is formed, and this is calculated by a microcomputer, etc., so the data rate is reduced and the hardware is simplified. At the same time, it becomes possible to process using a microcomputer.

[Brief explanation of drawings]

Figure 1 is a block diagram used to explain a conventional video camera, Figure 2 is a waveform diagram of its gate pulse,
FIG. 3 is a schematic diagram showing screen division according to an embodiment of the present invention, and FIG. 4 is a block diagram of an embodiment of the present invention. 1...Image sensor, 2...Iris device, 9A to 9I
...Block, 11...Adder, 13A, 13B, 1
3C...Register, 19...Microcomputer.

Claims (1)

[Scope of Claims] 1. A/D conversion means for converting a video signal obtained by an image sensor into a digital signal; and one screen worth of image data consisting of the digital signal obtained by the A/D conversion means. an accumulating means for forming accumulated data for each block by dividing the image data into a plurality of blocks and accumulating the image data of each block; and multiplying the accumulated data for each block by a desired coefficient. and control means for controlling the iris based on the value of the accumulated data after multiplication.