GB2332114A

GB2332114A - Variable frequency shutter pulse control

Info

Publication number: GB2332114A
Application number: GB9825965A
Authority: GB
Inventors: Yoji Urayama
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1997-11-26
Filing date: 1998-11-26
Publication date: 1999-06-09
Anticipated expiration: 2018-11-26
Also published as: JPH11164207A; GB9825965D0; GB2332114B

Abstract

Shutter control circuit 28 calculates a value with which to divide the frequency of a master clock in order to produce a variable frequency drive for image sensing device 21. Shutter control circuit 28 sends this value to timing generation circuit 26 which divides the master clock according to the frequency dividing value. Simultaneously, shutter control circuit 28 calculates the number of shutter pulses, for sweeping out electric charges, from the shutter speed value and sends the shutter pulses via drive circuit 29 to image sensing device 21. Advantages: gives better control of charge accumulation time when this is small and enables charge accumulation time to be longer than one frame period.

Description

2332114 METHOD OF CONTROLLING EXPOSURE TIME OF IMAGING DEVICE AND EXPOSURE

CONTROL DEVICE

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a method of controlling the exposure time of an imaging device and an exposure control device and, more particularly to a controlling technology of the exposure time in the imaging device using an electronic shutter such as a video camera using a solid imaging device, for example.

2. Description of the Prior Art

An exposure control device of this kind is applied to automatic iris controlling of video cameras as shown in Japanese Patent Application Laid-open No. 62323/1994, for example. Particularly, the above-mentioned application discloses the exposure control technology for the purpose to improve the precision of controlling the exposure time in the exposure control device and to expand the dynamic range of automatic iris controlling.

Fig. 1 is a block diagram showing a structure of an 1 example of conventional exposure control device. Referring to Fi g. 1, a timing generating circuit 19 generates synchronizing signals of the device and driving signals of the solid imaging device 12. Beams converged from a lens 11 fo= images on the solid imaging device 12. The solid imaging device 12 outputs image signals, which are sampled and retained by a sampling hold (SH) circuit 13. An AGC circuit 14 is a circuit automatically giving proper gain to the image signals, and a signal processing circuit 15 is a circuit performing various kinds of signal processing such as gamma compensation processing or contour compensation processing, for example, to the image signals. Electronic iris control circuits 18 are circuits in a block to control the exposure time of the solid imaging device 12. A low pass filter 16 in the block of electronic iris control circuits 18 outputs DC components, given by limiting the image signals to the low band passing and by integrating the image signals, to a shutter control circuit 17 in the same block of electronic iris control circuits. The shutter control circuit 17 determines the electronic shutter speed to be the proper exposure time by the given DC components of image signals, and impresses the shutter pulse (Sub-pulse) for sweeping out electric charges to the solid imaging device 12.

1 15 2 The exposure control device shown in Fig. 1 operates as follows:

The image signals image-sensed by the solid imaging device 12 are inputted to the AGC circuit 14 through the SH circuit 13. The image signals are then given a proper gain by the AGC circuit 14, and are signal-processed variously such as the garmna compensation processing and contour compensation processing, for example, and outputted by the signal processing circuit 15. The exposure control device shown in Fig. 1 realizes the automatic iris with the AGC circuit 14 and the electronic iris control circuits. The electronic iris controlling will be described hereunder.

The image signals inputted from the sample hold circuit 13 to the low pass filter 16 are processed with the low band pass limit processing. Thereafter, the DC components of image signals output from the low pass filter 16 are inputted to the shutter control circuit 17. The shutter control circuit 17 determines the shutter speed to be the proper exposure time from the DC component of given image signals, and impresses the shutter pulse to the solid imaging device 12. In the solid imaging device, the charges are swept out by this shutter pulse, iind- the exposure is performed in the given period.

Fig,. 2 is a timing chart showing the operation of the 3 exposure control device as shown in Fig. 1. In the timing chart shown in Fig. 2, the period of pulse VBLK shows a vertical retrace line period, and the TG pulse shows the timing read out charges accumulated in the imaging device 12 The period of pulse HBLK shows a horizontal retrace line period. Sub-CLK pulse shows synchronizing signals (subsynchronizing pulse) in the shutter control circuit 17, and the pulse Subl and pulse Sub2 are examples of the shutter pulse respectively at the time of real running of electronic shutter.

Referring to Fig. 2, the exposure time of solid imaging device 12 is a time from a read pulse TG to the next read pulse TG in the state of not performing the electronic shutter control ( "standard exposure time" is shown 2). This exposure time allows the general video in Fig. cameras to realize 60 frames per second, which corresponds to the shutter speed of 1/60 second. When the shutter control circuit 17 determines the exposure value larger, i.e. the exposure time longer, the electronic iris control device performs to the direction of reducing the exposure value generating the shutter pulse (Sub-pulse). For example, when the shutter control circuit 17 determines the exposure value being large from the image signal when it passes the low pass filter 16, the device impresses the shutter pulse 4 shown in Sub 1 to the solid imaging device 12. The exposure time of imaging device 12 at that time is shorter than the standard exposure time shown as " Exposure time 1" in Fig. 2.

Then, as shown in Fig. 2, the above-mentioned conventional exposure control device outputs the shutter pulse (Pulse Sub 1 in the above example) at just the time to store it in the breadth of horizontal retrace line pulse HBLK (i.e. in the horizontal retrace line period). This is because of the avoidance to mix the noise generated by the shutter pulse in the effective area of images. However, such control to generate one pulse in the horizontal retrace line period by synchronizing the shutter pulse with the horizontal retrace line pulse HBLK, that is to say, the automatic iris control to control the shutter pulse per line enables such automatic controlling to arise hunting when the shutter speed becomes higher. This is because the ratio of the control resolving power (the minimum value of control variables) of automatic control to the exposure time at the time of high shutter speed is higher becomes larger. To avoid this phenomenon, the conventional exposure device shown in Fig. 1 sets to shorten the minimum control variable of shutter pulse in the vertical retrace line period (i.e., pulse VBW breadth) to avoid the noise of shutter pulse at the time of high shutter speed and in the effective area of images, that is to say, the shutter control resolving power. The above visually illustrated in the timing chart is subsynchronizing pulse Sub-CLK shown in Fig. 2.

in the third pulse column f rom the top in Fig. period of the vertical retrace line pulse frequency of subsynchronizing pulse Sub-CLK is and during the period from the vertical retrace As shown 3, in the VB1X, the shortened, line pulse to the next vertical retrace line pulse, i.e., the vertical scanning period, the frequency of sub-synchronizing pulse Sub-CLK is lengthened. The conventional exposure control device forms this subsynchronizing pulse Sub-CLK in the shutter control circuit 17 within the electronic iris control circuits shown in Fig. 1.

The DC components gained from the low pass filter 16 are very large, and the shutter control circuit 17 determines that the present exposure time is extremely long, and when extremely shortening the exposure time, i.e., when setting the shutter speed extremely short, the shutter pulse Sub 2 shown in Fig. 2 is an example of shutter pulse impressed to the solid imaging device 12. The exposure time at that time becomes very short illustrated as -Fxposure Time 2" in Fig. 2. Such being the case, by improving the shutter control resolving power to the electric charge read 6 pulse TG, a very high speed shutter ran be realized, and also the dynamic range of solid imaging device 12 can be larger.

In the above-mentioned conventional exposure control device there remain a certain points to be improved. That is to say, the first problem is that in the period other than the vertical retrace line period of image (the breadth of pulse VBLK), i.e. within the vertical effective area of images, high precision shutter controlling cannot be performed. This is because improving only shutter control resolving power in the vertical retrace line period allows to remain the conventional control resolving power per line outside the period of vertical retrace line pulse VBLK, i.e. in the effective area of images.

The second problem is that the exposure time longer than the standard exposure time (for example, 1/60 second) cannot be performed. This is because the period from one read pulse TG to the next read pulse TG is fixed to the standard exposure time, so the period from the pulse TG to the next pulse TG cannot be lengthened.

SUMY OF THE INVENTION Accordingly, it is an object of this invention to provide a method of controlling the exposure time and an 7 exposure control device, wherein the high precision of exposure time can be obtained whether or not it is within the vertical retrace line interval.

It is another object of this invention to realize longer exposure time than the standard exposure time without controlling the electronic shutter.

It is a further object of this invention to provide a method of controlling and an exposure control device, wherein the precision of controlling the exposure time can be enhanced highly more than that of conventional method and units by combining with the conventional electronic shutter.

The method of controlling the exposure time of imaging device according to this invention is a method of controlling the exposure time of imaging device to transmit images by means of horizontal scanning and vertical scanning, using the photoelectric conversion device, by changing the electric charge storage time of said photoelectric conversion device. Then, it is characterized by changing the electric charge storage time of said photoelectric conversion device by at least changing the frame frequency of imaging device, based on said frame frequency, the number of horizontal scanning lines per frame and the number of shutter pulses for exhausting electric charges generated corresponding to the vertical synchronizing signal.

8 Said method of controlling the exposure time of imaging device is an exposure control device of imaging device to control the exposure time of imaging device to transmit images by means of horizontal scanning and vertical scanning, using the photoelectric conversion device, by changing the electric charge storage time of said photoelectric conversion device. And it is realized by the exposure control device of imaging device characterized by comprising a means of converting the drive frequency of said photoelectric conversion device.

According to this invention, as means for controlling a shutter, a circuit to convert its frequency by dividing frequency of the master clock voluntarly. Thereby, higher precision of controlling the shutter than that of conventional shutter controlling can be realized. Also, by changing the frequency dividing ratio of masterclock, slower shutter controlling than the usual shutter speed can be realized. Further, by combining it with the conventional shutter controlling, an extremely high speed shutter controlling which could not be realized in the. past, can be achieved.

The exposure control device according to this ihvention can change the frequency of the master clock as a standard signal of all running timing of the device. Concretely, 9 the frequency dividing circuit to divide the frequency of the master clock (11N frequency dividing circuit 33 in Fig. 4A) and the shutter speed calculating circuit for calculating frequency dividing value N on the basis of a shutter speed setting value (Shutter speed calculating circuit 41 in Fig. 4B) are installed in the unit.

Also, for combining conventional similar methods of controlling, the device comprises a means to generate the shutter pulse for sweeping out the accumulated charges (Counter 42 and Shutter pulse 43 in Fig. 4B).

BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 is a block diagram showing a structure of one example of conventional exposure control device.

Fig. 2 is a timing chart of a conventional exposure control device when running.

Fig. 3 is a block diagram showing a structure of an exposure control device according to the first embodiment of this invention.

Fig. 4A is a block diagram showing a timing generati circuit according to the first embodiment of this invent as illustrated in Fig. 3.

Fig. 4B is a block diagram showing a shutter circuit according to the first embodiment of this invention as illustrated in Fig. 3.

Fig. 5 is a timing chart showing an exposure time unit when operating according to the first embodiment of this 5 invention.

Fig. 6A is a block diagram showing a structure of an exposure control device according to the second embodiment of this invention.

Fig. 6B is a block diagram showing a shutter control circuit according to the second embodiment of this invention.

Fig. 7A is a block diagram showing a structure of an exposure control device according to the third embodiment of this invention.

Fig. 7B is a block diagram showing a shutter control circuit according to the third embodiment of this invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to the drawings, the preferred embodiments according to this invention are described below. Fig. 3 is a block diagram showing a structure of an exposure control device according to the first embodiment of this invention. Referring to Fig. 3, a timing generation circuit 26 generates a timing signal to drive a solid image sensing 11 device 21, another timing signal for the correlation double sampling (CDS) of an image signal from an image sensing device 21, and a clock signal (CLK) drive an AD convertor 23. A drive circuit 29 makes the timing signal from the timing generation circuit 26 have drivability, which drives the image sensing device 21. The image sensing device 21 is driven by the drive circuit 29, and outputs image signals. AWS circuit 22 performs the correlation double sampling on the image signals from the image sensing device 21 on the basis of the timing signal from the timing generation circuit 26. The AD convertor 23 converts the image signal to digital data. A signal processing unit 24 performs various kinds of signal processing such as gamma compensation processing, contour compensation processing, for example. A monitoring display 25 displays the image signals inputted.

The shutter speed preset value inputted to a shutter speed input unit 27 is inputted to a shutter control circuit 28. The timing generation circuit 26 obtains the frequency dividing information from the shutter control circuit 28, and determines a drive frequency from image sensing device 21, then outputs the timing signal to the drive circuit 29. The shutter control circuit 28 gains the timing signal from the timing generation circuit 26, and generates shutter 12 pulse (Sub-n), then outputs it to the drive circuit 29.

Fig. 4A shows a structure of the timing generation circuit 26 according to the first embodiment Of this invention in a form of block diagram. Referring to Fig. 4A, 5 an oscillator(OSC) 31 generates a master clock of this unit. A frequency dividing circuit 33 obtains the frequency dividing information from the shutter control circuit 28, and divides by N so that the frequency of master clock can be 1IN (N is a positive number, but is not always integer). A H Counter 34 receives signals from frequency dividing circuit clocks for the horizontal receives signals from the number of vertical lines.

an the 33, and counts the number of direction. A V counter 35 H counter 34, and counts the The output signals of both the H and V counters 34 and 35 are inputted to a decode circuit 32.

The decode circuit 32 decodes signals from the frequency dividing circuit 33 and count output signals from both the H and V counters 34 and 35, and generates the timing signals for driving the image sensing device 21, the CDS pulse for the collelation double sampling, the clock signals for the AD convertor 23, the read pulse TG, the vertical retrace line pulse HBLK, and the subsynchronizing pulse Sub-CLK, etc. for generating the shutter pulse.

Fig. 4B shows a structure of a shutter control circuit 13 28 according to the first embodiment of this invention in a form of block diagram. Referring to Fig. 4B, a shutter speed calculating circuit 41 calculates the number of shutter pulse Sub, (n=3, 4, 5) to be given to the image sensing device 21 via the drive circuit 29, and the frequency dividing value N to be sent to the frequency dividing circuit 33 in the timing generation circuits, based on the shutter speed preset value inputted from the shutter speed input unit 27. A counter 42 sets the number of counts given from the shutter speed calculating circuit 41 with the read pulse TG inputted from the timing generation circuit 26, calculates the above with the horizontal retrace line pulse HBLK from the timing generation circuit 26, and outputs the reset signal when reaching the given number of counts. A shutter pulse generation circuits 43 generates read pulse TG from the timing generation circuit 26, subsynchronizing pulse Sub-CLK, the reset signals from counter 42 and the shutter pulse Sub,, then they supplied to the drive circuit 29.

the the the are The shutter speed control according to this embodiment is performed as below. As to the image signal outputted from the image sensing device 21, the correlation double sampling is performed by the CDS circuit 22. The image signals are converted to digital data by the AD convertor 23, 14 and the digital signal processing is conducted with the signal processing unit 24. The monitoring display 25 displays the image signals. Referring to Fig. 4B, the shutter speed preset value from the shutter speed input unit 27 is inputted to the shutter speed calculating circuit 41.

The shutter speed calculating circuit 41 calculates the driving frequency of the image sensing device 21, i.e.

frequency dividing value N of the timing generation circuit 26 to provide the given shutter speed, and the number of horizontal retrace line pulses generating the shutter pulse sub,. These are inputted, i.e. the frequency dividing value N to the timing generation circuit 26, and the number of horizontal retrace line pulses to the counter 42 respectively. The counter 42 counts the number of horizontal retrace lines with the horizontal retrace line pulse HBLK with the given counter value as the starting point of counting the read pulse TG from the timing generation circuit 26, and generates the reset signal when reaching to the given number. The shutter pulse generation circuit 43 generates the shutter pulse per line from the read pulse TG to the reset signal of counter 42. The shutter pulse is thereafter given the drivability by the drive circuit 29, and is impressed to the image sensing device 21. Thereby, the electronic shutter controlling is executed.

Referring to Fig. 4A, the oscillator 31 generates the master clock as reference signal for this unit. The 1 IN frequency dividing circuit 33 divides the frequency of the master clock according to the frequency dividing value N from the shutter control circuit 28. The signals being divided by the frequency dividing circuit 33 are supplied to the H counter 34. The H counter 34 receives the signals from the frequency dividing circuit 33, and counts the number of clocks for the horizontal direction. The V counter 35 receives the signals from the H counter 34, and counts the number of vertical lines. The decode circuit 32 decodes the signals from the H counter 34, the V counter 35, and the 1IN frequency dividing circuit 33, and generates the drive signals of image sensing device 21, CDS pulse, clock for the AD convertors 23, read pulse TG, horizontal retrace line pulse HBLK, shutter pulse Sub and the like.

Next, referring to Figs 4A, 4B and 5, the shutter control operation timing according to the first embodiment of this invention will be described. Fig. 5 is a operation timing chart of this emb odiment. The vertical retrace line pulse VBLK, read pulse TG, horizontal retrace line pulse I-IBLK illustrated in Fig. 5 correspond to each of pulses VBLK, TG, HBLK of above-mentioned conventional exposure control device (as to all of them, refer to Fig. 2) and operate 16 similarly. As to the device according to this embodiment similarly in the conventional exposure control device shown in Fig. 2, the exposure time from some read pulse TG to the next read pulse is regarded as the standard exposure time or the exposure time without shutter control. In the shutter control according to this embodiment, when calculating the exposure time with the shutter speed calculating circuit 41, for example, halving the above- mentioned standard exposure time, the frequency dividing ratio for the frequency dividing circuit 33 is halved. That is to say, the frequency dividing ratio is altered so that the frequency of signals inputted to the H counter 34 and decode circuit 32 can be halved. For example, if the frequency dividing ratio at the time of standard exposure is 1/4 (N=4), the frequency dividing ratio will be altered to 1/2 (N=2). If the frequency dividing ratio is altered as such, the exposure time will be the time from some read pulse TG2 to the next read pulse TG2 (shown as ', 1/2 exposure time" in Fig. 5). In such case, if the exposure time is about half of the standard exposure time, the drive frequency of image sensing device 21 can be divided.

Next, when the shutter speed calculating device 41 calculates the exposure time further shorter, not only the frequency dividing value of frequency dividing circuit 33 is 17 altered, but also the shutter pulse generation circuit 43 shortens the exposure time by generating the shutter pulse sub,. The example of shutter pulse in such case is shown as Sub3 and Sub4 in Fig. 5. The exposure time in each case is shorter than the above-mentioned "1/2 Exposure Time" as shown " Exposure Time 3 " or " Exposure Time 4, " and i s shortened according to increasing the number of shutter pulses such as shutter pulses Sub3 - Sub4. To further shorten the exposure time, the frequency dividing value of frequency dividing circuit 33 is reduced, for example, the frequency dividing value is reduced to 1 (N=1), and in addition, the shutter pulse is generated. Examples of the shutter pulse and exposure time in such cases are'shown in Fig. 5, "Sub5 " and "Exposure Time5" According to this embodiment, by means of the above method, not only the exposure time can be shortened, but also the exposure time can be lengthened compared with the usual exposure time. For example, when the frequency dividing ratio at the standard exposure time is 1/4 (N=4), reducing the frequency dividing ratio to 1/8 (N=8) enables the exposure time to double the standard exposure time.

As understood from the above descriptions, there are three means of controlling the shutter speed according to this embodiment as follows:

18 (1) Similarly to the conventional method of controlling, a shutter pulse is generated per the vertical retrace line.

(2) The frequency dividing value of 1IN frequency dividing circuit (N is not always an integer) is converted. (This is the same with converting the drive frequency of image sensing device in the meaning.) (3) Both the above methods (1) and (2) are used jointly.

There are three methods of controlling the shutter speed according to this embodiment as above, in every case of which the exposure time can be expressed as follows:

The exposure time of image sensing device = (period of frame)-(time required for sweeping out the charges) The time required for sweeping out the charges of image sensing device period of frame) x (l/(number of lines per frame)) x (number of shutter pulses) Here, the number of lines per frame mentioned above is predetermined and fixed. The " period of frame " is controlled by the 1IN frequency dividing circuit 33. The " number of shutter pulse " is calculated by the shutter speed calculating circuit 41. For example, when the number of lines per frame is fixed to 260, and the frequency is fixed to 1/10 sec, i.e., 100 msec, and the shutter pulse is 19 fixed to 195, the time required for sweeping out the charges of image sensing device and the exposure time are as below:

Time Required for Sweeping Out Charges = (100 x 10-') (1/260) x 195.. 75 msec Exposure Time of Image Sensing Device = (100-75) x 10 25 msec -3 Thus, according to this embodiment, the shutter speed is controlled by converting the shutter speed and the frequency dividing ratio of the frequency dividing circuit and generating the shutter pulse, therefore, an extremely high speed control can be realized. Also, the lower shutter speed than the standard shutter speed can be realized by raising the frequency dividing ratio. Further, the resolution power of shutter control in the vertical effective period can be improved. Moreover, for generating the shutter pulse in the effective period, generating the noise on the effective display screen can be avoided by the shutter control Next, the second embodiment according to this invention is described. Figs. 6A and 6B show a structure of the second embodiment according to this invention in a -form of block diagram respectively. Referring to Figs. 6A and 6B, the shutter speed calculating circuit 60 performs for only outputting the frequency dividing value N on gaining the signals from the shutter speed input unit 27. The counter 42 for generating the shutter pulse and the shutter pulse circuit 43 according to the first embodiment were removed.

The frequency dividing value N calculated by the shutter calculating circuit 60 is inputted to the timing generation circuit 60, and according to said frequency dividing value N of the master clock is divided. The structure according to this embodiment is that removing all the structure and functions for generating the shutter pulse from the structure of the first embodiment according to this invention. Accordingly, the shutter speed is controlled by only converting the frequency dividing value of master clock. According to the structure of this embodiment, the circuit structure of shutter control circuits can be simplified by eliminating the structure and functions for generating the shutter pulse from the structure of the first embodiment.

Next, the third embodiment according to this invention is described. Figs. 7A and 7B show a structure of the third embodiment in a form of block diagram respectively. Referring to Figs. 7A and 7B, the image signals outputted by the AD converter 23 are inputted to the signal processing unit 24, also to the integrating circuit 70. The integrating circuit70 calculates the average value of image signals from 21 the AD converter 23, and its value is inputted to the shutter control circuits 28. The shutter speed calculating circuit 41 in the shutter control circuit 28 calculates the shutter pulse count value and frequency dividing value N from the average value of image signals so that the exposure time can be the predetermined value, and the calculated values are inputted to the counter 42 and 1IN frequency dividing circuit 33 respectively. Similarly to the operation of the first embodiment, the shutter speed according to the third embodiment is controlled. The exposure control device according to this embodiment comprises the integrating circuit to calculate the average value from the image signals, and thus, automatic exposure control (automatic iris controlling) is realized.

As described above, an extremely high shutter speed can be realized. The shutter control controls the - exposure time by converting the frequency dividing value of master clock, and by converting the drive frequency of image sensing device, in addition to controlling the exposure time with the shutter pulse generated per horizontal retrace line similarly to the conventional art.

According to the above, controlling lower speed shutters than the usual speed can be realized. The 22 frequency dividing circuit and the shutter speed calculating circuit calculate the frequency dividing value to enablethe frequency dividing value to be voluntarily converted.

Even in the vertical effective period of image, the precision of shutter speed can be improved. This is because the exposure control device comprises the frequency dividing circuit and the shutter speed calculating circuit to calculate the frequency dividing value whereby the frequency dividing value can be voluntarily converted.

The deterioration of SIN of image signals due to the shutter controlling can be prevented. This is because the shutter pulse is kept in the horizontal retrace line period.

The dynamic range of image signals can be enlarged. This is because not only an extremely high shutter speed but also an extremely lower shutter speed can be realised.

Each feature disclosed in this specification (which term includes the claims) and/or shown in the drawings may be incorporated in the invention independently of other disclosed and/or illustrated features.

Statements in this specification of the "objects of the invention" relate to preferred embodiments of the invention, but not necessarily to all embodiments of the invention falling within the claims.

The description of the invention with reference to the drawings is by way of example only.

The text of the abstract filed herewith is repeated here as part of the specification.

23 For enlarging the dynamic range of controlling an electronic shutter speed'in the imaging device using the photoelectric transformation device and for improving the precision of controlling the exposure time, the shutter speed preset value from a shutter speed input unit 27 is inputted to a shutter control circuit 28. The shutter control circuit 28 calculates the frequency dividing value of master clock to convert a driving frequency of the image sensing device 21 from the given shutter speed preset value, then inputs to the timing generation circuit 26. The timing generation circuit 26 divides the master clock according to the frequency dividing value. Simultaneously, the shutter control circuit 28 calculates the number of generating the shutter pulses for sweeping out accumulated electric charges from the shutter speed preset value, and inputs the shutter pulse via a drive circuit 29 to the image sensing device 21, then sweeps out the electric charges.

24

Claims

1. A method of controlling the exposure time of an imaging device for transmitting an image in accordance with horizontal and vertical scanning of a photoelectric conversion device, by converting a charge accumulation time of said photoelectric conversion device, wherein said charge accumulation time of said photoelectric conversion device is converted by converting at least a frame frequency of said imaging device on the basis of the frame frequency of said imaging device, the number of horizontal scanning lines per frame, and the number of shutter pulses for exhausting the electric charges generated corresponding to horizontal synchronizing signals.

2. A method of controlling the exposure time of an imaging device as claimed in Claim 1, wherein the frame frequency of said imaging device and the number of said shutter pulses are changed.

3. A method of controlling the exposure time of an imaging device as claimed in Claim 1, wherein the frame frequency of said imaging device is set to be longer than the standard frame frequency with no control.

4. A method of controlling the exposure time of an imaging device as claimed in Claim 1, wherein a frequency dividing ratio Of a master clock which is the standard of operation timing of said imaging device is changedto thereby alter its frequency, whereby the frame frequency of said imaging device is changed.

5. A method of controlling the exposure time of an imaging device as claimed in Claim 1, wherein the frame frequency of said imaging device is altered on the basis of the preset value of the exposure time input to the imaging device and an exposure control device.

6. A method of controlling the exposure time of an imaging device as claimed in Claim 1, wherein the frame frequency of said imaging device is converted on the basis of the average value of output image signals of said photoelectric conversion device converted to digital signals.

7. An exposure control device of an imaging device for controlling the exposure time of said imaging device to transmit images by means of horizontal and vertical scanning using the photoelectric conversion device, by changing a charge accumulation time of said photoelectric conversion device, comprising means for converting a drive frequency conversion device.

of said photoelectric

8. An exposure control device of an imaging device as 26 claimed in Claim 7, comprising means for generating said shutter pulse exhausting the charges of said photoelectric conversion device corresponding to said horizontal retrace line signals, at a specified time in the vertical retrace line period and the horizontal retrace line period of said imaging device, and in the same frequency with the horizontal retrace line signals.

9. An exposure control device of an imaging device as claimed in Claim 7, wherein the drive.

frequency of said photoelectric conversion device is changed based on the preset value of exposure time given from the outside of said imaging device and said exposure control device.

10. An exposure control device of an imaging device as claimed in Claim 7, wherein the drive frequency of said photoelectric conversion device is changed based on said average value Of digitized image signals of said photoelectric conversion device.

11. An exposure control device for controlling the exposure time of an imaging device having a photoelectric conversion device and a drive circuit to drive said imaging device and transmitting images by means of horizontal and vertical scanning, by changing a charge accumulation time of said photoelectric conversion device, 27 comprising: an oscillator for generating a master clock as a standard of operation timing of said imaging device, a shutter speed calculating circuit for calculating a frequency dividing value of the master clock of said imaging device based on the preset value of exposure time inputted thereto, a frequency dividing circuit for dividing the frequency of the master clock to IIN based on the f requency dividing value N outputted from said shutter speed calculating circuit; and a circuit for generating the horizontal retrace line signals with the frequency of 11N and the read pulse based on the clock signals outputted from said frequency dividing circuit, and for inputting the generated signals to said drive circuit.

12. An exposure control device for controlling the exposure time of an imaging device having a photoelectric conversion device and a drive circuit for driving said imaging device and transmitting images by means of horizontal and vertical scanning, by changing the number of shutter pulses for exhausting the accumulated charges generating in the vertical and horizontal retrace line periods, whereby changing a charge accumulation time of said photoelectric conversion device, comprising:

28 an oscillator for generating a master clock as a standard of operation timing of said imaging device; a shutter speed calculating circuit for calculating a frequency dividing value of the master clock of said imaging device based on the preset value of exposure time inputted thereto and for calculating the number of shutter pulses generated in the vertical retrace line period and horizontal scanning period; a frequency dividing circuit for dividing the frequency of the master clock to 11N based on the frequency dividing value N outputted from said shutter speed calculating circuit; a pulse signal generation circuit for generating the horizontal retrace line signals with the frequency of 11N, the read pulse, and subsynchronizing signals based on the clock signals after frequency dividing, outputted from said frequency dividing circui.t; a counter for setting the number of shutter pulses outputted from said shutter speed calculating circuit by the read pulse outputted from the said pulse signal generation circuit, and for calculating the number of horizontal scanning lines with the horizontal retrace line signals, then to generate a reset signal when reaching to the specified number; and 29 a shutter pulse generation circuit for passing said subhorizontal synchronizing signals in the period from said read pulse to the reset signal outputted from said counter, and for inputting said signals as the shutter pulse to said drive circuit.

13. An exposure control device for controlling the exposure time of an imaging device having a photoelectric conversion device and a drive circuit to drive said imaging device and transmitting images and vertical scanning, by changing pulses for exhausting the accumulated the vertical and horizontal retrace changing a charge accumulation time conversion device, comprising:

by means of horizontal the number of shutter charges to generate in line periods, whereby of said photoelectric an integration circuit for calculating the average value of output digitized image signals of said photoelectric conversion device.

an oscillator for generating the master clock as a standard of operation timing of said imaging device; a shutter speed calculating circuit for calculating the frequency dividing value of said master clock and the number of shutter pulses generated in the vertical retrace line period and the vertical scanning period, based on the average value of integration circuit image signals outputted from said a frequency dividing circuit for dividing the frequency of said master clock to 11N, based on the frequency dividing value N outputted' from said shutter speed calculating circuit; a pulse signal circuit for generating the horizontal retrace line signals with the frequency of 11N, read pulse, and subhorizontal synchronizing signals, based on the clock signals outputted from said frequency dividing circuit; a counter for setting the number of shutter pulses outputted from said shutter speed calculating circuit by the read pulse outputted from'said pulse signal generation circuit, and for calculating the number of horizontal scanning lines with the horizontal retrace line signals, then to generate the reset signal when reaching to the specified number; and a shutter pulse generation circuit for passing the subhorizontal synchronizing signals in the period from the read pulse to the reset signal outputted by the said counter, and for inputting said signals as the shutter pulse to said drive circuit.

1 31

14. A method of controlling the exposure time of an imaging device substantially as herein described with reference to Figures 3 to 7 of the accompanying drawings.

15. An exposure device substantially as herein described with reference to any one of Figures 3, 6 or 7 of the accompanying drawings.