JPS63141710A - Manufacture of multilayer interconnection board - Google Patents
Manufacture of multilayer interconnection boardInfo
- Publication number
- JPS63141710A JPS63141710A JP61288228A JP28822886A JPS63141710A JP S63141710 A JPS63141710 A JP S63141710A JP 61288228 A JP61288228 A JP 61288228A JP 28822886 A JP28822886 A JP 28822886A JP S63141710 A JPS63141710 A JP S63141710A
- Authority
- JP
- Japan
- Prior art keywords
- pressure
- molding
- released
- multilayer wiring
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 238000000465 moulding Methods 0.000 claims abstract description 44
- 238000000034 method Methods 0.000 claims abstract description 18
- 238000010438 heat treatment Methods 0.000 claims abstract description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 3
- 229910052802 copper Inorganic materials 0.000 claims abstract description 3
- 239000010949 copper Substances 0.000 claims abstract description 3
- 230000007423 decrease Effects 0.000 claims description 2
- 239000011347 resin Substances 0.000 abstract description 4
- 229920005989 resin Polymers 0.000 abstract description 4
- 230000002265 prevention Effects 0.000 abstract 1
- 239000011800 void material Substances 0.000 abstract 1
- 230000000052 comparative effect Effects 0.000 description 8
- 239000010410 layer Substances 0.000 description 4
- 230000006837 decompression Effects 0.000 description 2
- 210000005069 ears Anatomy 0.000 description 2
- 238000007666 vacuum forming Methods 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Landscapes
- Casting Or Compression Moulding Of Plastics Or The Like (AREA)
- Moulding By Coating Moulds (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の目的］
（産業上の利用分１’Ｆ）
本発明は、真空（減圧）成形によって寸法精度の高い多
層配線板を製造する方法に関する。Detailed Description of the Invention [Object of the Invention] (Industrial Application 1'F) The present invention relates to a method for manufacturing a multilayer wiring board with high dimensional accuracy by vacuum (reduced pressure) forming.
（従来の技術）
最近、産業用電子機器等の高速化や高密度化に伴い、電
子部品を搭載する配線板の高多層化が進められている。(Prior Art) Recently, with the increase in speed and density of industrial electronic equipment, wiring boards on which electronic components are mounted are becoming more multilayered.
そして演算速度の高速化に応じるための層間厚さの減少
や配線パターン高密度イしに伴ない、ボイドの存在の危
険性がますます増大しつつある。As the interlayer thickness decreases and wiring patterns become denser to meet higher calculation speeds, the risk of the presence of voids is increasing.
このようなボイドを除去するために、積層板を減圧下で
加熱、加圧し一体に成形する方法が従来から行なわれて
いる。この方法においては、成形の際に加える圧力を常
圧下で成形する場合に比べて低くすることができ、反り
、ねじれ等が少なく寸法安定性の良い多層配線板を製造
することができるという利点がある。In order to remove such voids, a method has conventionally been used in which a laminated plate is heated and pressurized under reduced pressure to be integrally formed. This method has the advantage that the pressure applied during molding can be lower than that of molding under normal pressure, and it is possible to manufacture multilayer wiring boards with less warpage, twisting, etc. and good dimensional stability. be.
（発明が解決しようとする問題点）
しかしながら最近の急速な高密度化の進行により、ビン
間の配線パターンが４本以上という多層配線板や眉間厚
さが１００μｌ、２００μｌと極めて薄い多層配線板が
要求されてきているのに対し、従来の成形圧が比較的低
い（１０〜２０ｋｇ／ｃ／）真空（減圧）成形法では、
ボイドの除去が完全になされているとはいえなかった。(Problem to be solved by the invention) However, due to the recent rapid increase in density, multilayer wiring boards with wiring patterns of 4 or more between bins and extremely thin multilayer wiring boards with a glabella thickness of 100 μl or 200 μl are now available. In contrast, the conventional vacuum (reduced pressure) molding method requires relatively low molding pressure (10 to 20 kg/c/).
It could not be said that the voids were completely removed.
また、ボイドを完全に除去するために成形圧を高くすれ
ば、反り、ねじれ、ひずみ等のない多層配線板を製造す
ることが難しかった。Furthermore, if the molding pressure is increased to completely remove voids, it is difficult to produce a multilayer wiring board that is free from warping, twisting, distortion, and the like.
本発明はこれらの問題を解決するためになされたもので
、ボイドがなくしかも板内部が均一で寸法精度の高い多
層配線板を製造する方法を提供することを目的とする。The present invention has been made to solve these problems, and an object of the present invention is to provide a method for manufacturing a multilayer wiring board that is void-free, has a uniform interior, and has high dimensional accuracy.
［発明の構成］
（問題点を解決するための手段）
本発明の多層配線板の製造方法は、両面にそれぞれ配線
パターンが形成された１枚あるいは２枚以上の内層板と
２枚の外層銅張板とを、プリプレグを介して順に積層し
、これらを減圧雰囲気中で加熱、加圧し、一体に成形す
る多層配線板の製造方法において、成形工程中に減圧を
解除し常圧雰囲気に戻し、さらに加熱を続けて所定の硬
化時間が経過した後、速やかに加圧を解除することを特
徴としている。[Structure of the Invention] (Means for Solving the Problems) The method for manufacturing a multilayer wiring board of the present invention includes one or more inner layer boards each having a wiring pattern formed on both sides, and two outer layer copper boards. In a method for producing a multilayer wiring board, in which a clad plate is sequentially laminated via a prepreg, these are heated and pressurized in a reduced pressure atmosphere, and integrally formed, the reduced pressure is released during the forming process and returned to a normal pressure atmosphere, It is characterized in that after a predetermined curing time has elapsed with further heating, the pressure is immediately released.
本発明において成形の際の減圧度（真空度）は最高で０
〜１０ｔＯｒｒとすることが望ましい、そして図面に示
すように、成形圧力を加えてから３０分間経過し、多層
配線板の内部温度（最も、温度が低い部分の温度）が最
高温度（１７０〜１８０℃）に達するまでの間に、減圧
を解除し常圧に戻すことが望ましい。In the present invention, the degree of reduced pressure (degree of vacuum) during molding is at most 0.
As shown in the drawing, after 30 minutes have passed since the molding pressure was applied, the internal temperature of the multilayer wiring board (the temperature of the lowest temperature part) reaches the maximum temperature (170 to 180℃). ) It is desirable to release the reduced pressure and return to normal pressure.
また成形特多層配線板に加える圧力（成形圧力）として
は、従来の真空成形で５〜１５ｋｇ／ｃ＃、通常成形で
４０〜６０ｋｇ／ｃ／の成形圧力が用いられるのに対し
て、２５〜４０ｋｇ／ｃ／の中程度の圧力が用いられる
。したがって加圧手段としては、通常のオートクレーブ
ではなくディライトプレスを用いることができる。In addition, the pressure (molding pressure) applied to the molded multilayer wiring board is 5 to 15 kg/c# in conventional vacuum forming, and 40 to 60 kg/c/ in normal molding, whereas 25 to 60 kg/c/ A medium pressure of 40 kg/c/ is used. Therefore, as a pressurizing means, a delight press can be used instead of an ordinary autoclave.
さらに本発明においては、所定の硬化時間経過後に成形
圧力を解除するようにし、この加圧解除は、積層板の内
部温度（製品内の最も低い温度）が１１０〜１２０℃に
達するまでの間に行うことが望ましい。Furthermore, in the present invention, the molding pressure is released after a predetermined curing time has elapsed, and this pressure is released before the internal temperature of the laminate (the lowest temperature within the product) reaches 110 to 120°C. It is desirable to do so.
（作 用）
本発明の多層配線板の製造方法においては、ａ層板を減
圧雰囲気中で加熱しつつ中程度の圧力で加圧、成形を行
なうことができるので、層内部および眉間からボイドが
完全に除去される。(Function) In the method for manufacturing a multilayer wiring board of the present invention, since the A-layer board can be heated in a reduced pressure atmosphere and pressed and molded at a moderate pressure, voids can be removed from inside the layer and between the eyebrows. completely removed.
また、成形圧力が最高圧に切り替ってから内部温度が最
高温度に達するまでの間に減圧を解除し常圧雰囲気に復
帰させているので、不必要なレジンフローが抑えられ、
内部組織が均一な多層配線板が得られる。In addition, since the reduced pressure is released and the atmosphere returns to normal pressure after the molding pressure switches to the maximum pressure and before the internal temperature reaches the maximum temperature, unnecessary resin flow is suppressed.
A multilayer wiring board with a uniform internal structure can be obtained.
しかも、加熱終了後板の内部温度が未だ充分に高い間に
加圧を解除しているので、加圧による板内部のひずみが
解放除去される。Moreover, since the pressure is released while the internal temperature of the plate is still sufficiently high after the heating is completed, the strain inside the plate due to the pressurization is released and removed.
（実施例） 以下、本発明の実施例について記載する。(Example) Examples of the present invention will be described below.
実施例１
表裏両面にそれぞれ厚さ１０μｌでビン間３本の高密度
の配線パターンを有する １．２Ｉｎ厚のガラス−エポ
キシ内層板の両面に、１００μｍ厚プリプレグ２枚と１
８μｌ厚の銀箔とを重ねた積層板（サイズは４００Ｘ３
３０ ｎ１Ｍ）を、ディラクトプレスにより次の条件下
で加熱、加圧し一体に成形しな。Example 1 Two sheets of 100 μm thick prepreg and one
Laminated board with 8 μl thick silver foil (size is 400 x 3
30 n1M) was heated and pressed under the following conditions using a diracto press and molded into one piece.
すなわち、減圧度０〜１０ｔＯｒｒ、成形圧力（１段〜
２段）０〜１５ｋｇ／ｃ／、成形温度（プレス熱板温度
）１７５℃で、成形圧力が２段階目に切り替ってから積
層板内部温度が最高（１１５℃）に達するまでの間に減
圧を解除し、さらに加熱を続けて内部温度が１１０〜１
２０℃の温度に達する前に加圧を解除し、接触圧程度の
圧力にした。That is, the degree of pressure reduction is 0 to 10 tOrr, the molding pressure (1 step to
2nd stage) 0 to 15 kg/c/, at a molding temperature (press hot plate temperature) of 175°C, reduce the pressure between when the molding pressure switches to the second stage and until the internal temperature of the laminate reaches its maximum (115°C). Remove the button and continue heating until the internal temperature reaches 110~1.
The pressure was released before the temperature reached 20°C, and the pressure was brought to about the contact pressure.
実施例２．３
成形圧力をそれぞれ０〜２５ｋｇ／ｄおよび０〜３５ｋ
ｇ／ｃｉとした以外は実施例１と同じ条件で、多層配線
板を製造した。Example 2.3 Molding pressure 0 to 25 kg/d and 0 to 35 k, respectively
A multilayer wiring board was manufactured under the same conditions as in Example 1 except that g/ci was used.
また、比較のために実施例に用いたものと同じ多層配線
板を次の条件で加熱、加圧成形した。Further, for comparison, the same multilayer wiring board as that used in the example was heated and press-molded under the following conditions.
比較例１
減圧せずに１７５℃の温度４〜４０に８／ ｄの圧力で
成形した。このとき従来通り成形圧力の解除は行なわな
かった。Comparative Example 1 Molding was performed at a temperature of 175° C. from 4 to 40 and a pressure of 8/d without reducing the pressure. At this time, the molding pressure was not released as usual.
比較例２
途中で成形圧力の解除を行なった以外は比較例１と同じ
条件で多層配線板を製造した。Comparative Example 2 A multilayer wiring board was manufactured under the same conditions as Comparative Example 1 except that the molding pressure was released midway through.
比較例３
減圧度０〜１０ｔｏｒｒ、成形圧力０〜２５ｃｇ ／
ｃｉ、成形温度１７５℃で、成形工程中に減圧の解除の
みを行なって多層配線板を製造した。Comparative Example 3 Decompression degree 0-10 torr, molding pressure 0-25 cg/
A multilayer wiring board was manufactured at a molding temperature of 175° C. and only by releasing the reduced pressure during the molding process.
比較例４
減圧度Ｏ〜１０ｔｏｒｒ、成形圧力０〜２５ｋｇ／ｃ（
成形温度１７５℃で、途中で成形圧力の解除のみを行な
い減圧を解除せずに成形を行なって多層配線板を製造し
た。Comparative Example 4 Pressure reduction degree O to 10 torr, molding pressure 0 to 25 kg/c (
A multilayer wiring board was manufactured by performing molding at a molding temperature of 175° C., only releasing the molding pressure in the middle, but without releasing the reduced pressure.
比較例５
減圧ｏ〜１０ｔＯｒｒ、成形圧力０〜２５ｋｇ／Ｌｉ、
成形温度１７５℃で、減圧および圧力を解除せずそのま
ま成形した。Comparative Example 5 Reduced pressure o~10tOrr, molding pressure 0~25kg/Li,
The molding was performed at a molding temperature of 175°C without removing the pressure or releasing the pressure.
比較例６
減圧度０〜１０ｔＯｒｒ、成形圧力０”’−１５ｉｚ
／ ｃｉ、成形温度１７５℃で成形圧力のみを解除して
多層配線板を製造した。Comparative Example 6 Decompression degree 0-10tOrr, molding pressure 0"'-15iz
/ci, a molding temperature of 175° C., and only the molding pressure was released to produce a multilayer wiring board.
これらの実施例と比較例でそれぞれ得られた多層配線板
の特性を次の要領で測定した。The characteristics of the multilayer wiring boards obtained in these Examples and Comparative Examples were measured in the following manner.
■）レジンフロー 耳を切り落とした後の重量を測定し、重量比を求めた。■) Resin flow After cutting off the ears, the weight was measured and the weight ratio was determined.
■）ボイド、外観、金型汚れは、目視観察によった。■) Voids, appearance, and mold stains were visually observed.
■）反り
耳を切り落としＥ−１／１３０ （加熱）処理ｔｒｔ
の反りを測定し、これを板の最大炎に対する割合で表わ
した。■) Cut off the warped ears and E-1/130 (heating) treatment trt
The warpage was measured and expressed as a percentage of the maximum flame of the board.
■）耐熱性
Ｄ−１７１００（煮沸）処理後、２６０℃のハンダに３
０秒間浸漬して目視観察した。■) After heat resistance D-17100 (boiling) treatment, solder at 260℃
It was immersed for 0 seconds and visually observed.
■）板厚
周辺部と中央部の板厚をそれぞれ測定し、平均値を求め
た。■) Plate Thickness The plate thickness at the peripheral part and central part was measured, and the average value was determined.
■）寸法精度 ＮＩＬ法によって測定した。■) Dimensional accuracy Measured by NIL method.
これらの測定結果をそれぞれ次表に示す。The results of these measurements are shown in the table below.
なお表中、「減圧」の「初〜ａ」は成形初めから図のａ
点まで減圧したことを示し、「初〜ｂ」は成形初めから
図のｂ点まで減圧したことを示している。また表中の○
は良好、Δは良好とは言えないが実用上さしつかえない
程度であるを示し、Ｘは不良を示す
（以下余白）
［発明の効果］
以上の実施例からも明らかなように本発明の方法におい
ては、多層配線板を減圧雰囲気中で通常の真空成形より
やや高い圧力を加えつつ加圧して成形するとともに、減
圧および成形圧力をそれぞれ最後まで加えず途中で解除
しているので、ボイドの除去、レジンフローの抑制、お
よび高温高圧による残留ひずみの除去がそれぞれバラン
スよく達成される。In addition, in the table, "start to a" of "reduced pressure" means "a" in the figure from the beginning of molding.
``First ~ b'' indicates that the pressure was reduced from the beginning of molding to point b in the figure. Also, ○ in the table
indicates good, Δ indicates not good but is acceptable for practical purposes, and X indicates poor (blank below). [Effects of the Invention] As is clear from the above examples, the method of the present invention In this method, the multilayer wiring board is molded in a reduced pressure atmosphere while applying a slightly higher pressure than normal vacuum forming, and the reduced pressure and molding pressure are not applied until the end and are released in the middle, thereby eliminating voids. Suppression of resin flow and removal of residual strain due to high temperature and pressure are achieved in a well-balanced manner.
従って、反り、ねじれボイドがなく板厚等が均一で寸法
精度の良い多層板を製造することができる。Therefore, it is possible to produce a multilayer board with uniform board thickness, etc., and high dimensional accuracy without warping or twisting voids.
図面は、本発明における成形際の諸条件をそれぞれ示す
グラフである。
出願人 東芝ケミカル株式会社
代理人弁理士 須 山 佐 −
Ｑ歓１度
一−−−−− 成形圧力
一一一一・−減圧度
一一一一 内部４度The drawings are graphs showing various conditions during molding in the present invention. Applicant Toshiba Chemical Co., Ltd. Representative Patent Attorney Satoshi Suyama - Q-Kan 1 degree 1 - Molding pressure 1111 - Depressurization degree 1111 Internal 4 degrees
Claims (3)
るいは２枚以上の内層板と２枚の外層銅張板とを、プリ
プレグを介して順に積層し、これらを減圧雰囲気中で加
熱、加圧し、一体に成形する多層配線板の製造方法にお
いて、成形工程中に減圧を解除して常圧雰囲気に戻し、
さらに加熱を続けて所定の硬化時間が経過した後、速や
かに加圧を解除することを特徴とする多層配線板の製造
方法。(1) One or more inner layer boards each having a wiring pattern formed on both sides and two outer layer copper clad boards are laminated in order via prepreg, and then heated and pressurized in a reduced pressure atmosphere. , in a method for manufacturing a multilayer wiring board that is integrally molded, the reduced pressure is released during the molding process to return to a normal pressure atmosphere,
A method for manufacturing a multilayer wiring board, which comprises further heating and immediately releasing pressure after a predetermined curing time has elapsed.
度に達するまでの間に、減圧を解除することを特徴とす
る特許請求の範囲第１項記載の多層配線板の製造方法。(2) The method for manufacturing a multilayer wiring board according to claim 1, wherein the reduced pressure is released after the molding pressure is applied until the internal temperature of the laminate reaches its maximum temperature.
の温度に低下するまでの間に、加圧を解除することを特
徴とする特許請求の範囲第１項または第２項記載の多層
配線板の製造方法。(3) After heating, the internal temperature of the laminate is 110-120℃
3. The method of manufacturing a multilayer wiring board according to claim 1, wherein the pressure is released until the temperature decreases to .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61288228A JPS63141710A (en) | 1986-12-03 | 1986-12-03 | Manufacture of multilayer interconnection board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61288228A JPS63141710A (en) | 1986-12-03 | 1986-12-03 | Manufacture of multilayer interconnection board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63141710A true JPS63141710A (en) | 1988-06-14 |
Family
ID=17727490
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61288228A Pending JPS63141710A (en) | 1986-12-03 | 1986-12-03 | Manufacture of multilayer interconnection board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63141710A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63233811A (en) * | 1987-03-20 | 1988-09-29 | Matsushita Electric Works Ltd | Manufacture of multilayer printed-circuit board |
| JPH046897A (en) * | 1990-04-24 | 1992-01-10 | Shin Kobe Electric Mach Co Ltd | Manufacture of multilayer plate |
| JP2002151842A (en) * | 2000-11-16 | 2002-05-24 | Hitachi Chem Co Ltd | Method of manufacturing multilayer board |
| US7793529B2 (en) | 2003-05-20 | 2010-09-14 | Ngk Insulators, Ltd. | Method for producing a formed body using a forming jig |
| CN109640548A (en) * | 2018-12-29 | 2019-04-16 | 广州兴森快捷电路科技有限公司 | Prepreg compression method and PCB construction |
-
1986
- 1986-12-03 JP JP61288228A patent/JPS63141710A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63233811A (en) * | 1987-03-20 | 1988-09-29 | Matsushita Electric Works Ltd | Manufacture of multilayer printed-circuit board |
| JPH046897A (en) * | 1990-04-24 | 1992-01-10 | Shin Kobe Electric Mach Co Ltd | Manufacture of multilayer plate |
| JP2002151842A (en) * | 2000-11-16 | 2002-05-24 | Hitachi Chem Co Ltd | Method of manufacturing multilayer board |
| US7793529B2 (en) | 2003-05-20 | 2010-09-14 | Ngk Insulators, Ltd. | Method for producing a formed body using a forming jig |
| CN109640548A (en) * | 2018-12-29 | 2019-04-16 | 广州兴森快捷电路科技有限公司 | Prepreg compression method and PCB construction |
| CN109640548B (en) * | 2018-12-29 | 2020-06-23 | 广州兴森快捷电路科技有限公司 | Prepreg laminating method and PCB structure |
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