JP2001024324A - Manufacture of build-up printed wiring board - Google Patents

Manufacture of build-up printed wiring board

Info

Publication number
JP2001024324A
JP2001024324A JP19545799A JP19545799A JP2001024324A JP 2001024324 A JP2001024324 A JP 2001024324A JP 19545799 A JP19545799 A JP 19545799A JP 19545799 A JP19545799 A JP 19545799A JP 2001024324 A JP2001024324 A JP 2001024324A
Authority
JP
Japan
Prior art keywords
resin
copper foil
build
wiring board
core layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19545799A
Other languages
Japanese (ja)
Inventor
Akira Ashizawa
晃 芦澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Avionics Co Ltd
Original Assignee
Nippon Avionics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Avionics Co Ltd filed Critical Nippon Avionics Co Ltd
Priority to JP19545799A priority Critical patent/JP2001024324A/en
Publication of JP2001024324A publication Critical patent/JP2001024324A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To suppress the dent quantity of resin which is brought into contact with a copper foil surface and copper foil by stacking copper foil with resin by vacuum pressing for forming the build-up layer of a build-up printed wiring board, and using thick copper foil for copper foil with resin. SOLUTION: A stack object is vacuum-extracted at the time of starting stacking by vacuum pressing and inner air is made to be a thin state. The object is heated in such a state and semi-cured resin is softened. Softened resin is pulled into the through hole of a core layer which is decompressed and the hole is filled with resin. For compensating resin which is made to flow into the hole, resin at the periphery of the through hole in the core layer is drawn, and copper foil on the surface of resin is also drawn to a core layer side so as to form copper foil with resin. Thick copper foil is used for copper foil with resin. Thus, the finishing precision of the characteristic impedance of a pattern can be improved.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はビルドアッププリン
ト配線板の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a build-up printed wiring board.

【0002】[0002]

【従来の技術】ビルドアッププリント配線板でビルドア
ップ層(以下、ビルド層という。)を形成するには種々
の方法があるが、樹脂付銅箔を積層することでビルド層
を形成する方法もその一つである。本技術は樹脂付銅箔
を積層する方式に関するので、以下該方式に限定して説
明する。また、パターン形成方法も種々あり、以下、セ
ミアディティブ法を例にして説明するが、本発明はセミ
アディティブ法に限定するものではない。図2および図
3はビルド層積層からビルド層導体パターン形成までの
例を工程順に模式図で示したものである。精細パターン
形成に有利なセミアディティブ法でパターン形成するた
めに、樹脂付銅箔1の銅箔2はビルド層積層(図2B)
後エッチングにより全て除去(図2C)する。レーザで
ビルド層ビアホール用孔3を穿設(図2D)した後、無
電解銅めっきおよび数μmの薄い電解銅めっき4(一次
銅めっき、図2E)を施す。ドライフィルム5貼付(図
2F)、パターンのポジフィルム6を密着させてのパタ
ーン露光(図3G)、現像(図3H)の一連のレジスト
処理工程を経て、パターンめっきと呼ぶ二次銅めっき7
(図3I)を施す。レジスト5剥離後(図3J)、ソフ
トエッチングにより数μmの銅を除去(図3K)するこ
とでパターン形成が完了する。
2. Description of the Related Art There are various methods for forming a build-up layer (hereinafter referred to as a build layer) on a build-up printed wiring board. A method of forming a build layer by laminating copper foil with resin is also available. One of them. Since the present technology relates to a method of laminating a copper foil with a resin, the following description is limited to this method. There are also various pattern forming methods. Hereinafter, the semi-additive method will be described as an example, but the present invention is not limited to the semi-additive method. FIG. 2 and FIG. 3 are schematic diagrams showing an example from the build layer lamination to the build layer conductor pattern formation in the order of steps. In order to form a pattern by a semi-additive method which is advantageous for forming a fine pattern, the copper foil 2 of the resin-coated copper foil 1 is laminated with a build layer (FIG. 2B).
All are removed by post-etching (FIG. 2C). After drilling the via hole 3 for the build layer via laser (FIG. 2D), electroless copper plating and thin electrolytic copper plating 4 of several μm (primary copper plating, FIG. 2E) are applied. Through a series of resist processing steps of attaching a dry film 5 (FIG. 2F), pattern exposure (FIG. 3G) with a pattern positive film 6 in close contact, and development (FIG. 3H), secondary copper plating 7 called pattern plating
(FIG. 3I). After removing the resist 5 (FIG. 3J), the pattern formation is completed by removing a few μm of copper by soft etching (FIG. 3K).

【0003】樹脂付銅箔をコア層に積層する方法は、液
体樹脂をコア層に塗布する方法と比較して、ビルド層樹
脂厚の均一性およびビルド層樹脂表面の平滑性が優れて
いるため、ビルド層導体パターンの仕上がり寸法精度お
よび該導体パターンの特性インピーダンスの仕上がり精
度が良好である。また、図2に示すように、コア層8は
通常、各層の導体パターンを層間で接続するためのスル
ーホール9(以下、IVHという。)を有しているが、
真空プレスによる積層時に樹脂付銅箔1の樹脂10が該
IVH9内を充填することも利点である。
A method of laminating a resin-coated copper foil on a core layer is superior to a method of applying a liquid resin on a core layer because the build layer resin thickness is uniform and the build layer resin surface is smooth. In addition, the finished dimensional accuracy of the build layer conductive pattern and the finished accuracy of the characteristic impedance of the conductive pattern are good. Further, as shown in FIG. 2, the core layer 8 generally has a through hole 9 (hereinafter, referred to as IVH) for connecting the conductor pattern of each layer between the layers.
It is also advantageous that the resin 10 of the copper foil with resin 1 fills the IVH 9 during lamination by vacuum pressing.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、図2B
に示すように、IVH9に隣接する樹脂がIVH9内に
流れ込み、それにつれてIVH9上の銅箔表面に凹み1
1が生じる。この凹み11のために、図2Fのレジスト
用ドライフィルム5を貼付した時凹み11の部分の銅め
っき4とドライフィルム5の間に気泡12を閉じ込めて
しまう。この気泡12のために、パターン露光(図3
G)の際、露光ボケとなり結果として導体パターンの細
り、断線となったり、現像(図3H)の際、レジスト浮
きとなり図3Iの二次銅めっきのめっき液潜り込みが生
じ結果として線幅の太りや線間の短絡となったりする。
本発明は、上記課題を解決するためになされたもので、
銅箔表面および該銅箔に接する樹脂の凹み量を抑制する
ビルドアッププリント配線板の製造方法を提供すること
を目的とする。
However, FIG. 2B
As shown in the figure, the resin adjacent to the IVH9 flows into the IVH9, and accordingly, the depression 1
1 results. Due to the depression 11, when the resist dry film 5 of FIG. 2F is attached, the air bubbles 12 are trapped between the copper plating 4 and the dry film 5 in the portion of the depression 11. The pattern exposure (FIG. 3)
In the case of G), exposure blur occurs, resulting in thinning and disconnection of the conductor pattern, and in the development (FIG. 3H), the resist floats, and the plating solution of the secondary copper plating shown in FIG. Or short circuit between wires.
The present invention has been made to solve the above problems,
It is an object of the present invention to provide a method for manufacturing a build-up printed wiring board that suppresses the surface of a copper foil and the amount of dent of a resin in contact with the copper foil.

【0005】[0005]

【課題を解決するための手段】請求項1のビルドアップ
プリント配線板の製造方法は、ビルドアッププリント配
線板のビルドアップ層形成にあたり樹脂付銅箔を真空プ
レスで積層する製造方法において、該樹脂付銅箔に厚手
銅箔を使用することを特徴とする。
According to a first aspect of the present invention, there is provided a method of manufacturing a build-up printed wiring board, comprising: forming a build-up layer of the build-up printed wiring board; It is characterized in that a thick copper foil is used as the attached copper foil.

【0006】請求項1のビルドアッププリント配線板の
製造方法によれば、ビルドアップ層積層の際コア層IV
H近傍の銅箔凹みの発生が抑止されるので、レジスト工
程においてドライフィルムを貼付する時気泡を閉じ込め
てしまうことがない。
According to the method of manufacturing a build-up printed wiring board of the first aspect, the core layer IV is formed when the build-up layers are laminated.
Since the occurrence of copper foil dents near H is suppressed, bubbles are not trapped when a dry film is attached in the resist process.

【0007】請求項2のビルドアッププリント配線板の
製造方法は、請求項1記載の樹脂付銅箔に18μm以上
の銅箔を使用することを特徴とする。
According to a second aspect of the present invention, there is provided a method of manufacturing a build-up printed wiring board, wherein a copper foil having a thickness of 18 μm or more is used as the resin-coated copper foil.

【0008】請求項2のビルドアッププリント配線板の
製造方法によれば、ビルドアップ層積層の際コア層IV
H近傍の銅箔凹みを2μm以下に抑えられるので、レジ
スト工程においてドライフィルムを貼付する時気泡を閉
じ込めてしまうことがない。
According to the method of manufacturing a build-up printed wiring board of the second aspect, the core layer IV is formed when the build-up layers are laminated.
Since the copper foil dent near H is suppressed to 2 μm or less, bubbles are not trapped when a dry film is attached in the resist process.

【0009】[0009]

【発明の実施の形態】図1にビルド層積層途中のIVH
近傍を断面模式図で示す。銅箔が凹む経過は次のように
考えられる。真空プレスによる積層開始時に積層対象物
は真空引きされ内部の空気は希薄な状態となる。その状
態で加熱され半硬化の樹脂は軟化し、そこに外部からの
加圧で、軟化した樹脂は減圧されたIVH孔内へ引き込
まれ孔内は樹脂で充填される。孔内へ流れ込んだ樹脂を
補填するためIVHの周囲の樹脂が引き寄せられようと
する。同時に、樹脂の表面の銅箔もコア層側に引き寄せ
られる。ここで軟化した樹脂は低フローで粘度が高いた
め、IVHから離れた部分の樹脂移動量は多くない。従
って、IVHの近傍で樹脂移動と銅箔の凹みが発生し、
樹脂量のバランスが取れ、その後樹脂は硬化する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an IVH in the middle of build layer lamination.
The vicinity is shown in a schematic sectional view. The course of the depression of the copper foil is considered as follows. At the start of lamination by vacuum press, the lamination target is evacuated and the air inside is in a dilute state. In this state, the semi-cured resin is heated and softened, and the softened resin is drawn into the reduced-pressure IVH hole by external pressure, and the hole is filled with the resin. The resin around the IVH is about to be drawn to make up for the resin that has flowed into the holes. At the same time, the copper foil on the surface of the resin is also drawn toward the core layer. Here, since the softened resin has a low flow and a high viscosity, the amount of resin movement in a portion away from the IVH is not large. Therefore, resin migration and dents in the copper foil occur near the IVH,
The amount of resin is balanced, and then the resin cures.

【0010】銅箔の凹みを数値で把握するために銅箔の
凹みに関係すると考えられる樹脂付銅箔の樹脂厚、銅箔
厚、コア層の板厚およびIVH径の4変数をパラメータ
として積層実験を行った。実験には樹脂厚として60お
よび80μm、銅箔厚として12、18および35μ
m、コア層板厚として0.5および1.3mm、コア層
IVH径として0.25および0.3mmを使用した。
前記実験の銅箔の凹み量を測定した結果、銅箔の凹み量
には主に銅箔厚さとIVH径が寄与し、樹脂厚とコア層
板厚は前記の変動範囲では無視できることが判明した。
「表1」はその実験結果で、各々100箇所の測定点の
凹み量を実測しその数値の範囲を表したものである。
[0010] In order to grasp the depression of the copper foil numerically, lamination is performed using four variables of the resin thickness of the resin-coated copper foil, the thickness of the copper foil, the thickness of the core layer and the IVH diameter, which are considered to be related to the depression of the copper foil. An experiment was performed. In the experiment, the resin thickness was 60 and 80 μm, and the copper foil thickness was 12, 18 and 35 μm.
m, the core layer thickness was 0.5 and 1.3 mm, and the core layer IVH diameter was 0.25 and 0.3 mm.
As a result of measuring the dent amount of the copper foil in the above experiment, it was found that mainly the copper foil thickness and the IVH diameter contributed to the dent amount of the copper foil, and the resin thickness and the core layer plate thickness were negligible in the above-mentioned fluctuation range. .
"Table 1" shows the results of the experiment, in which the amount of dent at 100 measurement points was actually measured and the range of the numerical values was shown.

【表1】 [Table 1]

【0011】前記実験結果および別に確認したレジスト
用ドライフィルムの追従性とから引き出された結論とし
て、IVH径が0.25mmの場合は銅箔厚を18μm
にすることで凹みを2μm以下にでき、気泡なしにドラ
イフィルムが追従することが判明した。また、IVH径
0.3mmの場合は35μmの銅箔厚を使用すればドラ
イフィルムの貼付に悪影響のない凹み量となる。
As a conclusion drawn from the above experimental results and the conformability of the dry film for resist which was separately confirmed, when the IVH diameter is 0.25 mm, the copper foil thickness is 18 μm.
By doing so, it was found that the dent could be reduced to 2 μm or less, and the dry film could follow without bubbles. Further, in the case of an IVH diameter of 0.3 mm, if a copper foil thickness of 35 μm is used, the dent amount does not adversely affect the attachment of the dry film.

【0012】[0012]

【発明の効果】本発明により銅箔厚を選定すれば、樹脂
付銅箔の銅箔がほとんど凹みなくコア層に積層できるの
で、エッチングによる銅箔除去後の樹脂表面の凹みもな
く、樹脂上に施す銅めっきの表面も平坦な仕上がりにな
る。従って、その後に形成する導体パターン仕上がり線
幅精度および該パターン下部の樹脂仕上がり厚精度が高
く、結果該パターンの特性インピーダンスの仕上がり精
度が高くなる。
According to the present invention, if the copper foil thickness is selected according to the present invention, the copper foil of the resin-coated copper foil can be laminated on the core layer with almost no depression. The surface of copper plating to be applied also has a flat finish. Accordingly, the finished line width accuracy of the conductor pattern formed thereafter and the finished thickness accuracy of the resin under the pattern are high, and as a result, the finishing accuracy of the characteristic impedance of the pattern is increased.

【図面の簡単な説明】[Brief description of the drawings]

【図1】図1はビルドアップ層積層途中のIVH近傍を
断面模式図で示す。
FIG. 1 is a schematic cross-sectional view showing the vicinity of an IVH in the middle of build-up layer lamination.

【図2】ビルドアッププリント配線板セミアディティブ
法の製造工程前半を示す。
FIG. 2 shows the first half of the manufacturing process of the build-up printed wiring board semi-additive method.

【図3】ビルドアッププリント配線板セミアディティブ
法の製造工程後半を示す。
FIG. 3 shows the latter half of the manufacturing process of the build-up printed wiring board semi-additive method.

【符号の説明】[Explanation of symbols]

1 樹脂付銅箔 2 樹脂付銅箔の銅箔 3 ビルド層ビアホール用孔 4 無電解銅めっきおよび数μmの薄い電解銅めっき
(一次銅めっき) 5 レジスト用ドライフィルム 6 パターンのポジフィルム 7 パターンめっき(二次銅めっき) 8 コア層 9 コア層のスルーホール(IVH) 10 樹脂付銅箔の樹脂 11 銅箔の凹み 12 ドライフィルム貼付時の気泡
DESCRIPTION OF SYMBOLS 1 Copper foil with resin 2 Copper foil of copper foil with resin 3 Hole for build layer via hole 4 Electroless copper plating and thin electrolytic copper plating of several μm (primary copper plating) 5 Dry film for resist 6 Positive film of pattern 7 Pattern plating (Secondary copper plating) 8 Core layer 9 Through hole (IVH) in core layer 10 Resin of copper foil with resin 11 Depression of copper foil 12 Bubbles when attaching dry film

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ビルドアッププリント配線板のビルドア
ップ層形成にあたり樹脂付銅箔を真空プレスで積層する
製造方法において、該樹脂付銅箔に厚手銅箔を使用する
ことを特徴とするビルドアッププリント配線板の製造方
法。
1. A method for producing a build-up layer of a wiring board, in which a copper foil with a resin is laminated by a vacuum press, wherein a thick copper foil is used as the copper foil with a resin. Manufacturing method of wiring board.
【請求項2】 前記樹脂付銅箔に18μm以上の銅箔を
使用することを特徴とする請求項1記載のビルドアップ
プリント配線板の製造方法。
2. The method according to claim 1, wherein a copper foil having a thickness of 18 μm or more is used as the copper foil with resin.
JP19545799A 1999-07-09 1999-07-09 Manufacture of build-up printed wiring board Pending JP2001024324A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19545799A JP2001024324A (en) 1999-07-09 1999-07-09 Manufacture of build-up printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19545799A JP2001024324A (en) 1999-07-09 1999-07-09 Manufacture of build-up printed wiring board

Publications (1)

Publication Number Publication Date
JP2001024324A true JP2001024324A (en) 2001-01-26

Family

ID=16341399

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19545799A Pending JP2001024324A (en) 1999-07-09 1999-07-09 Manufacture of build-up printed wiring board

Country Status (1)

Country Link
JP (1) JP2001024324A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008114858A1 (en) 2007-03-20 2008-09-25 Mitsui Mining & Smelting Co., Ltd. Resin composition for forming insulating layer of printed wiring board
JP2008251970A (en) * 2007-03-30 2008-10-16 Ajinomoto Co Inc Process for producing multilayer printed wiring board
KR101218308B1 (en) * 2008-03-14 2013-01-03 삼성테크윈 주식회사 Method of manufacturing printed circuit board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008114858A1 (en) 2007-03-20 2008-09-25 Mitsui Mining & Smelting Co., Ltd. Resin composition for forming insulating layer of printed wiring board
US8431224B2 (en) 2007-03-20 2013-04-30 Mitsui Mining & Smelting Co., Ltd. Resin composition for forming insulating layer of printed wiring board
JP2008251970A (en) * 2007-03-30 2008-10-16 Ajinomoto Co Inc Process for producing multilayer printed wiring board
KR101218308B1 (en) * 2008-03-14 2013-01-03 삼성테크윈 주식회사 Method of manufacturing printed circuit board

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