JPS63137412A - Manufacture of semiconductor substrate - Google Patents
Manufacture of semiconductor substrateInfo
- Publication number
- JPS63137412A JPS63137412A JP28494686A JP28494686A JPS63137412A JP S63137412 A JPS63137412 A JP S63137412A JP 28494686 A JP28494686 A JP 28494686A JP 28494686 A JP28494686 A JP 28494686A JP S63137412 A JPS63137412 A JP S63137412A
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- thin film
- film
- silicon
- crystal thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 51
- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000013078 crystal Substances 0.000 claims abstract description 105
- 239000010409 thin film Substances 0.000 claims abstract description 85
- 239000010408 film Substances 0.000 claims abstract description 32
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 claims abstract description 20
- 238000005468 ion implantation Methods 0.000 claims abstract description 9
- 238000010438 heat treatment Methods 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 80
- 239000010703 silicon Substances 0.000 claims description 80
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 74
- 239000007790 solid phase Substances 0.000 claims description 12
- 238000001947 vapour-phase growth Methods 0.000 claims description 8
- -1 silicon ions Chemical class 0.000 claims description 5
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 230000007547 defect Effects 0.000 abstract description 9
- 150000002500 ions Chemical class 0.000 abstract description 3
- 239000007787 solid Substances 0.000 abstract 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 9
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 8
- 229910052596 spinel Inorganic materials 0.000 description 8
- 239000011029 spinel Substances 0.000 description 8
- 229910002076 stabilized zirconia Inorganic materials 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 239000001257 hydrogen Substances 0.000 description 5
- 229910052739 hydrogen Inorganic materials 0.000 description 5
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- 238000002513 implantation Methods 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 238000011109 contamination Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000012299 nitrogen atmosphere Substances 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 150000002431 hydrogen Chemical class 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 150000003376 silicon Chemical class 0.000 description 2
- 101100366935 Caenorhabditis elegans sto-2 gene Proteins 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000005465 channeling Effects 0.000 description 1
- 230000002550 fecal effect Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
(イ)産業上の利用分野
この発明はSol (5ilicon on 1n
sulator )型基板構造を有し、たとえば高速・
高1!積したバイポーラトランジスタとMOSトランジ
スタとの混成回路を形成することができる低欠陥密度な
半導体用基板の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (a) Industrial application field
sulator) type substrate structure, for example, high-speed
1st year of high school! The present invention relates to a method of manufacturing a semiconductor substrate with a low defect density, on which a hybrid circuit of bipolar transistors and MOS transistors can be formed.
(0)従来の技術
従来より、サファイヤ基板は、たとえばSO8技術にお
いては利用されてきた。SO8技術は、サファイヤ基板
の上にシリコン薄膜をヘテロエピタキシャル成長させて
MOSデバイスなどを構成し、従来問題となっていた配
線容■と素子間分離を解決し、MOSデバイスなどの高
速化をはかるようにしたものである。更に、SO8技術
の欠点を克服するために、シリコン基板全面にスピネル
単結晶薄膜や、YlCa 、M(J 、SCなどを添加
した安定化ジルコニア薄膜を被覆してなる新しい半導体
基板も提案されている。(0) Prior Art Conventionally, sapphire substrates have been used, for example, in SO8 technology. SO8 technology constructs MOS devices by heteroepitaxially growing a silicon thin film on a sapphire substrate, solving the conventional problems of wiring capacity and isolation between elements, and increasing the speed of MOS devices. This is what I did. Furthermore, in order to overcome the drawbacks of SO8 technology, new semiconductor substrates have been proposed in which the entire silicon substrate is coated with a spinel single crystal thin film or a stabilized zirconia thin film doped with YlCa, M(J, SC, etc.). .
サファイヤ単結晶基板上に気相成長法で形成されたシリ
コン単結晶薄膜は、表面モホロジーや結品性があまり良
くなく、しかも/lのオートドープによる汚染も生じや
すく、欠陥密度は103〜10′(個/cm’ )と多
く、またサフフイヤ基板は高価であるため、デバイス作
成用の基板として広く利用できないのが現状であった。Silicon single-crystal thin films formed on sapphire single-crystal substrates by vapor phase growth do not have very good surface morphology or crystallinity, and are prone to contamination due to /l autodoping, with a defect density of 103 to 10'. (pieces/cm'), and the sapphire substrate is expensive, so at present it cannot be widely used as a substrate for device production.
このような状況に鑑みて、シリコン基板上にスピネル単
結晶薄膜や安定化ジルコニア薄膜を被覆し、高温の酸化
によってこれら酸化膜とシリコン単結晶基板の界面にシ
リコン酸化膜を形成してなる新しい半導体用絶縁基板が
提案され、半導体デバイスが形成可能な半導体用絶縁基
板が実現されている。In view of this situation, we have developed a new semiconductor in which a silicon substrate is coated with a spinel single-crystal thin film or a stabilized zirconia thin film, and a silicon oxide film is formed at the interface between these oxide films and the silicon single-crystal substrate through high-temperature oxidation. An insulating substrate for semiconductors has been proposed, and an insulating substrate for semiconductors on which semiconductor devices can be formed has been realized.
(ハ〉発明が解決しようとする問題点
しかし、シリコン単結晶基板上に形成してなるスピネル
単結晶薄膜や安定化ジルコニア薄膜上に、気相成長法で
シリコン単結晶薄膜をヘテロエピタキシャル成長させた
場合、格子の不整合や熱膨張係数などの違いによって結
晶性の劣化に伴う欠陥密度の増加や表面モホロジーの悪
化などが生じた。(c) Problems to be solved by the invention However, when a silicon single crystal thin film is heteroepitaxially grown by vapor phase growth on a spinel single crystal thin film or a stabilized zirconia thin film formed on a silicon single crystal substrate, However, due to differences in lattice mismatch and thermal expansion coefficient, crystallinity deteriorated, resulting in an increase in defect density and deterioration in surface morphology.
この発明は上記の事情に鑑みてなされたもので、シリコ
ン単結晶基板上に形成してなるスピネル単結晶薄膜や、
安定化ジルコニア単結晶薄膜上に気相成長法でシリコン
単結晶薄膜を形成するヘテロエピタキシャル成長におい
て問題となる、欠陥密度の増加及び表面モホロジーの悪
化などの欠点を改善するとともに、シリコン単結晶薄膜
を形成する気相成長時に、サフフイヤ基板の場合のよう
な1.12のオートドープによる汚染が全くなく、より
高温で結晶性の優れたシリコン単結晶膜を有する半導体
用基板の製造方法を提供することを目的としている。This invention was made in view of the above circumstances, and includes a spinel single crystal thin film formed on a silicon single crystal substrate,
Forming a silicon single-crystal thin film on a stabilized zirconia single-crystal thin film using a vapor phase growth method. This method improves the drawbacks such as increased defect density and deterioration of surface morphology, which are problems in heteroepitaxial growth, and forms a silicon single-crystal thin film. To provide a method for manufacturing a semiconductor substrate having a silicon single crystal film having excellent crystallinity at a higher temperature and without contamination due to 1.12 autodoping as in the case of a sapphire substrate during vapor phase growth. The purpose is
(ニ)問題を解決するための手段
この発明の半導体用基板の製造方法は、シリコン単結晶
基板の全面に酸化物単結晶薄膜を形成する工程と、次に
高温酸化によってシリコン単結晶基板と酸化物結晶薄膜
との界面に熱酸化膜を形成する工程と、酸化物単結晶薄
膜上に気相成長法によりシリコン薄膜を形成する工程と
、シリコン薄膜と酸化物単結晶薄膜界面近傍にイオンイ
ンプランテーション法によりシリコンをイオン注入して
シリコン薄膜と酸化物単結晶薄膜の界面にアモルファス
シリコン層を形成する工程と、その後高温の熱処理を行
って固相成長させる工程と、ざらにシリコン薄膜表面近
傍にシリコンをイオン注入してシリコン薄膜の表面にア
モルファスシリコン層を形成する工程と、その後高温の
熱処理を行なって固相成長させる工程とを含んでなる構
成である。(d) Means for solving the problem The method for manufacturing a semiconductor substrate of the present invention includes a step of forming an oxide single crystal thin film on the entire surface of a silicon single crystal substrate, and then oxidizing the silicon single crystal substrate by high temperature oxidation. A process of forming a thermal oxide film at the interface with the oxide single crystal thin film, a process of forming a silicon thin film on the oxide single crystal thin film by vapor phase growth, and an ion implantation process near the interface between the silicon thin film and the oxide single crystal thin film. The first step is to form an amorphous silicon layer at the interface between the silicon thin film and the oxide single-crystal thin film by ion-implanting silicon using a method, and then to perform solid-phase growth by performing high-temperature heat treatment. The structure includes a step of ion-implanting to form an amorphous silicon layer on the surface of a silicon thin film, and then a step of performing solid phase growth by performing high-temperature heat treatment.
この発明に用いるシリコン単結晶基板としては、(10
0)や(111)方位を有するものが使用される。The silicon single crystal substrate used in this invention is (10
0) or (111) orientation is used.
これらのシリコン単結晶基板上に形成する酸化物単結晶
薄膜としては、シリコン単結晶基板と同方位を有するス
ピネル単結晶薄膜や安定化ジルコニア単結晶1膜が使用
され、その膜厚は300人〜1μm程度が好ましい。As the oxide single crystal thin film formed on these silicon single crystal substrates, a spinel single crystal thin film or a stabilized zirconia single crystal thin film having the same orientation as the silicon single crystal substrate is used, and the film thickness is 300 ~ The thickness is preferably about 1 μm.
上記、酸化物単結晶薄膜は必要に応じて、たとえば10
00℃〜1150℃の温度で水素(H2)ガスや0.1
〜1.0%の塩酸(HCI )を含む水素ガス中で、た
とえば50人〜1000人のガスエツチングを行なって
表面を清浄化することが好ましい。The above-mentioned oxide single crystal thin film may be made of, for example, 10
Hydrogen (H2) gas and 0.1
It is preferable to clean the surface by gas etching, for example 50 to 1000 people, in hydrogen gas containing ~1.0% hydrochloric acid (HCI).
上記酸化物単結晶薄膜上に気相成長法により形成するシ
リコン単結晶薄膜の膜厚は、0.02〜1.0μm程度
が好ましく、気相成長法において、たとえば原料ガスと
してSt H4、Si H2C12、Si HCI s
、Si Cl 4などのシラン系のガスを、0.05
容量%〜5容旦%の割合で水素ガス中に含ませたものを
用い、900℃〜1150℃の温度で成長速度0.1〜
3.0.czm /minで形成する。上記シリコン単
結晶薄膜上には、必要に応じてパイロ酸化や塩酸酸化、
あるいは乾燥酸素により、たとえば800℃〜1000
℃の温度で膜厚200人〜2000人の熱酸化膜を形成
することが好ましい。The thickness of the silicon single crystal thin film formed on the oxide single crystal thin film by vapor phase epitaxy is preferably about 0.02 to 1.0 μm. , Si HCI s
, 0.05 silane-based gas such as Si Cl 4
The growth rate is 0.1 to 0.1 at a temperature of 900 to 1150 °C, using hydrogen contained in hydrogen gas at a ratio of 5% to 5% by volume.
3.0. czm/min. If necessary, pyrooxidation, hydrochloric acid oxidation,
Or with dry oxygen, for example 800℃~1000℃
It is preferable to form a thermal oxide film with a thickness of 200 to 2000 at a temperature of .degree.
シリコン1illlと酸化物単結晶の界面にアモルファ
スシリコン層を形成するためのイオン注入条件は、シリ
コン薄膜などの膜厚によっても異なるが、たとえば注入
エネルギー20Ke■〜400KeV、注入量1X10
CIll−2〜5×10cm′程度で行ない、シリコン
薄膜と酸化物単結晶薄膜の界面近傍にアモルファスシリ
コン層を350人〜4500人程度の層厚に形成するの
が好ましい。The ion implantation conditions for forming an amorphous silicon layer at the interface between silicon 1ill and oxide single crystal vary depending on the thickness of the silicon thin film, but for example, implantation energy is 20KeV to 400KeV, implantation amount is 1X10
It is preferable to form an amorphous silicon layer in the vicinity of the interface between the silicon thin film and the oxide single crystal thin film to a layer thickness of about 350 to 4,500 layers by forming the amorphous silicon layer in the vicinity of the interface between the silicon thin film and the oxide single crystal thin film.
高温の熱処理を行なって固相成長させる場合、たとえば
水素又は窒素雰囲気中で、500℃〜1150℃程度の
温度で30分から12時間の範囲で行なうのが好ましい
。When performing solid phase growth by performing high temperature heat treatment, it is preferable to perform the solid phase growth at a temperature of about 500° C. to 1150° C. for 30 minutes to 12 hours, for example, in a hydrogen or nitrogen atmosphere.
シリコン薄膜表面にアモルファスシリコン層を形成する
場合のイオン注入条件は、たとえば注入エネルギー20
Kev〜80KeV1注入1xlO”cr’ 〜6x
10” cm’程度で行ナウノカ好マシク、またシリコ
ン薄膜の表面にアモルファスシリコン層を350人〜1
200人程度の層厚に形成する。The ion implantation conditions for forming an amorphous silicon layer on the surface of a silicon thin film are, for example, implantation energy of 20
Kev~80KeV1 injection 1xlO"cr'~6x
The thickness of the amorphous silicon layer is approximately 10" cm, and the amorphous silicon layer is formed on the surface of the silicon thin film.
The number of participants will be approximately 200 people.
(ホ)作 用
上記したこの発明に係る半導体用基板の製造方法におい
ては、シリコン単結晶基板上に形成されたスピネル単結
晶薄膜または安定化ジルコニア単結晶薄膜などの酸化物
単結晶薄膜を高温酸化する。(e) Effect In the method for manufacturing a semiconductor substrate according to the present invention described above, an oxide single crystal thin film such as a spinel single crystal thin film or a stabilized zirconia single crystal thin film formed on a silicon single crystal substrate is oxidized at high temperature. do.
シリコン単結晶基板と酸化物単結晶薄膜の界面に、S!
02を形成した半導体用基板上に気相成長法により形成
した第一層目のシリコン単結晶薄膜を、イオン注入法に
よりアモルファス化した後、aKWで固相成長を行うプ
ロセスを2度行なう、いわゆるダブル固相成長を行なう
。At the interface between the silicon single crystal substrate and the oxide single crystal thin film, S!
The first layer silicon single crystal thin film formed by vapor phase growth on the semiconductor substrate on which 02 was formed is made amorphous by ion implantation, and then the process of solid phase growth using aKW is performed twice. Perform double solid phase growth.
この方法によれば、第一層目の簿い、たとえば0.02
〜1.0μm厚のシリコン単結晶簿膜及びこのシリコン
単結晶N!!上に形成したシリコン単結晶薄膜の欠陥密
度は、5個/ cn+2内に低減し表面モホルジーも改
善されるので同一基板内にバイポーラトランジスタ、M
OSトランジスタなどの能動素子の作成が容易に可能に
なる。According to this method, the book value of the first layer, for example, 0.02
~1.0 μm thick silicon single crystal film and this silicon single crystal N! ! The defect density of the silicon single crystal thin film formed on the top is reduced to within 5/cn+2, and the surface morphology is also improved, so bipolar transistors and M
It becomes possible to easily create active elements such as OS transistors.
(へ)実施例
以下この発明の実施例を図面にて説明するが、この発明
は以下の実施例に限定されるものではない。(f) Examples Examples of the present invention will be described below with reference to the drawings, but the invention is not limited to the following examples.
実施例1
第1図は、この発明の半導体用基板の製造方法の実施例
を説明するための製造工程図である。Example 1 FIG. 1 is a manufacturing process diagram for explaining an example of the method for manufacturing a semiconductor substrate of the present invention.
まず、第1図の(ωに示すように、(100)面を有す
るシリコン単結晶基板1上に、(100)面を有するス
ピネル単結晶薄膜や、(100)面を有する安定化ジル
コニア単結晶薄膜のような酸化物単結晶薄膜2を、膜厚
4500人に形成する。次に、1100℃の酸素の雰囲
気でこの基板を酸化して、第1図の(b)に示すように
、シリコン単結晶基板1と、酸化物単結晶簿膜2との界
面に熱酸化膜(Si 02 )3を形成する。次にエピ
タキシャルチャンバー内で、酸化物単結晶lI2を、1
100℃の温度で、水素ガスや0.3%の塩酸を含む水
素ガス中で、200人をガスエツチングをして表面を清
浄化する。その後、シラン(Sf H4)ガスを0.2
容量%の割合で水素ガス中に含ませて、1000℃の温
度でシランガスを熱分解させ、第1図の(C)に示すよ
うに、酸化物単結晶簿膜2上に成長速度0.2μb
膜厚に形成する。First, as shown in (ω) in FIG. 1, a spinel single crystal thin film having a (100) plane and a stabilized zirconia single crystal having a (100) plane are deposited on a silicon single crystal substrate 1 having a (100) plane. An oxide single-crystal thin film 2 like a thin film is formed to a thickness of 4500 nm.Next, this substrate is oxidized in an oxygen atmosphere at 1100°C, and as shown in FIG. A thermal oxide film (Si 02 ) 3 is formed at the interface between the single crystal substrate 1 and the oxide single crystal film 2. Next, in the epitaxial chamber, the oxide single crystal lI2 is
The surfaces of 200 people were cleaned by gas etching in hydrogen gas and hydrogen gas containing 0.3% hydrochloric acid at a temperature of 100°C. Then, add 0.2 silane (Sf H4) gas
The silane gas is contained in hydrogen gas at a ratio of % by volume and thermally decomposed at a temperature of 1000°C, and as shown in FIG. Form to a thick film.
次に第1図の(d)に示すように、シリコン単結晶簿膜
5にシリコンのイオン注入を行ない、酸化物単結晶薄膜
2とシリコン単結晶薄膜5との界面近傍にアモルファス
シリコン層7を形成する。注入条件は注入エネルギー3
00KeV、注入口5×1Q r”; c m−2で行
なって、酸化物単結晶薄膜2とシリコン単結晶簿膜5の
界面近傍にアモルファスシリコン層7を3000人の範
囲に形成する。次に、第1図の+e)に示すように、水
素又は窒素雰囲気で、シリコン単結晶薄膜5とアモルフ
ァスシリコン層7の界面の単結晶シリコンを種結晶とし
て、1000℃の温度で1時間の条件で固相成長を行な
い、アモルファスシリコン層7を良質な低欠陥密度のシ
リコン単結晶薄膜51に改質させる。すなわち、高温の
熱処理を行なって固相成長を行なうことにより、シリコ
ン単結晶源y15と酸化物単結晶簿膜2との界面で格子
の不整合を矯正しながら、又、結晶性の優れたシリコン
単結晶tilll!5の表面のシリコンを種結晶として
固相成長することになり、その結果、界面結晶構造及び
結晶性の良好なシリコン単結品薄Wi、51が形成され
る。Next, as shown in FIG. 1(d), silicon ions are implanted into the silicon single crystal thin film 5 to form an amorphous silicon layer 7 near the interface between the oxide single crystal thin film 2 and the silicon single crystal thin film 5. Form. The injection condition is injection energy 3.
An amorphous silicon layer 7 is formed in the vicinity of the interface between the oxide single crystal thin film 2 and the silicon single crystal thin film 5 in an area of 3000 m by using an injection port of 00 KeV and an injection port of 5 x 1 Q r''; cm -2. , as shown in +e) of Figure 1, in a hydrogen or nitrogen atmosphere, the single crystal silicon at the interface between the silicon single crystal thin film 5 and the amorphous silicon layer 7 is used as a seed crystal and solidified at a temperature of 1000°C for 1 hour. Phase growth is performed to modify the amorphous silicon layer 7 into a silicon single crystal thin film 51 of high quality and low defect density.That is, by performing solid phase growth by performing high temperature heat treatment, the silicon single crystal source y15 and the oxide are While correcting the lattice mismatch at the interface with the single-crystal film 2, solid-phase growth is performed using the silicon on the surface of the silicon single crystal till!5, which has excellent crystallinity, as a seed crystal. A silicon single-crystalline thin film Wi, 51 with good interfacial crystal structure and crystallinity is formed.
次に、第1図の+f+に示すように、シリコン単結晶簿
膜51にシリコンのイオン注入を行ない、シリコン単結
晶薄膜51の表面近傍にアモルファスシリコン層8を形
成する。シリコンのイオン注入を注入エネルギー40K
eV、u入fjk 2x 1016cr’の条件で行な
う。その結果、シリコン単結晶薄暎51の表面にアモル
ファスシリコン層8を層厚500Aの領域に形成する。Next, as shown at +f+ in FIG. 1, silicon ions are implanted into the silicon single crystal thin film 51 to form an amorphous silicon layer 8 near the surface of the silicon single crystal thin film 51. Silicon ion implantation with implantation energy of 40K
The test is carried out under the conditions of eV, u input fjk 2x 1016 cr'. As a result, an amorphous silicon layer 8 is formed on the surface of the silicon single crystal thin layer 51 in a region having a layer thickness of 500 Å.
次にN1図の(9)に示すように、800℃の水素また
は窒素雰囲気で1時間保持し、1回目の固相成長により
改質されたアモルファスシリコン層8と接する部分のシ
リコン単結晶薄膜51を種結晶として、表面方向にシリ
コン単結晶が成長することにより、結晶性の優れた界面
の結晶構造の良好な膜厚0.7μ曙のシリコン単結晶薄
膜52が形成され、半導体用基板として提供される。Next, as shown in (9) in the N1 diagram, the silicon single crystal thin film 51 is kept in a hydrogen or nitrogen atmosphere at 800° C. for 1 hour, and the portion in contact with the amorphous silicon layer 8 modified by the first solid phase growth is grown. A silicon single crystal thin film 52 with a thickness of 0.7 μm and a good crystal structure at an interface with excellent crystallinity is formed by growing a silicon single crystal in the surface direction using as a seed crystal, and is provided as a semiconductor substrate. be done.
ざらに膜厚0.7μm以上の半導体用基板を提供する場
合には、このシリコン単結晶薄膜52上をN2またはN
2 +HC1でガスエツチングした後、aij!(たと
えば900〜1150℃)で気相成長法により、第1図
のfh)に示すように、所定の膜厚(たとえば0.5〜
20μl)のシリコン単結晶薄膜を、シリコン単結晶簿
膜52を種結晶とするホモエピタキシャル成長法によっ
て形成すると、絶縁基板上に結晶性の良い低欠陥密度(
たとえば5個/cm”)で表面モホロジーの良いシリコ
ン単結晶膜6を有する半導体用基板を提供することがで
きる。When providing a semiconductor substrate with a film thickness of approximately 0.7 μm or more, the silicon single crystal thin film 52 is coated with N2 or N2.
After gas etching with 2 +HC1, aij! (for example, 900 to 1150°C) by vapor phase growth to a predetermined film thickness (for example, 0.5 to
When a silicon single crystal thin film of 20 μl) is formed by homoepitaxial growth using the silicon single crystal film 52 as a seed crystal, a low defect density (
For example, it is possible to provide a semiconductor substrate having a silicon single crystal film 6 with good surface morphology at 5 pieces/cm'').
!1」Lと
第2図の(ω乃至fh)はそれぞれこの発明の半導体用
基板の製造方法の他の実施例を説明するための製造工程
図であり、第1図の(ω乃至(tuと異なる点は、第2
図の(C)に示すようにシリコン単結晶薄膜5上に、8
50℃の温度でスチーム(N20)雰囲気で熱酸化膜4
を1000人の膜厚に形成し、以後のイオン注入の工程
をこの熱酸化膜4を介して行なう。第2図の(小及び(
t)に示すように、熱酸化膜4をシリコン単結晶薄膜5
上に形成してイオン注入することにより、シリコンイオ
ンのシリコン基板中でのチャンネリングを防止すること
ができ、またフンバーミネーションによる汚染も防止で
きるので、製造上ウェハー間のバラツキ(アモルファス
領域の幅)を小さくすることができる。またシリコン薄
膜のより表面近くにアモルファスシリコン層を形成する
ことができ、たとえば第1図の(hに対応して形成した
場合、アモルファスシリコン層8を350人の領域に形
成することができ、その後の高温の熱処理による固相成
長することによって、シリコン表面の結晶性を高め、2
段にシリコンをエピタキシャル成長させる場合に有利で
ある。! 1''L and (ω to fh) in FIG. The difference is the second
As shown in (C) of the figure, on the silicon single crystal thin film 5, 8
Thermal oxide film 4 in a steam (N20) atmosphere at a temperature of 50°C
is formed to a thickness of 1000 nm, and the subsequent ion implantation process is performed through this thermal oxide film 4. (small and (
t), the thermal oxide film 4 is replaced with a silicon single crystal thin film 5.
By forming and implanting ions on the silicon substrate, it is possible to prevent silicon ions from channeling in the silicon substrate, and also to prevent contamination due to fecal permeation. ) can be made smaller. Furthermore, it is possible to form an amorphous silicon layer closer to the surface of the silicon thin film. For example, if the amorphous silicon layer 8 is formed in accordance with (h) in FIG. The crystallinity of the silicon surface is increased by solid-phase growth through high-temperature heat treatment.
This is advantageous when epitaxially growing silicon in stages.
上記したこの発明の実m例によれば非常に結晶性のよい
シリコン単結晶薄膜6が得られ熱による塑性変形のない
内部応力フリーの半導体用基板の作成が可能となる。According to the above-described practical example of the present invention, a silicon single crystal thin film 6 with very good crystallinity can be obtained, making it possible to produce a semiconductor substrate free of internal stress and free from plastic deformation due to heat.
(ト)発明の効果
以上のようにこの発明によれば、従来困難を極めたシリ
コン単結晶基板上に形成したスピネル単結晶siや安定
化ジルコニア単結晶薄膜のような酸化物単結晶薄膜上に
形成されるシリコン単結晶薄膜の結晶性が改善され、そ
の結果、低欠陥密度を実現することができ、また表面モ
ホロジーについて著しい改善をすることができる。また
シリコン単結晶薄膜内に形成する各アモルファスシリコ
ン領域は、イオン注入で形成するため、基板面内、基板
間でのバラツキが少なく、大面積化も容易であり、この
発明により半導体用基板を容易に製造することができる
。(G) Effects of the Invention As described above, according to the present invention, it is possible to form an oxide single crystal thin film such as a spinel single crystal Si or a stabilized zirconia single crystal thin film formed on a silicon single crystal substrate, which has been extremely difficult in the past. The crystallinity of the formed silicon single crystal thin film is improved, and as a result, a low defect density can be achieved, and the surface morphology can be significantly improved. In addition, since each amorphous silicon region formed within a silicon single crystal thin film is formed by ion implantation, there is little variation within the substrate plane and between substrates, and it is easy to increase the area. can be manufactured.
第1図は、この発明の一実施例の製作工程を順次示す半
導体用基板の模式断面図であり、N2図は、この発明の
他の実施例の製作工程を順次示す半導体用基板の模式断
面図である。
1・・・・・・シリコン単結晶基板、
2・・・・・・酸化物単結晶膜、
3.4・・・・・・熱酸化膜(StO2)、5.6・・
・・・・シリコン単結晶薄膜、7.8・・・・・・アモ
ルファスシリコン領域、51.52・・・・・・改質さ
れたシリコン単結晶薄膜。
第1図
第2図FIG. 1 is a schematic cross-sectional view of a semiconductor substrate sequentially showing the manufacturing process of one embodiment of the present invention, and FIG. N2 is a schematic cross-sectional view of a semiconductor substrate sequentially showing the manufacturing process of another embodiment of the present invention. It is a diagram. 1... Silicon single crystal substrate, 2... Oxide single crystal film, 3.4... Thermal oxide film (StO2), 5.6...
... Silicon single crystal thin film, 7.8 ... Amorphous silicon region, 51.52 ... Modified silicon single crystal thin film. Figure 1 Figure 2
Claims (1)
成する工程と、次に高温酸化によってシリコン単結晶基
板と酸化物結晶薄膜との界面に熱酸化膜を形成する工程
と、酸化物単結晶薄膜上に気相成長法によりシリコン薄
膜を形成する工程と、シリコン薄膜と酸化物単結晶薄膜
界面近傍にイオンインプランテーシヨン法によりシリコ
ンをイオン注入してシリコン薄膜と酸化物単結晶薄膜の
界面にアモルファスシリコン層を形成する工程と、その
後高温の熱処理を行つて固相成長させる工程と、さらに
シリコン薄膜表面近傍にシリコンをイオン注入してシリ
コン薄膜の表面にアモルファスシリコン層を形成する工
程と、その後高温の熱処理を行なって固相成長させる工
程とを含んでなることを特徴とする半導体用基板の製造
方法。1. A step of forming an oxide single crystal thin film on the entire surface of a silicon single crystal substrate, a step of forming a thermal oxide film at the interface between the silicon single crystal substrate and the oxide crystal thin film by high temperature oxidation, and A process of forming a silicon thin film on a crystalline thin film by a vapor phase growth method, and a step of implanting silicon ions near the interface between the silicon thin film and an oxide single crystal thin film by an ion implantation method to form a silicon thin film and an oxide single crystal thin film. A step of forming an amorphous silicon layer at the interface, a step of performing solid phase growth by performing high-temperature heat treatment after that, and a step of implanting silicon ions near the surface of the silicon thin film to form an amorphous silicon layer on the surface of the silicon thin film. A method for manufacturing a semiconductor substrate, comprising the steps of: , and then performing a high-temperature heat treatment to cause solid phase growth.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28494686A JPS63137412A (en) | 1986-11-29 | 1986-11-29 | Manufacture of semiconductor substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28494686A JPS63137412A (en) | 1986-11-29 | 1986-11-29 | Manufacture of semiconductor substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63137412A true JPS63137412A (en) | 1988-06-09 |
Family
ID=17685114
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28494686A Pending JPS63137412A (en) | 1986-11-29 | 1986-11-29 | Manufacture of semiconductor substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63137412A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5290712A (en) * | 1989-03-31 | 1994-03-01 | Canon Kabushiki Kaisha | Process for forming crystalline semiconductor film |
US6383899B1 (en) * | 1996-04-05 | 2002-05-07 | Sharp Laboratories Of America, Inc. | Method of forming polycrystalline semiconductor film from amorphous deposit by modulating crystallization with a combination of pre-annealing and ion implantation |
JP2006191028A (en) * | 2005-01-07 | 2006-07-20 | Internatl Business Mach Corp <Ibm> | METHOD OF MANUFACTURING REORIENTED Si OF LOW DEFECT DENSITY |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5645047A (en) * | 1979-09-20 | 1981-04-24 | Toshiba Corp | Manufacture of semiconductor monocrystal film |
JPS59110112A (en) * | 1982-12-16 | 1984-06-26 | Nec Corp | Manufacture of semiconductor base material |
JPS59181609A (en) * | 1983-03-31 | 1984-10-16 | Toshiba Corp | Manufacture of semiconductor device |
JPS61166043A (en) * | 1985-01-17 | 1986-07-26 | Sharp Corp | Insulative substrate for semiconductor |
-
1986
- 1986-11-29 JP JP28494686A patent/JPS63137412A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5645047A (en) * | 1979-09-20 | 1981-04-24 | Toshiba Corp | Manufacture of semiconductor monocrystal film |
JPS59110112A (en) * | 1982-12-16 | 1984-06-26 | Nec Corp | Manufacture of semiconductor base material |
JPS59181609A (en) * | 1983-03-31 | 1984-10-16 | Toshiba Corp | Manufacture of semiconductor device |
JPS61166043A (en) * | 1985-01-17 | 1986-07-26 | Sharp Corp | Insulative substrate for semiconductor |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5290712A (en) * | 1989-03-31 | 1994-03-01 | Canon Kabushiki Kaisha | Process for forming crystalline semiconductor film |
US6383899B1 (en) * | 1996-04-05 | 2002-05-07 | Sharp Laboratories Of America, Inc. | Method of forming polycrystalline semiconductor film from amorphous deposit by modulating crystallization with a combination of pre-annealing and ion implantation |
JP2006191028A (en) * | 2005-01-07 | 2006-07-20 | Internatl Business Mach Corp <Ibm> | METHOD OF MANUFACTURING REORIENTED Si OF LOW DEFECT DENSITY |
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