JPS62263627A - Manufacture of substrate for semiconductor - Google Patents

Manufacture of substrate for semiconductor

Info

Publication number
JPS62263627A
JPS62263627A JP10692086A JP10692086A JPS62263627A JP S62263627 A JPS62263627 A JP S62263627A JP 10692086 A JP10692086 A JP 10692086A JP 10692086 A JP10692086 A JP 10692086A JP S62263627 A JPS62263627 A JP S62263627A
Authority
JP
Japan
Prior art keywords
single crystal
thin film
silicon
crystal thin
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10692086A
Other languages
Japanese (ja)
Inventor
Shuji Enomoto
修治 榎本
Fumihiro Atsunushi
厚主 文弘
Tsukasa Doi
土居 司
Toshiyuki Shinozaki
敏幸 篠崎
Yoshinobu Kakihara
柿原 良亘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP10692086A priority Critical patent/JPS62263627A/en
Publication of JPS62263627A publication Critical patent/JPS62263627A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To realize low defect density by improving the crystallizability of an silicon single crystal thin-film formed onto an oxide single crystal thin-film such as a spinel single crystal thin-film and a stabilized zirconium single crystal thin-film shaped onto a sapphire single crystal substrate which has been difficult to be manufactured extremely. CONSTITUTION:An oxide single crystal thin-film 2 is formed onto a sapphire (alpha-Al2O3) single crystal substrate 1, an silicon single crystal thin-film 3 is shaped onto the thin-film 2, and an amorphous silicon layer 4 is formed near the interface of the oxide single crystal thin-film 2 and the silicon single crystal thin-film 3. Solid growth is conducted, using single crystal silicon on the interface of the silicon single crystal thin-film 3 and the amorphous silicon layer 4 as a seed crystal in a hydrogen or nitrogen atmosphere, the amorphous silicon layer 4 is improved into an excellent silicon single crystal thin-film 31 having low defect density, and an amorphous silicon layer 5 is shaped. An silicon single crystal is grown in the surface direction, employing the silicon single crystal thin-film 31 in a section being in contact with the amorphous silicon layer 5 as a seed crystal, thus forming an silicon single crystal thin-film 32.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明はS O1(silicon on 1nsul
ator )型基板構造を有し、例えば高速、高集積化
したバイゼーラトランジスタとλイ○Sトランジスタの
混成回路を形成することが出来る低欠陥密度な半導体用
基板の製造方法に関すBものである。
[Detailed description of the invention] <Industrial application field> The present invention is directed to SO1 (silicon on 1 nsul)
This article B relates to a method for manufacturing a semiconductor substrate with a low defect density that has a ator) type substrate structure and can form, for example, a high-speed, highly integrated hybrid circuit of a Vizera transistor and a λi○S transistor. .

〈従来の技術〉 従来より、サファイヤ基板は、たとえばsos技術にお
いて、シリコン基板の代りに半導体用絶縁基板として用
いられている。sos技術は、サファイヤ基板の上にシ
リコン薄膜をエピタキシャル成長させてMOSデバイス
等を構成し、従来問題となっていた配線容量と素子間分
離を解決し、MOSデバイス等の高速化を図る様にした
ものである。更に、SO8技術の欠点を克服するために
サファイヤ基板全面に、スピネル単結晶薄膜や、Y、 
Ca、 Mg、 Sc  などを添加した安定化ジルコ
ニア薄膜を被覆してなる新しい半導体用絶縁基板も提案
されている。
<Prior Art> Conventionally, sapphire substrates have been used as insulating substrates for semiconductors in place of silicon substrates, for example in SOS technology. SOS technology constructs MOS devices by epitaxially growing a silicon thin film on a sapphire substrate, solving the conventional problems of wiring capacitance and isolation between elements, and increasing the speed of MOS devices. It is. Furthermore, in order to overcome the drawbacks of SO8 technology, spinel single crystal thin films, Y,
A new semiconductor insulating substrate coated with a stabilized zirconia thin film doped with Ca, Mg, Sc, etc. has also been proposed.

サファイヤ単結晶基板上に気相成長法で形成されたシリ
コン単結晶薄膜は、表面モホルジーや結晶性が余り良く
なく、シかもAtのオートドープによる汚染も生じ易く
、欠陥密度は109〜1011(個/crn2)と多い
ためデバイス作成用の基板として広く利用できないのが
現状であった。
Silicon single-crystal thin films formed on sapphire single-crystal substrates by vapor phase growth have poor surface morphology and crystallinity, are easily contaminated by At autodoping, and have a defect density of 109 to 1011. /crn2), and therefore cannot be widely used as a substrate for device production.

この様な状況を鑑みて、す7フイヤ基板上にスピネル単
結晶薄膜や安定化ジルコニア薄膜を被覆してなる新しい
半導体用絶縁基板が提案され、半導体デバイスの特性に
影響を及ぼさない半導体用絶縁基板が実現されている。
In view of this situation, a new insulating substrate for semiconductors has been proposed, which is made by coating a spinel single crystal thin film or a stabilized zirconia thin film on a S7F substrate, and is an insulating substrate for semiconductors that does not affect the characteristics of semiconductor devices. has been realized.

〈発明が解決しようとする問題点〉 しかし、サファイヤ単結晶基板上に形成してなるスピネ
ル単結晶薄膜や安定化ジルコニア単結晶薄膜上に気相成
長法でシリコン単結晶薄膜をヘテロエピタキシャル成長
させた場合、格子の不整合や熱膨張係数などの違いによ
って結晶性の劣化江伴なう欠陥密度の増加、表面モホル
ジーの悪化等が生じる。
<Problems to be solved by the invention> However, when a silicon single crystal thin film is heteroepitaxially grown on a spinel single crystal thin film formed on a sapphire single crystal substrate or a stabilized zirconia single crystal thin film by a vapor phase growth method, However, due to lattice mismatch and differences in thermal expansion coefficients, crystallinity deteriorates, resulting in increased defect density and deterioration of surface morphology.

本発明は上記の点に鑑みて創案されたものであり、サフ
ァイヤ単結晶基版上例形成してなるスピネル単結晶薄膜
や安定化ジルコニア単結晶薄膜上に気相成長法でシリコ
ン単結晶薄膜を形成するヘテロエピタキシャル成長にお
いて、問題となる欠陥密度の増加及び表面モホルジーの
悪化等の欠点を改善すると共にシリコン単結晶薄膜を形
成する気相成長時に発生するサファイヤ基板よりシリコ
ン単結晶薄膜へのktのオートドープによる汚染を防止
した半導体用基板の製造方法を提供することを目的モし
て1ハる。
The present invention was devised in view of the above points, and is a method of forming a silicon single crystal thin film by vapor phase growth on a spinel single crystal thin film formed on a sapphire single crystal substrate or a stabilized zirconia single crystal thin film. In the heteroepitaxial growth process, problems such as an increase in defect density and deterioration of surface morphology are improved, and the auto-kt of the silicon single crystal thin film from the sapphire substrate, which occurs during vapor phase growth to form a silicon single crystal thin film, is improved. The object of this invention is to provide a method for manufacturing a semiconductor substrate that prevents contamination due to doping.

く問題を解決するための手段〉 上記の目的を達成するため、本発明の半導体用基板の製
造方法は、サファイヤ単結晶基叛の全面にスピネル単結
晶薄膜や安定化ジルコニア単結晶薄膜等の酸化物単結晶
薄膜を形成する工程と、この酸化物単結晶薄膜上に気相
成長法によってシリコン薄膜を形成する工程と、このシ
リコン薄膜と酸化物単結晶薄膜界面近傍にイオンインプ
ランテーション法により、シリコンをイオン注入して上
記のシリコン薄膜と酸化物2単結晶薄膜の界面にアモル
ファスシリコン層を形成する工程と、その後高温の熱処
理を行なって同相成長させる工程と、更に上記のシリコ
ン薄膜表面近傍にシリコンをイオン注入してシリコン薄
膜の表面にアモルファスシリコン層を形成する工程と、
その後高温の熱処理を行なって固相成長させる工程とを
含んでなるように構成している。
Means for Solving the Problems> In order to achieve the above object, the method for manufacturing a semiconductor substrate of the present invention includes forming an oxidized spinel single crystal thin film, a stabilized zirconia single crystal thin film, etc. on the entire surface of a sapphire single crystal substrate. A step of forming a silicon thin film on the oxide single crystal thin film by a vapor phase growth method, and a step of forming a silicon thin film near the interface between the silicon thin film and the oxide single crystal thin film by an ion implantation method. A step of ion-implanting to form an amorphous silicon layer at the interface between the silicon thin film and the oxide 2 single crystal thin film, followed by a step of high-temperature heat treatment to grow the same phase, and a step of forming an amorphous silicon layer near the surface of the silicon thin film. a step of ion-implanting to form an amorphous silicon layer on the surface of the silicon thin film;
After that, the structure includes a step of performing a high-temperature heat treatment to cause solid phase growth.

また、本発明の実施態様として、上記のシリコン薄膜の
表面部のアモルファスシリコン層を上記の高温の熱処理
を行なって固相成長させ之シリコン単結晶薄膜上に、更
に気相成長法によって所定の厚さのシリコン単結晶薄膜
を形成する工程とを含んでなるように構成している。
Further, as an embodiment of the present invention, the amorphous silicon layer on the surface of the silicon thin film is grown in a solid phase by performing the above-described high-temperature heat treatment, and is further grown to a predetermined thickness by vapor phase growth on the silicon single crystal thin film. The method is configured to include a step of forming a silicon single crystal thin film.

く作 用〉 上記した本発明に係る半導体用基板の製造方法において
は、す7フイヤ単結晶基飯上に形成されたスピネル単結
晶薄膜または安定化ジルコニア単結晶薄膜等の酸化物単
結晶薄膜はサファイヤ基版からのAtのオートドープを
防ぎ、第1層目のシリコン単結晶薄膜をイオン注入法て
よりアモルファス化した後、高温で固相成長を行なうプ
ロセスを2度行なう、いわゆるダブル固相成長を行なう
Effects> In the method for manufacturing a semiconductor substrate according to the present invention described above, an oxide single crystal thin film such as a spinel single crystal thin film or a stabilized zirconia single crystal thin film formed on a S7F single crystal substrate is After preventing At autodoping from the sapphire substrate and making the first silicon single-crystal thin film amorphous by ion implantation, the process of solid-phase growth at high temperatures is performed twice, so-called double solid-phase growth. Do this.

本方去てよれば、第1層目の薄い例えば0.02〜1.
0μm厚のシリコン単結晶薄膜及びこのシリコン単結晶
薄膜上に形成したシリコン単結晶薄膜の欠陥密度は 〜
5 (個/α2)に低減し表面モホルジーも改善される
ので同一基板内にバイゴーラトランジスタ、MoSトラ
ンジスタ等の能動素子の作成が容易に可能になる。
According to my opinion, the thickness of the first layer is, for example, 0.02~1.
The defect density of a silicon single crystal thin film with a thickness of 0 μm and a silicon single crystal thin film formed on this silicon single crystal thin film is ~
5 (pieces/α2) and the surface morphology is also improved, making it possible to easily create active elements such as bigolar transistors and MoS transistors within the same substrate.

〈発明の実施態様〉 本発明に用いるサファイヤ単結晶基板として、(+10
2)や(0001)方位を有するものが使用される。こ
のサファイヤ単結晶基板上に形成する酸化物単結晶薄膜
として、(III)面を有するスピネル単結晶薄膜や(
Ill)面を有する安定化ジルコニア単結晶薄膜が使用
され、その膜厚は+ooX〜3μm程度が好ましい。
<Embodiments of the invention> As a sapphire single crystal substrate used in the present invention, (+10
2) or (0001) orientation is used. As the oxide single crystal thin film formed on this sapphire single crystal substrate, spinel single crystal thin films having (III) planes and (
A stabilized zirconia single crystal thin film having an Ill) plane is used, and the film thickness is preferably about +ooX to 3 μm.

上記、酸化物単結晶薄膜は必要に応じて、例えば100
0°C−1+50°Cの温度で水素(H2)ガスや01
%〜1%の塩酸(HC2)  を含む水素ガス雰囲気を
行なって表面を清浄化することが好ましい。
The above-mentioned oxide single crystal thin film may be made of, for example, 100
Hydrogen (H2) gas or 01 at a temperature of 0°C-1 + 50°C
It is preferable to clean the surface using a hydrogen gas atmosphere containing 1% to 1% hydrochloric acid (HC2).

上記酸化物単結晶薄膜上に気相成長法により形成するシ
リコン単結晶薄膜の膜厚は0.02〜1.0μm程度が
好ましく、気相成長法において、例えば原料ガスとして
S iH41S + H2CZ 2 ) S iHCZ
 3+5ict4等のシラン系のガスを0.05vo1
%〜1.5vo1%の割合で水素ガス中て含ませたもの
を用い、900°C〜1200°Cの温度でシラン系ガ
スを熱分解させて成長速度0.05!Am/ min 
−3,0μm/minで形成するのが好ましい。
The thickness of the silicon single crystal thin film formed by vapor phase growth on the above-mentioned oxide single crystal thin film is preferably about 0.02 to 1.0 μm. S iHCZ
0.05vol of silane gas such as 3+5ict4
% to 1.5vo1% in hydrogen gas and thermally decompose the silane gas at a temperature of 900°C to 1200°C to achieve a growth rate of 0.05! Am/min
It is preferable to form at -3.0 μm/min.

上記シリコン単結晶薄膜上には、必要に応じてパイロ酸
化や塩酸酸化、あるいは乾燥酸素により例えば800°
C−1000“Cの温度で膜厚200〜200 OA 
 程度の熱酸化膜を形成することが好ましい。
If necessary, the silicon single crystal thin film may be heated to 800° by pyrooxidation, hydrochloric acid oxidation, or dry oxygen.
Film thickness 200~200 OA at temperature of C-1000"C
It is preferable to form a thermal oxide film of about

シリコン薄膜と酸化物単結晶薄膜の界面にアモルファス
シリコン層を形成するためのイオン注入条件は、シリコ
ン薄膜等の膜厚によっても異なるが、例えば注入エネル
ギー20 keV−400keV。
Ion implantation conditions for forming an amorphous silicon layer at the interface between a silicon thin film and an oxide single crystal thin film vary depending on the thickness of the silicon thin film, but for example, the implantation energy is 20 keV to 400 keV.

注入量5×1014crn−2〜5x10+am−2程
度で行なうのが好ましく、またシリコン薄膜と酸化物単
結晶薄膜の界面近傍にアモルファスシリコン層をましい
The implantation amount is preferably about 5.times.10@14 crn@-2 to 5.times.10@+ am@-2, and an amorphous silicon layer is preferably formed near the interface between the silicon thin film and the oxide single crystal thin film.

高温の熱処理を行なって固相成長させる場合、例えば水
素または窒素雰囲気中で500°C−1200°C程度
の温度でlO分〜12時間程度の範囲で行なうのが好ま
しい。
When solid-phase growth is performed by high-temperature heat treatment, it is preferably carried out at a temperature of about 500° C. to 1200° C. for a period of about 10 minutes to about 12 hours in a hydrogen or nitrogen atmosphere, for example.

シリコン薄膜表面icアモルファスシリコン層ヲ形成す
る場合、のイオン注入条件は、例えば注入エネルギー2
0 keV −200keV 、注入量5XI Q ”
on−2−5X I Q ” cm−2程度で行なうの
が好ましく、注入エネルギー20 keV −80ke
V 程度、注入量I X I O’5cm−2−5X 
10 ”Cfn−2程度が更に好ましく、またシリコン
薄膜の表面にアモルファスシリコン層を35OA−12
0OA程度の層厚に形成するのが好ましい。
When forming an IC amorphous silicon layer on the surface of a silicon thin film, the ion implantation conditions are, for example, implantation energy 2.
0 keV -200keV, implantation dose 5XI Q"
It is preferable to carry out the injection at about 2-5X IQ" cm-2, and the implantation energy is 20 keV -80 ke.
V degree, injection amount I X I O'5cm-2-5X
10"Cfn-2 is more preferable, and an amorphous silicon layer of 35OA-12 is formed on the surface of the silicon thin film.
It is preferable to form the layer to a thickness of about 0OA.

〈実施例〉 以下、添付の図面を用いて、本発明に係る半導体用基板
の製造方法の実施例を説明するが、本発明はこれら実施
例に限定されるものではない。
<Examples> Examples of the method for manufacturing a semiconductor substrate according to the present invention will be described below with reference to the accompanying drawings, but the present invention is not limited to these examples.

!著tユ 第1図(a)乃至(g)はそれぞれ本発明の半導体用基
板の製造方法の一実施例を説明するための製造工程図で
ある。
! 1(a) to 1(g) are manufacturing process diagrams for explaining one embodiment of the method for manufacturing a semiconductor substrate of the present invention.

まず、第1図(a) K示すように(+102)面を有
するサファイヤ(α−At203 )単結晶基板!上に
(Ill)面を有するスピネル単結晶薄膜や(Ill)
面を有する安定化ジルコニア単結晶薄膜のような酸化物
単結晶薄膜2tl−膜厚4500Aに形成する。
First, as shown in FIG. 1(a) K, a sapphire (α-At203) single crystal substrate with a (+102) plane! Spinel single crystal thin film with (Ill) plane on top or (Ill)
An oxide single-crystal thin film such as a stabilized zirconia single-crystal thin film having a surface is formed to a thickness of 2 tl-4500 Å.

次に酸化物単結晶薄膜2を1100°Cの温度で、水素
ガスや0.3%の塩酸を含む水素ガス雰囲気で50OA
をガスエツチングして表面を清浄化する。
Next, the oxide single crystal thin film 2 was deposited at a temperature of 1100°C in a hydrogen gas atmosphere containing hydrogen gas or 0.3% hydrochloric acid at 50 OA.
Clean the surface by gas etching.

その後、シラン(SiH4)ガスを0.2vo1% の
割合で水素ガス中に含ませて1000°Cの温度でシラ
ンガスを熱分解させ、第1図(b)に示すように酸化物
単結晶薄膜2上に成長速度0.2μm/minでシリコ
ン単結晶薄膜3を1,0μmの膜厚に形成する。
Thereafter, silane (SiH4) gas was included in the hydrogen gas at a ratio of 0.2 vol. 1%, and the silane gas was thermally decomposed at a temperature of 1000°C, resulting in an oxide single crystal thin film 2 as shown in FIG. A silicon single crystal thin film 3 is formed thereon to a thickness of 1.0 μm at a growth rate of 0.2 μm/min.

次に第1図(c)に示すようにシリコン単結晶薄膜3に
シリコンのイオン注入を行ない、酸化物単結晶薄膜2と
シリコン単結晶薄膜3との界面近傍にアモルファスシリ
コン層4を形成する。注入条件は注入エネルギー400
 keV、注入量5 X I Ol5crn−2で行な
って、酸化物単結晶薄膜2とシリコン単結晶薄膜3との
界面近傍にアモルファスシリコン層4を400OA  
の範囲に形成する。
Next, as shown in FIG. 1(c), silicon ions are implanted into the silicon single crystal thin film 3 to form an amorphous silicon layer 4 near the interface between the oxide single crystal thin film 2 and the silicon single crystal thin film 3. The injection conditions are injection energy 400
The amorphous silicon layer 4 was implanted at 400 OA near the interface between the oxide single crystal thin film 2 and the silicon single crystal thin film 3 by implantation at keV and implantation dose of 5 X I Ol5 crn-2.
Form within the range of .

次に、第1図(d)に示すように水素または窒素雰囲気
でシリコン単結晶薄膜3とアモルファスシリコン層4の
界面の単結晶シリコンを種結晶としてl000°Cの温
度で1時間の条件で固相成長を行ない、アモルファスシ
リコン層4を良質な低欠陥密度のシリコン単結晶薄膜3
1に改質させる。即ち、高温の熱処理を行なって固相成
長を行なうことにより、シリコン単結晶薄膜とスピネル
単結晶薄膜や安定化ジルコニア単結晶薄膜の界面で、格
子の不整合を矯正しながら、また結晶性の優れたシリコ
ン単結晶薄膜の表面のシリコンを種結晶として固相成長
されることになり、その結果、界面結晶構造及び結晶性
の良好なシリコン単結晶薄膜31が形成される。
Next, as shown in FIG. 1(d), the single crystal silicon at the interface between the silicon single crystal thin film 3 and the amorphous silicon layer 4 was used as a seed crystal in a hydrogen or nitrogen atmosphere and solidified at a temperature of 1000°C for 1 hour. Phase growth is performed to convert the amorphous silicon layer 4 into a high quality silicon single crystal thin film 3 with low defect density.
Modified to 1. In other words, by performing solid-phase growth through high-temperature heat treatment, the lattice mismatch can be corrected at the interface between a silicon single crystal thin film, a spinel single crystal thin film, or a stabilized zirconia single crystal thin film, while improving crystallinity. Solid phase growth is performed using the silicon on the surface of the silicon single crystal thin film as a seed crystal, and as a result, a silicon single crystal thin film 31 with good interfacial crystal structure and crystallinity is formed.

次に、第1図(e)に示すよってシリコン単結晶薄膜3
1にシリコンのイオン注入を行ない、シリコン単結晶薄
膜3Iの表面近傍にアモルファスシリコン層5を形成す
る。即ち、シリコンのイオン注入を注入エネルギー40
key、注入量2 X I O”crn−2の条件で行
なう。その結果、シリコン単結晶薄膜31の表面にアモ
ルファスシリコン層5を層厚500Aの領域に形成する
Next, as shown in FIG. 1(e), a silicon single crystal thin film 3
1, silicon ions are implanted to form an amorphous silicon layer 5 near the surface of the silicon single crystal thin film 3I. That is, silicon ion implantation was performed at an implantation energy of 40
key, the implantation amount is 2.times.I O"crn-2. As a result, an amorphous silicon layer 5 is formed on the surface of the silicon single crystal thin film 31 in a region having a layer thickness of 500 Å.

次に、第1図(f)に示すように、1000°Cの水素
または窒素雰囲気で1時間保持し、1回目の固相成長に
より改質されたアモルファスシリコン層5と接する部分
のシリコン単結晶薄膜31を種結晶として表面方向にシ
リコン単結晶が成長することにより、第1図(f)に示
すよって、結晶性の優れた界面の結晶構造の良好な膜厚
〜1μmのシリコン単結晶薄膜32が形成され、半導体
用基板として提供出来る。さらに膜厚1μm以上の半導
体用基板を提供する場合にはこのシリコン単結晶薄膜3
2上をH2またはH2+HC4でガスエツチング後高温
(例えば900〜!150°C)で気相成長法により第
1図(鱒に示すように、所定の膜厚(例えば1〜20μ
m)のシリコン単結晶薄膜をシリコン単結晶薄膜32を
種結晶とするホモエピタキシャル成長法によって形成す
ると、絶縁基板上てklのオートドープのない結晶性の
良い低欠陥密度(例えば〜5(ケ、/cm2 ) )で
表面モホルジーの良いシリコン単結晶薄膜6を有する半
導体用基板を提供することが出来る。
Next, as shown in FIG. 1(f), the silicon single crystal is kept in a hydrogen or nitrogen atmosphere at 1000°C for 1 hour to form a silicon single crystal in the portion in contact with the amorphous silicon layer 5 that has been modified by the first solid phase growth. By using the thin film 31 as a seed crystal to grow a silicon single crystal in the surface direction, as shown in FIG. is formed and can be provided as a semiconductor substrate. Furthermore, when providing a semiconductor substrate with a film thickness of 1 μm or more, this silicon single crystal thin film 3
2 is etched with H2 or H2 + HC4, and then deposited to a predetermined film thickness (for example, 1 to 20μ
When the silicon single-crystal thin film 32 is formed by homoepitaxial growth using the silicon single-crystal thin film 32 as a seed crystal, it can be formed on an insulating substrate with good crystallinity and low defect density (for example ~5(ke, / It is possible to provide a semiconductor substrate having a silicon single-crystal thin film 6 with a good surface morphology (cm2)).

1里ノ」 第2図(a)乃至(g)はそれぞれ本発明の半導体用基
板の製造方法の他の実施例を説明するための製造工程図
であり、第1図(a)乃至(鱒と異なる点は、第2図(
b)に示すようにシリコン単結晶薄膜3上に850°C
の温度でスチーム(H2O)雰囲気で熱酸化膜13を1
.000 Aの膜厚に形成し、以後のイオン注入の工程
をこの熱酸化!+3を介して行なうようにしたものであ
る。
Figures 2(a) to 2(g) are manufacturing process diagrams for explaining other embodiments of the method for manufacturing a semiconductor substrate of the present invention, respectively. The difference from Figure 2 (
As shown in b), the silicon single crystal thin film 3 is heated at 850°C.
The thermal oxide film 13 is formed in a steam (H2O) atmosphere at a temperature of
.. The film is formed to a thickness of 000 A, and the subsequent ion implantation process is performed using this thermal oxidation! This is done via +3.

第2図(c)及び(e)に示すよって熱酸化膜13をシ
リコン単結晶薄膜3上に形成してイオン注入することに
より、シリコンイオンのシリコン基板中でのチャネリン
グを防止することが出来、製造上ウェハ間のバラツキ(
アモルファス領域の幅)を小さくすることが出来る。ま
たシリコン薄膜のより表面近くにアモルファスシリコン
層を形成することが出来、例えば第1図(e)に対応し
て形成した場合アモルファスシリコン層5を35OAの
領域に形成することが出来、その後の高温の熱処理によ
る固相成長することによって、シリコン表面の結晶性を
高め、2段にシリコンをエピタキシャル成長させる場合
に有利である。
By forming a thermal oxide film 13 on the silicon single crystal thin film 3 and implanting ions as shown in FIGS. 2(c) and 2(e), channeling of silicon ions in the silicon substrate can be prevented. Variations between wafers due to manufacturing (
The width of the amorphous region can be reduced. In addition, it is possible to form an amorphous silicon layer closer to the surface of the silicon thin film. For example, when the amorphous silicon layer 5 is formed in accordance with FIG. The solid phase growth by heat treatment improves the crystallinity of the silicon surface, which is advantageous when epitaxially growing silicon in two stages.

上記した本発明の実施例によれば非常に結晶性の良いシ
リコン単結晶薄膜6が得られ熱による塑性変形のない半
導体用基板の作成が可能となる。
According to the embodiments of the present invention described above, a silicon single crystal thin film 6 with very good crystallinity can be obtained, making it possible to create a semiconductor substrate without plastic deformation due to heat.

〈発明の効果〉 以上のように本発明によれば、従来困難を極めたす7フ
イヤ単結晶基板上に形成したスピネル単結晶薄膜や安定
化ジルコニウム単結晶薄膜のような酸化物単結晶薄膜上
へ形成されるシリコン単結晶薄膜の結晶性が改善され、
その結果低欠陥密度を実現することが出来、また表面モ
ホルジーについて著しく改善することが出来る。
<Effects of the Invention> As described above, according to the present invention, it is possible to form an oxide single crystal thin film such as a spinel single crystal thin film or a stabilized zirconium single crystal thin film formed on a 7-fire single crystal substrate, which has been extremely difficult in the past. The crystallinity of the silicon single crystal thin film formed on is improved,
As a result, a low defect density can be achieved and the surface morphology can be significantly improved.

またシリコン単結晶薄膜内に形成する各アモルファスシ
リコン領域はイオン注入法で形成するため、基板面内、
基板間でのバラツキが少く、大面容易に:為造ジること
が出来る。
In addition, since each amorphous silicon region formed within a silicon single crystal thin film is formed by ion implantation,
There is little variation between boards, and large areas can be easily manufactured.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)乃至(―はそれぞれ本発明の一実施例の製
作工程を順次示す図式的な断面図であり、第2図(a)
乃至(g)triそれぞれ本発明の他の実施例の製作工
程を順次示す図式的な断面図である。 1・・・サファイヤ単結晶基板、2・・・酸化物単結晶
薄膜(スピネル薄膜または安定化ジルコニア薄膜)、3
・・・シリコン単結晶薄膜、4 、 s・・・アモルフ
ァスシリコン領域、32・・・改質されたシリコン単結
晶薄膜。 代理人 弁理士 杉 山 毅 至(他1名)第1図 (a) 第21 (g) 恐
Figures 1(a) to (-) are schematic cross-sectional views sequentially showing the manufacturing process of an embodiment of the present invention, and Figure 2(a)
7(g) to (g)tri are schematic cross-sectional views sequentially showing manufacturing steps of other embodiments of the present invention. 1... Sapphire single crystal substrate, 2... Oxide single crystal thin film (spinel thin film or stabilized zirconia thin film), 3
...Silicon single crystal thin film, 4, s...Amorphous silicon region, 32...Modified silicon single crystal thin film. Agent Patent Attorney Takeshi Sugiyama (and 1 other person) Figure 1 (a) Figure 21 (g)

Claims (1)

【特許請求の範囲】 1、サファイヤ単結晶基板の全面に酸化物単結晶薄膜を
形成する工程と、 該酸化物単結晶薄膜上に気相成長法によりシリコン薄膜
を形成する工程と、 該シリコン薄膜と酸化物単結晶薄膜界面近傍にイオンイ
ンプラティーション法によりシリコンをイオン注入して
シリコン薄膜と酸化物単結晶薄膜の界面にアモルファス
シリコン層を形成する工程と、 その後高温の熱処理を行なって固相成長させる工程と、 更に上記シリコン薄膜表面近傍にシリコンをイオン注入
してシリコン薄膜の表面にアモルファスシリコン層を形
成する工程と、 その後高温の熱処理を行なって固相成長させる工程と、 を含んでなることを特徴とする半導体用基板の製造方法
。 2、前記シリコン薄膜の表面部のアモルファスシリコン
層を前記高温の熱処理を行なって固相成長させたシリコ
ン単結晶薄膜上に、更に気相成長法によって所定の厚さ
のシリコン単結晶薄膜を形成してなることを特徴とする
特許請求の範囲第1項記載の半導体用基板の製造方法。 3、前記シリコンのイオン注入を前記シリコン薄膜上に
形成した熱酸化膜を介して行なうようになしたことを特
徴とする特許請求の範囲第1項記載の半導体用基板の製
造方法。
[Claims] 1. A step of forming an oxide single crystal thin film on the entire surface of a sapphire single crystal substrate, a step of forming a silicon thin film on the oxide single crystal thin film by vapor phase growth, and the silicon thin film. A process of implanting silicon ions near the interface between the silicon thin film and the oxide single crystal thin film using an ion implantation method to form an amorphous silicon layer at the interface between the silicon thin film and the oxide single crystal thin film, and then performing high-temperature heat treatment to form a solid phase. further comprising the steps of: ion-implanting silicon into the vicinity of the surface of the silicon thin film to form an amorphous silicon layer on the surface of the silicon thin film; and then performing high-temperature heat treatment to achieve solid phase growth. A method for manufacturing a semiconductor substrate, characterized in that: 2. Further forming a silicon single crystal thin film of a predetermined thickness by a vapor phase growth method on the silicon single crystal thin film in which the amorphous silicon layer on the surface portion of the silicon thin film is grown in solid phase by performing the high temperature heat treatment. A method of manufacturing a semiconductor substrate according to claim 1, characterized in that: 3. The method of manufacturing a semiconductor substrate according to claim 1, wherein the silicon ion implantation is performed through a thermal oxide film formed on the silicon thin film.
JP10692086A 1986-05-09 1986-05-09 Manufacture of substrate for semiconductor Pending JPS62263627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10692086A JPS62263627A (en) 1986-05-09 1986-05-09 Manufacture of substrate for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10692086A JPS62263627A (en) 1986-05-09 1986-05-09 Manufacture of substrate for semiconductor

Publications (1)

Publication Number Publication Date
JPS62263627A true JPS62263627A (en) 1987-11-16

Family

ID=14445858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10692086A Pending JPS62263627A (en) 1986-05-09 1986-05-09 Manufacture of substrate for semiconductor

Country Status (1)

Country Link
JP (1) JPS62263627A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5457058A (en) * 1989-10-09 1995-10-10 Canon Kabushiki Kaisha Crystal growth method
JP2014067869A (en) * 2012-09-26 2014-04-17 Nobuyuki Akiyama Manufacturing method of hetero-epitaxial single crystal, manufacturing method of heterojunction solar cell, hetero-epitaxial single crystal, and heterojunction solar cell

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5457058A (en) * 1989-10-09 1995-10-10 Canon Kabushiki Kaisha Crystal growth method
JP2014067869A (en) * 2012-09-26 2014-04-17 Nobuyuki Akiyama Manufacturing method of hetero-epitaxial single crystal, manufacturing method of heterojunction solar cell, hetero-epitaxial single crystal, and heterojunction solar cell

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