JPS63134548U - - Google Patents
Info
- Publication number
- JPS63134548U JPS63134548U JP1987024967U JP2496787U JPS63134548U JP S63134548 U JPS63134548 U JP S63134548U JP 1987024967 U JP1987024967 U JP 1987024967U JP 2496787 U JP2496787 U JP 2496787U JP S63134548 U JPS63134548 U JP S63134548U
- Authority
- JP
- Japan
- Prior art keywords
- resin
- package
- semiconductor device
- mounting part
- element mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 14
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の一実施例を示す樹脂封止型半
導体装置のアイランドの拡大平面図、第２図は従
来の樹脂封止型半導体装置の上面図、第３図は従
来の樹脂封止型半導体装置の側面図、第４図は従
来の樹脂封止型半導体装置の正面図、第５図は従
来の樹脂封止型半導体装置のアイランドの拡大平
面図、第６図は従来の樹脂封止型半導体装置の部
分拡大断面図、第７図は本考案の第２実施例を示
す樹脂封止型半導体装置のアイランドの拡大平面
図、第８図は本考案の効果の説明図である。
１１……パツケージ外形、１２……半導体素子
外形、１３……アイランド、１４……アイランド
の拡張部、１５……アンカーホール。
Fig. 1 is an enlarged plan view of an island of a resin-sealed semiconductor device showing an embodiment of the present invention, Fig. 2 is a top view of a conventional resin-sealed semiconductor device, and Fig. 3 is a conventional resin-sealed semiconductor device. 4 is a front view of a conventional resin-sealed semiconductor device, FIG. 5 is an enlarged plan view of an island of a conventional resin-sealed semiconductor device, and FIG. 6 is a conventional resin-sealed semiconductor device. FIG. 7 is an enlarged plan view of an island of a resin-sealed semiconductor device showing a second embodiment of the present invention, and FIG. 8 is a diagram illustrating the effects of the present invention. 11...Package outer shape, 12...Semiconductor element outer shape, 13...Island, 14...Island extension, 15...Anchor hole.
Claims (1)
着され、かつ、前記リードに接続され半導体素子
保護樹脂で表面が覆われた半導体素子と前記素子
搭載部、半導体素子及び前記リードの接続箇所を
樹脂封止するパツケージを備えた樹脂封止型半導
体装置において、 前記パツケージの素子搭載部のある部分よりパ
ツケージ外形部まで拡張部を設け、該拡張部はパ
ツケージ側面から露出し、かつ、その端部がリー
ドより内側に位置することを特徴とする樹脂封止
型半導体装置。 (2) 前記拡張部にアンカーホールを設けるよう
にしたことを特徴とする実用新案登録請求の範囲
第１項記載の樹脂封止型半導体装置。[Claims for Utility Model Registration] (1) A lead, an element mounting part, and a semiconductor element fixed on the element mounting part, connected to the lead, and whose surface is covered with a semiconductor element protection resin, and the element mounting part. , a resin-sealed semiconductor device comprising a package for resin-sealing a semiconductor element and a connection point of the lead, wherein an extension part is provided from a part of the package where the element mounting part is located to an outer part of the package, and the extension part is connected to the package. A resin-sealed semiconductor device characterized in that it is exposed from the side surface and its end portion is located inside the leads. (2) The resin-sealed semiconductor device according to claim 1, wherein an anchor hole is provided in the expanded portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987024967U JPS63134548U (en) | 1987-02-24 | 1987-02-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987024967U JPS63134548U (en) | 1987-02-24 | 1987-02-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63134548U true JPS63134548U (en) | 1988-09-02 |
Family
ID=30824680
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987024967U Pending JPS63134548U (en) | 1987-02-24 | 1987-02-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63134548U (en) |
-
1987
- 1987-02-24 JP JP1987024967U patent/JPS63134548U/ja active Pending