JPS63129614A - Vapor-phase growth process - Google Patents
Vapor-phase growth processInfo
- Publication number
- JPS63129614A JPS63129614A JP61276972A JP27697286A JPS63129614A JP S63129614 A JPS63129614 A JP S63129614A JP 61276972 A JP61276972 A JP 61276972A JP 27697286 A JP27697286 A JP 27697286A JP S63129614 A JPS63129614 A JP S63129614A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- growth
- substrate
- epitaxial layer
- reaction gas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001947 vapour-phase growth Methods 0.000 title claims abstract description 6
- 238000000034 method Methods 0.000 title claims description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 20
- 239000012495 reaction gas Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 7
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 7
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 claims abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 229910052681 coesite Inorganic materials 0.000 abstract description 11
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 11
- 229910052682 stishovite Inorganic materials 0.000 abstract description 11
- 229910052905 tridymite Inorganic materials 0.000 abstract description 11
- 239000007789 gas Substances 0.000 abstract description 8
- 229910007264 Si2H6 Inorganic materials 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 238000010438 heat treatment Methods 0.000 description 5
- 230000004913 activation Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- -1 argon ions Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概要〕
表面の一部に二酸化シリコン(Si02) Fitの形
成されたシリコン(Si)基板上にSiを成長するに際
して、
反応ガスに5S2H@を用い、成長圧力を30Torr
から300Torrまでの範囲内にすることにより、S
i表出部上に形成されるエピタキシャル層に繋がってS
i02層上に同時に形成される多結晶層の成長を安定化
させ、更にはエピタキシャル層をSi02層上へ拡大さ
せることを可能にさせたものである。Detailed Description of the Invention [Summary] When growing Si on a silicon (Si) substrate on which silicon dioxide (Si02) Fit is formed on a part of the surface, 5S2H@ is used as a reaction gas and the growth pressure is set to 30 Torr.
By setting the S to within the range of 300 Torr
S is connected to the epitaxial layer formed on the i exposed part.
This stabilizes the growth of the polycrystalline layer simultaneously formed on the i02 layer, and furthermore makes it possible to extend the epitaxial layer onto the Si02 layer.
本発明は、表面の一部にSi02層の形成されたStt
板上にSiを成長する際の気相成長方法に関す。The present invention provides a Sttt with a Si02 layer formed on a part of the surface.
This invention relates to a vapor phase growth method for growing Si on a plate.
半導体集積回路(IC)の製造においては、上記基板上
の全面にSiの成長を行うことを望まれることがしばし
ばある。In the manufacture of semiconductor integrated circuits (ICs), it is often desired to grow Si over the entire surface of the substrate.
それは第3図に示すとと(、S+基板lのSt表表出部
上上はエピタキシャルN4を、5iOzlif 31に
はエピタキシャル層4に繋がる多結晶層5を同時に成長
するもので、例えば、エピタキシャルN4をバイポーラ
トランジスタの真性ベース領域やMOSFETのチャネ
ル領域にし、5iOz層3を容量低減のための絶縁膜に
して、トランジスタの高速化を図る場合などに用いられ
る。As shown in FIG. 3, epitaxial N4 is grown on the exposed part of the S+ substrate l, and a polycrystalline layer 5 connected to the epitaxial layer 4 is grown on the 5iOzlif 31 at the same time. This is used in cases where the 5iOz layer 3 is used as an intrinsic base region of a bipolar transistor or a channel region of a MOSFET, and the 5iOz layer 3 is used as an insulating film for reducing capacitance, thereby increasing the speed of the transistor.
そしてこの成長は、単純に且つ安定に行い得て、然もエ
ピタキシャルM4が広くなるのが望ましい。It is desirable that this growth can be performed simply and stably, and that the epitaxial layer M4 can be widened.
第3図に示すようなエピタキシャル層4と多結晶M5の
同時成長の従来方法は、次の如くであった。The conventional method for simultaneously growing epitaxial layer 4 and polycrystalline M5 as shown in FIG. 3 was as follows.
即ち、成長に先立ち、アルゴンイオンにより表面を叩い
て5i02屓3の表面を活性化させ、しかる後、反応ガ
スにモノシラン(SiHs)を用いて常圧成長する方法
である。That is, prior to growth, the surface of 5i02 layer 3 is activated by hitting the surface with argon ions, and then monosilane (SiHs) is used as a reaction gas to grow at normal pressure.
Si02層3の表面活性化を行うのは、これがないと多
結晶層5が形成されないためである。The reason why the surface of the Si02 layer 3 is activated is that the polycrystalline layer 5 cannot be formed without it.
また、表面活性化を行わずに成長する方法として、Si
02層3上に窒化シリ:Iン(Si3 Ng )膜を被
着してから、反応ガスにSiH4を用いて常圧成長する
方法がある。In addition, as a method for growing without surface activation, Si
There is a method in which a silicon nitride:In (Si3 Ng) film is deposited on the 02 layer 3 and then grown at normal pressure using SiH4 as a reaction gas.
しかしながら、表面活性化を行う方法では、活性化の工
程が必要であり、且つ多結晶層4の形成が必ずしも安定
でない問題があり、Si3N4膜を被着する方法では、
その被着により工程が複雑になる問題がある。However, the method of surface activation requires an activation step and the formation of the polycrystalline layer 4 is not necessarily stable, and the method of depositing the Si3N4 film has the problem that
There is a problem that the process becomes complicated due to the adhesion.
然も両方法とも、エピタキシャルFt4の拡がりが、S
t表表出部上り小さくなっている。However, in both methods, the spread of epitaxial Ft4 is
The upper part of the t-table surface is smaller.
上記問題点は、表面の一部にSi02層の形成されたS
i基板上にStを成長するに際して、反応ガスにSi2
H8を用い、成長圧力を30Torrから300To
rrまでの範囲内にする本発明の気相成長方法によって
解決される。The above problem is caused by the S
When growing St on the i-substrate, Si2 is added to the reaction gas.
Using H8, the growth pressure was increased from 30 Torr to 300To
This can be solved by the vapor phase growth method of the present invention, which brings the temperature within the range up to rr.
反応ガスに5i2H@を用いた減圧気相成長方法は、先
に本発明者が特願昭61−001857号により開示し
た技術である。この技術は、主たる特徴が成長の低温化
にあり、成長条件により選択成長と全面成長の両方が可
能である。The reduced pressure vapor phase growth method using 5i2H@ as a reaction gas is a technique previously disclosed by the present inventor in Japanese Patent Application No. 61-001857. The main feature of this technology is low temperature growth, and both selective growth and full-scale growth are possible depending on the growth conditions.
そして上記の圧力範囲は、本発明者の多くの実験から得
られた知見である。The above pressure range is the knowledge obtained from many experiments by the inventor.
即ち、成長圧力を上記範囲内にすることにより、上記S
i基板のSi表出部上に形成されるエピタキシャル層に
繋がって上記Si02層上に同時に形成される多結晶層
の成長を、従来方法の場合に必要であった表面活性化な
しに安定化し、更には実施例で説明する如くエピタキシ
ャル層をSi02層上へ拡大させることが可能になる。That is, by keeping the growth pressure within the above range, the above S
The growth of a polycrystalline layer connected to the epitaxial layer formed on the Si exposed portion of the i-substrate and simultaneously formed on the Si02 layer is stabilized without surface activation required in the conventional method, Furthermore, as explained in the embodiment, it becomes possible to extend the epitaxial layer onto the Si02 layer.
このことは、エピタキシャル層と多結晶層との同時成長
を単純化させ、且つ例えば先に述べたトランジスタの高
速化を容易にさせる。This simplifies the simultaneous growth of epitaxial and polycrystalline layers and facilitates, for example, speeding up the transistors mentioned above.
以下、本発明方法の実施例について第1図および第2図
を用い説明する。Examples of the method of the present invention will be described below with reference to FIGS. 1 and 2.
第1図は実施例に用いる成長装置の構成図、第2図は実
施例による成長層を示す側面図である。FIG. 1 is a block diagram of a growth apparatus used in an example, and FIG. 2 is a side view showing a growth layer according to an example.
企図を通じ同一符号は同一対象物を示す。The same reference numerals refer to the same objects throughout the design.
第1図において、11は反応チャンバ、12は加熱ヒー
タ、13は加熱電源、14は排気口、15は反応ガス流
入口、H6は水素(H2)ガス供給口、17はSi2
H6ガス供給口、18および19は流量針、である。In FIG. 1, 11 is a reaction chamber, 12 is a heating heater, 13 is a heating power source, 14 is an exhaust port, 15 is a reaction gas inlet, H6 is a hydrogen (H2) gas supply port, and 17 is a Si2
H6 gas supply ports 18 and 19 are flow rate needles.
このような成長装置を用い成長圧力を170Torrに
して、第2図に示す如く、ロコス(LOGO3)法によ
り厚さ約0.5μmのSiO2i3が形成された面指数
(100)のSi基板1に対して、厚さ約0.5μ−の
エピタキシャル層4.を成長すると、Si02層3上に
は厚さ約0.5μ肩の多結晶層5が安定に形成され、然
もエピタキシャル層4はSi表表出部上り拡がり、その
拡がり寸法aは約0.4μmとなる。Using such a growth apparatus and setting the growth pressure to 170 Torr, as shown in FIG. an epitaxial layer 4. with a thickness of about 0.5μ. When grown, a polycrystalline layer 5 with a thickness of approximately 0.5 μm is stably formed on the SiO2 layer 3, and the epitaxial layer 4 expands upward at the exposed Si surface, and the expansion dimension a is approximately 0.5 μm. It becomes 4 μm.
この成長の際の他の条件は、Si基板1の加熱温度が約
940℃、5ill(、の流量が3 、0cc /分、
H2ガスの流量が10.Oji! /分、である。Other conditions during this growth are that the heating temperature of the Si substrate 1 is approximately 940°C, the flow rate of 5ill (, 3,0cc/min,
The flow rate of H2 gas is 10. Oji! /minute.
エピタキシャル層4がSt表表出部上り拡がることは、
先に述べた高速化トランジスタの形成において、エミッ
タ領域やゲート電極の形成における位置合わせに余裕を
与えることになり、逆に見るとSi表表出部上その分だ
け小さくすることが可能になり、高速化を容易にさせる
。The fact that the epitaxial layer 4 expands upward from the St surface area is as follows.
In the formation of the above-mentioned high-speed transistor, this provides a margin for positioning in the formation of the emitter region and gate electrode, and conversely, it makes it possible to reduce the Si surface area by that much. Facilitates speeding up.
上記の成長において、成長圧力をより高くすると拡がり
寸法aがより大きくなるが、300Torrを越えると
多結晶層5の成長が不安定になる。また成長圧力をより
低くすると拡がり寸法aがより小さくなり、30Tor
rを割るとやはり多結晶層5の成長が不安定になる。In the above growth, if the growth pressure is increased, the expansion dimension a becomes larger, but if it exceeds 300 Torr, the growth of the polycrystalline layer 5 becomes unstable. In addition, when the growth pressure is lowered, the expansion dimension a becomes smaller, and 30 Tor
When r is divided, the growth of the polycrystalline layer 5 becomes unstable.
なお成長層に不純物を導入した成長を行う際には、通常
の方法と同様にして反応ガスに不純物の原料ガスを混入
すれば良い。Note that when performing growth with impurities introduced into the growth layer, the impurity raw material gas may be mixed into the reaction gas in the same manner as in a normal method.
また上記実施例は、5i02層3がロコス法により形成
された場合であるが、他の方法例えば全面被着の後開口
する方法によって形成された場合であっても多結晶層5
の安定成長に上記の圧力範囲が適用可能であることは容
易に類推出来る。Further, in the above embodiment, the 5i02 layer 3 is formed by the Locos method, but even if it is formed by other methods, such as a method in which openings are formed after the entire surface is deposited, the polycrystalline layer 3
It can be easily inferred that the above pressure range is applicable to stable growth of .
以上説明したように本発明の構成によれば、表面の一部
にSiO2層の形成されたSi基板上にSiを成長する
に際して、Si表出部上に形成されるエピタキシャル層
に繋がって5i02層上に同時に形成される多結晶層の
成長が安定化し、更にはエピタキシャル層を5i02層
上へ拡大させることが可能になり、 エピタキシャル
層と多結晶層との同時成長を単純化させると共に、例え
ば高速化トランジスタの形成を容易にさせる効果がある
。As explained above, according to the structure of the present invention, when growing Si on a Si substrate with a SiO2 layer formed on a part of the surface, a 5i02 layer is formed on the epitaxial layer formed on the Si exposed part. This stabilizes the growth of the polycrystalline layer that is simultaneously formed on top of the 5i02 layer, and furthermore, it becomes possible to extend the epitaxial layer onto the 5i02 layer, which simplifies the simultaneous growth of the epitaxial layer and the polycrystalline layer, and also allows for high-speed growth, for example. This has the effect of facilitating the formation of a transistor.
第1図は本発明方法実施例に用いる成長装置の構成図、
第2図は実施例による成長層を示す側面図、第3図はエ
ピタキシャル層と多結晶層の同時成長を示す側面図、
である。
図において、
1はSi基板、
2はSi表出部、
3は5liOz層、
4はエピタキシャル層、
5は多結晶層、
11は反応チャンバ、
12は加熱ヒータ、
13は加熱電源、
14は排気口、
15は反応ガス流入口、 −
16はH2ガス供給口、
17はSi2H6ガス供給口、
18.19は流量針、
である。Fig. 1 is a block diagram of a growth apparatus used in an embodiment of the method of the present invention, Fig. 2 is a side view showing a grown layer according to the embodiment, and Fig. 3 is a side view showing simultaneous growth of an epitaxial layer and a polycrystalline layer. be. In the figure, 1 is a Si substrate, 2 is a Si exposed part, 3 is a 5liOz layer, 4 is an epitaxial layer, 5 is a polycrystalline layer, 11 is a reaction chamber, 12 is a heating heater, 13 is a heating power source, and 14 is an exhaust port , 15 is a reaction gas inlet, - 16 is an H2 gas supply port, 17 is a Si2H6 gas supply port, and 18.19 is a flow rate needle.
Claims (1)
基板上にシリコンを成長するに際して、反応ガスにジシ
ラン(Si_2H_6)を用い、成長圧力を30Tor
rから300Torrまでの範囲内にすることを特徴と
する気相成長方法。When growing silicon on a silicon substrate with a silicon dioxide layer formed on a part of the surface, disilane (Si_2H_6) is used as a reaction gas and the growth pressure is 30 Torr.
A vapor phase growth method characterized in that the temperature is within a range from r to 300 Torr.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61276972A JPS63129614A (en) | 1986-11-20 | 1986-11-20 | Vapor-phase growth process |
KR1019870011063A KR900007686B1 (en) | 1986-10-08 | 1987-10-02 | Vapor-phase growth process |
EP87402250A EP0267082B1 (en) | 1986-10-08 | 1987-10-08 | A method for fabricating a semiconductor device comprising simultaneous growing of epitaxial and polycristalline Si layers over a selectively oxydized Si substrate, by vapor deposition |
DE3789852T DE3789852D1 (en) | 1986-10-08 | 1987-10-08 | Method for producing a semiconductor device with simultaneous growth of epitaxial and polycrystalline Si layers on a selectively oxidized Si substrate by means of gas phase deposition. |
US07/344,439 US4966861A (en) | 1986-10-08 | 1989-04-25 | Vapor deposition method for simultaneously growing an epitaxial silicon layer and a polycrystalline silicone layer over a selectively oxidized silicon substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61276972A JPS63129614A (en) | 1986-11-20 | 1986-11-20 | Vapor-phase growth process |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63129614A true JPS63129614A (en) | 1988-06-02 |
Family
ID=17576977
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61276972A Pending JPS63129614A (en) | 1986-10-08 | 1986-11-20 | Vapor-phase growth process |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63129614A (en) |
-
1986
- 1986-11-20 JP JP61276972A patent/JPS63129614A/en active Pending
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