JP2647927B2 - Selective epitaxial growth method - Google Patents

Selective epitaxial growth method

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Publication number
JP2647927B2
JP2647927B2 JP26183188A JP26183188A JP2647927B2 JP 2647927 B2 JP2647927 B2 JP 2647927B2 JP 26183188 A JP26183188 A JP 26183188A JP 26183188 A JP26183188 A JP 26183188A JP 2647927 B2 JP2647927 B2 JP 2647927B2
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Japan
Prior art keywords
film
sih
crystal
substrate
partial pressure
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JP26183188A
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Japanese (ja)
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JPH02106922A (en
Inventor
方紀 道盛
純一 佐野
清 米田
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Sanyo Denki Co Ltd
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Sanyo Denki Co Ltd
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Description

【発明の詳細な説明】 イ) 産業上の利用分野 本発明は選択的にSiO2膜を形成した単結晶Si基板上
に、SiO2膜のないSi基板表面が露出している部分上への
みに選択的に単結晶Si膜を成長させる選択的エピタキシ
ャル成長方法に関する。
DETAILED DESCRIPTION OF THE INVENTION a) INDUSTRIAL APPLICABILITY The present invention is selectively forming a SiO 2 film monocrystalline Si substrate, only on the portion where no Si substrate surface of SiO 2 film is exposed And a selective epitaxial growth method for selectively growing a single crystal Si film.

ロ) 従来の技術 絶縁層(絶縁物の基板も含む)上に単結晶Si層を形成
したものは、SOI(Silicon on Insulator)構造と称さ
れ、狭い領域で容易に素子分離が行なえ、高集積化や高
速化が可能なものとして知られている。そして、従来の
Si基板上に素子が作製される半導体集積回路(IC)に比
べて、特性向上が図れることから盛んに研究開発が行な
われている。
B) Conventional technology A single-crystal Si layer formed on an insulating layer (including an insulating substrate) is called an SOI (Silicon on Insulator) structure, which enables easy element isolation in a narrow area and high integration. It is known that speeding up and speeding up are possible. And the traditional
Compared to semiconductor integrated circuits (ICs) in which devices are fabricated on a Si substrate, research and development are being actively conducted because the characteristics can be improved.

絶縁層上に単結晶Si膜を形成させるものとして、固相
エピタキシャル成長法があり、これは、単結晶Si基板上
に、Si基板面の一部をシードとして露出させて絶縁膜を
形成し、シードと絶縁膜上に非晶質Si(以下a−Siと称
す)膜を堆積し、600℃程度の低温でアニールすること
で、横方向に固相成長させて、a−Si膜を単結晶化させ
るものである。
As a method for forming a single-crystal Si film on an insulating layer, there is a solid-phase epitaxial growth method, in which a part of the Si substrate surface is exposed as a seed on a single-crystal Si substrate to form an insulating film, and the seed is formed. Amorphous Si (hereinafter referred to as a-Si) film is deposited on the insulating film and then annealed at a low temperature of about 600 ° C., thereby allowing the a-Si film to be monocrystallized by solid phase growth in the lateral direction. It is to let.

しかし、この固相成長では、<100>方向の横方向に
優先的にa−Si膜の単結晶化が進むので、横方向の成長
より先にシードから上への縦方向の成長を必要とする固
相エピタキシャル成長では、シード上のa−Si膜を厚く
することができず、このため、シードと絶縁膜表面との
段差をあまり大きくとることができない。
However, in this solid phase growth, the single crystallization of the a-Si film proceeds preferentially in the <100> direction in the lateral direction, so that vertical growth from the seed to the upper side is required prior to the lateral growth. In the solid phase epitaxial growth, the thickness of the a-Si film on the seed cannot be increased, and therefore, the step between the seed and the surface of the insulating film cannot be made too large.

ところが、a−Si膜が薄い場合に、シードと絶縁膜表
面との段差が大きい(絶縁膜が厚い)と、堆積されるa
−Si膜に絶縁膜とシードの境の部分で段切れが生じた
り、段切れが生じなくても段差部分での内部応力が大き
くなるため、横方向の固相成長はほとんど起きないか、
起きても横方向成長距離はわずかとなる。
However, when the a-Si film is thin and the step between the seed and the insulating film surface is large (the insulating film is thick), the deposited a
-Since the step break occurs at the boundary between the insulating film and the seed in the Si film, or even if the step does not occur, the internal stress at the step becomes large, so that the solid phase growth in the lateral direction hardly occurs,
If it does, the lateral growth distance will be small.

このため、シードと絶縁膜表面との段差は出来る限り
小さく、即ち絶縁膜を薄くする必要があり、通常1000Å
以下に形成される。
For this reason, the step between the seed and the surface of the insulating film must be as small as possible, that is, the insulating film needs to be thinner, and usually has a thickness of 1000 mm.
It is formed below.

しかしながら、SOI構造を積層した三次元回路素子を
構成する場合、絶縁膜層下にデバイスを形成することに
なるので、デバイス構造や配線および電気的特性の安定
化のための保護を勘案すると、絶縁膜として1μm以上
の膜厚が必要になる。
However, when configuring a three-dimensional circuit element with a stacked SOI structure, a device is formed under the insulating film layer.In consideration of protection for stabilizing the device structure, wiring, and electrical characteristics, an insulating material is required. A film having a thickness of 1 μm or more is required.

そこで、例えば「SELECTIVE EPITAXIAL GROWTH OF SI
LICON BY CVD AND ITS THERMODYNAMIC CONSIDERATION」
(PROCEEDING OF THE TENTH INTERNATIONAL CONFERENCE
ON CHEMICAL VAPOR DEPOSITION 1987,Proceeding Vol.
87−8,PP.379−388)にある様に、選択的に開孔されたS
iO2膜を形成した単結晶Si基板上へと、SiH2Cl2−HCl−H
2の常圧CVDあるいは減圧CVD法により、常圧の場合950℃
乃至1050℃、減圧の場合850℃乃至950℃の基板温度で、
露出しているSi基板面上のみに単結晶Si膜を成長させる
選択的エピタキシャル成長(Selective Epitaxial Grow
th:以下SEG)法が考えられている。
So, for example, "SELECTIVE EPITAXIAL GROWTH OF SI
LICON BY CVD AND ITS THERMODYNAMIC CONSIDERATION ''
(PROCEEDING OF THE TENTH INTERNATIONAL CONFERENCE
ON CHEMICAL VAPOR DEPOSITION 1987, Proceeding Vol.
87-8, PP.379-388).
SiH 2 Cl 2 -HCl-H is deposited on the single crystal Si substrate on which the iO 2 film is formed.
950 ℃ at normal pressure by normal pressure CVD or low pressure CVD method of 2.
Substrate temperature of 850 ° C to 950 ° C,
Selective Epitaxial Grow to grow a single crystal Si film only on the exposed Si substrate surface
th: SEG) method is being considered.

この塩素系ガスを用いたSEG法は、シラン系ガスの熱
分解による露出している基板面上への単結晶Si膜及びSi
O2膜上への多結晶Si膜の堆積と、これら形成されるSi膜
に対するHClによるエッチングとを同時に起こし、エッ
チング速度が単結晶Si膜よりも多結晶Si膜の方が大きい
ことを利用して、SiO膜上へのSi膜の堆積をなくすもの
である。
The SEG method using a chlorine-based gas involves a single-crystal Si film and a Si film on an exposed substrate surface due to thermal decomposition of a silane-based gas.
O and the polycrystalline Si film deposited on the 2 film, cause the etching by HCl to Si film by these simultaneously formed, the etching rate by utilizing the fact also is larger polycrystalline Si film of monocrystalline Si film Thus, the deposition of the Si film on the SiO film is eliminated.

ハ) 発明が解決しようとする課題 しかし、上述の塩素系ガスを用いたSEG法では、エッ
チャントと考えられるClラジカルが、Si−Siボンドある
いはSi−Oボンドを攻撃し切断することでエッチングが
なされ、このエッチングにより、堆積した単結晶Si膜表
面及び多結晶Si膜表面付近には多数の欠陥が発生してし
まう。また、このSEG法で形成したSi膜上に更にa−Si
膜を堆積させて、このa−Si膜を固相エピタキシャル成
長させる場合には、a−Si膜中に残留するCl原子が混入
して結晶化が阻害されることになる。そして、横方向の
成長距離が短くなり、結果として大面積のSOI構造の基
板が得られないことになる。
C) Problems to be Solved by the Invention However, in the above-described SEG method using a chlorine-based gas, etching is performed by cutting Cl radicals, which are considered to be etchants, by attacking and breaking Si-Si bonds or Si-O bonds. Due to this etching, many defects occur near the surface of the deposited single crystal Si film and the surface of the polycrystalline Si film. Further, a-Si is further added on the Si film formed by the SEG method.
When a film is deposited and this a-Si film is grown by solid phase epitaxial growth, Cl atoms remaining in the a-Si film are mixed and crystallization is hindered. Then, the lateral growth distance is shortened, and as a result, a substrate having a large-area SOI structure cannot be obtained.

更にまた、CVD装置(特に減圧CVD装置)の寿命も短く
なってしまう。
Furthermore, the life of a CVD apparatus (particularly, a low pressure CVD apparatus) is shortened.

本発明は斯様な点に鑑みて為されたもので、塩素系ガ
スを用いずに、露出している単結晶Si基板上へのみに単
結晶Si膜をエピタキシャル成長させるSEG法を提供する
ものである。
The present invention has been made in view of such a point, and provides a SEG method for epitaxially growing a single crystal Si film only on an exposed single crystal Si substrate without using a chlorine-based gas. is there.

ニ) 課題を解決するための手段 本発明は、単結晶Si基台上に絶縁膜を形成し、前記単
結晶Si基台表面を露出させる開孔部を前記絶縁膜に形成
し、該絶縁膜に形成された開孔部において露出している
前記単結晶Si基台部分にのみ単結晶Si膜をSiH4の熱分解
による減圧気相成長により選択的にエピタキシャル成長
させる選択的エピタキシャル成長方法であって、 基板温度を横軸に、SiH4ガス分圧を縦軸にとった場合
の、基板温度890℃、SiH4ガス分圧0mTorrの点と、基板
温度950℃、SiH4ガス分圧20mTorrの点の2点を通る線を
境界線とし、該境界線から温度の高い側の範囲の基板温
度とSiH4ガス分圧でSiH4の熱分解による減圧気相成長を
行うものである。
D) Means for Solving the Problems The present invention provides an insulating film formed on a single-crystal Si base, and an opening for exposing the surface of the single-crystal Si base is formed in the insulating film. only single-crystal Si layer on the single-crystal Si base portion exposed to a selective epitaxial growth method of selectively epitaxially grown by low pressure chemical vapor deposition by thermal decomposition of SiH 4 in the formed opening portion, When the substrate temperature is plotted on the horizontal axis and the SiH 4 gas partial pressure is plotted on the vertical axis, the substrate temperature is 890 ° C, the SiH 4 gas partial pressure is 0 mTorr, and the substrate temperature is 950 ° C, the SiH 4 gas partial pressure is 20 mTorr. the line passing through the two points as a boundary line, and performs pressure chemical vapor deposition by thermal decomposition of SiH 4 at a substrate temperature and the SiH 4 gas partial pressure of high side range temperature of the boundary line.

ホ) 作用 もともと、絶縁膜であるSiO2表面は、単結晶Si表面に
比べて、Siのダングリングボンドが少ないため、反応中
の表面吸着種(Si)が結合するキンクサイトの数が少な
く、SiO2表面上には結晶Siの核が発生しにくい。そこ
で、基台温度を十分高くすると、表面吸着種の表面泳動
が激しくなり、表面吸着種のキンクサイトへの吸着がさ
れにくくなる。また、SiH4ガス分圧を十分高い真空度に
することで、表面泳動中の表面吸着種がキンクサイトに
吸着する前に排気される可能性が高くなる。
E) Action Originally, the surface of the insulating film, SiO 2 , has fewer dangling bonds of Si than the surface of single crystal Si, so the number of kink sites to which surface adsorbed species (Si) during the reaction are bonded is small, Crystal Si nuclei hardly occur on the SiO 2 surface. Therefore, when the base temperature is sufficiently increased, surface migration of the surface adsorbed species becomes intense, and it becomes difficult for the surface adsorbed species to be adsorbed on the kink sites. Further, by setting the partial pressure of the SiH 4 gas to a sufficiently high degree of vacuum, the possibility that the surface adsorbed species during the surface migration is exhausted before adsorbing to the kink site is increased.

而して、基台温度とSiH4ガス分圧を上述の如き範囲内
にすることにより、絶縁膜上にはSi膜が成長せず、開孔
部から露出している単結晶Si基台上のみに単結晶Si膜が
エピタキシャル成長される。
Thus, by setting the base temperature and the SiH 4 gas partial pressure in the above ranges, the Si film does not grow on the insulating film, and the single crystal Si base exposed from the opening is formed. Only in this case, a single-crystal Si film is epitaxially grown.

ヘ) 実施例 第1図A乃至Gは本発明一実施例の概略工程図を示
す。本実施例では単結晶Si基台として、単結晶Si基板を
用いているが、基板上に形成された単結晶Si膜を用いて
も良い。
F) Example FIGS. 1A to 1G show schematic process diagrams of an example of the present invention. In this embodiment, a single crystal Si substrate is used as the single crystal Si base, but a single crystal Si film formed on the substrate may be used.

(1)は(100)面を主面とする単結晶Si基台として
の単結晶Si基板で、その表面に絶縁膜として膜厚1μm
程のSiO2膜(2)を熱酸化あるいはCVD法により形成す
る(第1図A)。そして、このSiO2膜(2)を、公知の
技術であるフォトリソグラフィ技術により、シードとし
てのSi基板表面を露出させる開孔部(2a)を選択的に形
成する(第1図B)。
(1) is a single crystal Si substrate as a single crystal Si base having a (100) plane as a main surface, and a film thickness of 1 μm as an insulating film on the surface thereof.
The SiO 2 film (2) is formed by thermal oxidation or CVD (FIG. 1A). Then, an opening (2a) for exposing the surface of the Si substrate as a seed is selectively formed on the SiO 2 film (2) by a known photolithography technique (FIG. 1B).

次に、このパターン形成されたSiO2膜(2)を有する
基板を、1×10-6Torrより高い真空度の真空中で赤外線
ランプにより940℃まで昇温加熱し、温度を一定とした
後、流量150cc/minでArガスを導入して、Ar圧力65mTorr
にしてArスパッタを行い、基板表面のクリーニングを5
分間行う(第1図C)。このとき、例えばRF周波数は1
3.56MHz、出力50Wで、基板には−100Vの直流バイアスを
印加しておく。
Next, the substrate having the patterned SiO 2 film (2) is heated to 940 ° C. by an infrared lamp in a vacuum having a degree of vacuum higher than 1 × 10 −6 Torr, and the temperature is kept constant. Ar gas was introduced at a flow rate of 150 cc / min and the Ar pressure was 65 mTorr.
And perform Ar sputtering to clean the substrate surface
Minutes (FIG. 1C). At this time, for example, the RF frequency is 1
A DC bias of -100 V is applied to the substrate at 3.56 MHz and an output of 50 W.

表面のクリーニングが終ったら、基板温度を940℃に
保ったまま、Arガスの供給を止め、RFと直流バイアスを
切って、SiH4ガスを流量4sccm圧力(分圧)13mTorrで供
給し、開孔部(2a)から露出しているSi基板表面(シー
ド部(1a))上にのみ、単結晶Si膜(3)を選択的にエ
ピタキシャル成長させる。この単結晶Si膜(3)は、Si
O2膜(2)と同じ膜集まで成長させる(第1図D)。
After cleaning the surface, stop supplying Ar gas while keeping the substrate temperature at 940 ° C, turn off RF and DC bias, supply SiH 4 gas at a flow rate of 4 sccm at a pressure (partial pressure) of 13 mTorr, and open holes. The single crystal Si film (3) is selectively epitaxially grown only on the surface of the Si substrate (seed portion (1a)) exposed from the portion (2a). This single crystal Si film (3)
A film is grown to the same thickness as the O 2 film (2) (FIG. 1D).

続いて、選択的エピタキシャル成長を行った気相成長
装置の反応室内に設置したまま、SiH4ガスの供給を止
め、1×10-6Torrより高い真空度の真空中で、基板温度
を550℃まで低下させた後、再びArガスを流量500cc/mi
n、Ar分圧200mTorrに供給して、13.56MHzのRFを出力70W
で印加し、基板に−50Vの直流バイアスを掛けてArスパ
ッタによる基板表面のクリーニングを10分間行う(第1
図E)。
Subsequently, the supply of SiH 4 gas was stopped while the substrate temperature was kept in the reaction chamber of the vapor phase growth apparatus where the selective epitaxial growth was performed, and the substrate temperature was reduced to 550 ° C. in a vacuum having a degree of vacuum higher than 1 × 10 −6 Torr. After lowering the flow rate of Ar gas again, 500cc / mi
n, supply to Ar partial pressure 200mTorr, output 13.56MHz RF 70W
And apply a DC bias of -50 V to the substrate to clean the substrate surface by Ar sputtering for 10 minutes (first example).
Figure E).

そして、表面のクリーニングが終ったら、基板温度を
550℃に保った状態で、Arガスの供給を停止し、RFと直
流バイアスを切ってから、反応室内にSiH4ガスを流量20
0sccm、分圧6(乃至7)Torrで供給して、基板表面上
にa−Si膜(4)を6000Å(成長速度200Å/min)の厚
さに堆積させる(第1図F)。
When the surface cleaning is completed,
While maintaining the 550 ° C., to stop the supply of the Ar gas flow rate turn off the RF and DC bias, the SiH 4 gas into the reaction chamber 20
An a-Si film (4) is deposited to a thickness of 6000 ° (growth rate 200 ° / min) on the surface of the substrate by supplying 0 sccm and a partial pressure of 6 (or 7) Torr (FIG. 1F).

その後、反応室内にArガスを導入して残留するSiH4
スを排気したら、真空引きを行い、室温まで気温温度を
下げる。そして、アニール装置を用いて、大気圧N2雰囲
気中で600℃の温度での12時間のアニール処理により、
a−Si膜(4)の固相エピタキシャル成長を行い、該a
−Si膜(4)を単結晶化させた単結晶Si膜(4′)を得
る(第1図G)。
Thereafter, Ar gas is introduced into the reaction chamber to exhaust the remaining SiH 4 gas, and then the chamber is evacuated to lower the temperature to room temperature. Then, using an annealing apparatus, by performing an annealing process at a temperature of 600 ° C. for 12 hours in an atmosphere of atmospheric pressure N 2 ,
The solid phase epitaxial growth of the a-Si film (4) is performed,
-A single-crystal Si film (4 ') is obtained by single-crystallizing the Si film (4) (FIG. 1G).

さて、第1図Dに示す工程においてSEGが行われるわ
けだが、a−Si膜(4)を堆積させる単結晶Si膜(3)
表面に欠陥が多いと、a−Si膜のアニールを始めてから
固相成長が起こるまでの遅れ時間が長くなり、a−Si膜
の横方向のエピタキシャル成長距離は短くなってしま
う。また、SiO2膜(2)上に多結晶Siの核が発生する
と、エピタキシャル成長を阻止する多結晶核が早く発生
するので、やはりa−Si膜の横方向のエピタキシャル成
長距離は短くなる。従って、第1図Dの工程では良好に
SEGを行う必要がある。
Now, in the step shown in FIG. 1D, SEG is performed, but a single-crystal Si film (3) for depositing an a-Si film (4)
If there are many defects on the surface, the delay time from the start of annealing of the a-Si film to the occurrence of solid phase growth becomes long, and the lateral epitaxial growth distance of the a-Si film becomes short. Further, when polycrystalline Si nuclei are generated on the SiO 2 film (2), polycrystalline nuclei for preventing epitaxial growth are generated quickly, so that the lateral epitaxial growth distance of the a-Si film also becomes short. Therefore, in the process of FIG.
Need to do SEG.

第2図はSEGが起きるときと起きないときの基板温度
とSiH4ガス分圧の関係を示す図である。白丸は、Si基板
上にのみ単結晶Si膜がエピタキシャル成長し、SiO2膜上
にはSi膜が堆積しない場合(即ちSEGが起きる)を示
し、黒丸はSi基板上に単結晶Si膜がエピタキシャル成長
し、SiO2膜上にもSi膜が堆積する場合(即ちSEGが起き
ない)を示している。
FIG. 2 is a diagram showing the relationship between the substrate temperature and the SiH 4 gas partial pressure when SEG occurs and does not occur. Open circles indicate the case where the single-crystal Si film epitaxially grows only on the Si substrate, and the Si film does not deposit on the SiO 2 film (that is, SEG occurs), and black circles indicate that the single-crystal Si film epitaxially grows on the Si substrate. 3 shows a case where a Si film is deposited also on the SiO 2 film (that is, no SEG occurs).

第2図から明らかな如く、基台温度を横軸に、SiH4
ス分圧を縦軸にとり、基板温度890℃、SiH4ガス分圧0mT
orrの点aと、基板温度950℃、SiH4ガス分圧20mTorrの
点bの2点を通る線を境界線とし、この境界線から温度
の高い側の範囲の基板温度とSiH4ガス分圧に設定して減
圧気相成長させたときにのみSEGが実現される。
As can be seen from FIG. 2, the base temperature is plotted on the horizontal axis and the SiH 4 gas partial pressure is plotted on the vertical axis. The substrate temperature is 890 ° C., and the SiH 4 gas partial pressure is 0 mT.
A line passing through the point a of the orr and the point b of the substrate temperature of 950 ° C. and the SiH 4 gas partial pressure of 20 mTorr is defined as a boundary line, and the substrate temperature and the SiH 4 gas partial pressure in the range of higher temperature from the boundary line SEG is realized only when the pressure is reduced and the vapor phase growth is performed.

これは、基台温度を十分高くすると、表面吸着種の表
面泳動が激しくなり、表面吸着種のキンクサイトへの吸
着がされにくくなり、また、SiH4ガス分圧を十分高い真
空度にすることで、表面泳動中の表面吸着種がキンクサ
イトに吸着する前に排気される可能性が高くなる。
This is because if the base temperature is set high enough, the surface migration of the surface adsorbed species will become intense, making it difficult for the surface adsorbed species to be adsorbed on the kink sites, and the partial pressure of the SiH 4 gas must be set to a sufficiently high vacuum. Therefore, there is a high possibility that the surface adsorbed species during the surface migration is exhausted before adsorbing to the kink site.

而して、基台温度とSiH4ガス分圧を第2図に斜線で示
す範囲に設定することにより、SiO2膜上にはSi膜は堆積
せずに単結晶Si基板上にのみのSi膜の堆積がされ、即ち
SEGが行われる。
Thus, by setting the base temperature and the partial pressure of the SiH 4 gas in the range shown by the oblique lines in FIG. 2 , the Si film is not deposited on the SiO 2 film, and the Si film is deposited only on the single crystal Si substrate. The film is deposited, ie
SEG is performed.

ト) 発明の効果 本発明は以上の説明から明らかな如く、基板温度SiH4
ガス分圧を制御することで、塩素ガスを用いずにSEGを
行うことができる。従って、固相エピタキシャル成長さ
せるためのシードとなる単結晶Si膜に欠陥が発生するの
を抑制し、またa−Si膜中に不純物が混入する機会を減
らすことができる。その結果、a−Si膜を固相エピタキ
シャル成長させるときに、横方向への成長距離を伸ばす
ことができ、大面積のSOI構造の基板を提供することが
可能となる。
G) Effects of the Invention As is clear from the above description, the present invention provides a substrate temperature SiH 4
By controlling the gas partial pressure, SEG can be performed without using chlorine gas. Therefore, generation of defects in the single crystal Si film serving as a seed for solid phase epitaxial growth can be suppressed, and the chance of impurities being mixed into the a-Si film can be reduced. As a result, when the a-Si film is subjected to solid phase epitaxial growth, the growth distance in the lateral direction can be extended, and a large-area SOI structure substrate can be provided.

また、塩素系ガスを用いないので減圧CVD装置等の成
長装置の寿命を長くすることに寄与される。
Further, since a chlorine-based gas is not used, it contributes to extending the life of a growth apparatus such as a low-pressure CVD apparatus.

【図面の簡単な説明】[Brief description of the drawings]

第1図A乃至Gは本発明一実施例の工程説明図、第2図
はSEGを実現するための条件を示す図である。 (1)……単結晶Si基板、(1a)……シード、(2)…
…SiO2膜(絶縁膜)、(2a)……開孔部、(3)……単
結晶Si膜、(4)……a−Si膜、(4′)……単結晶Si
膜。
FIGS. 1A to 1G are diagrams for explaining the steps of an embodiment of the present invention, and FIG. 2 is a diagram showing conditions for realizing SEG. (1) Single crystal silicon substrate (1a) Seed (2)
... SiO 2 film (insulating film), (2a) ... aperture, (3) ... single crystal Si film, (4) ... a-Si film, (4 ') ... single crystal Si
film.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】単結晶Si基台上に絶縁膜を形成し、前記単
結晶Si基台表面を露出させる開孔部を前記絶縁膜に形成
し、該絶縁膜に形成された開孔部において露出している
前記単結晶Si基台部分にのみ単結晶Si膜をSiH4の熱分解
による減圧気相成長により選択的にエピタキシャル成長
させる選択的エピタキシャル成長方法において、 基台温度を横軸に、SiH4ガス分圧を縦軸にとった場合
の、基板温度890℃、SiH4ガス分圧0mTorrの点と、基板
温度950℃、SiH4ガス分圧20mTorrの点の2点を通る線を
境界線とし、該境界線から温度の高い側の範囲の基板温
度とSiH4ガス分圧でSiH4の熱分解による減圧気相成長を
行うことを特徴とする選択的エピタキシャル成長方法。
An insulating film is formed on a single-crystal Si base, and an opening for exposing the surface of the single-crystal Si base is formed in the insulating film. In the opening formed in the insulating film, in the selective epitaxial growth method for only the single-crystal Si layer on the single-crystal Si base portion exposed selectively epitaxially grown by low pressure chemical vapor deposition by thermal decomposition of SiH 4, the horizontal axis base temperature, SiH 4 When the gas partial pressure is plotted on the vertical axis, a line passing through two points, a substrate temperature of 890 ° C and a SiH 4 gas partial pressure of 0 mTorr, and a substrate temperature of 950 ° C and a SiH 4 gas partial pressure of 20 mTorr is defined as a boundary line. A selective epitaxial growth method, comprising performing reduced-pressure vapor growth by thermal decomposition of SiH 4 at a substrate temperature in a higher temperature range from the boundary and a SiH 4 gas partial pressure.
JP26183188A 1988-10-17 1988-10-17 Selective epitaxial growth method Expired - Fee Related JP2647927B2 (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
JP26183188A JP2647927B2 (en) 1988-10-17 1988-10-17 Selective epitaxial growth method

Publications (2)

Publication Number Publication Date
JPH02106922A JPH02106922A (en) 1990-04-19
JP2647927B2 true JP2647927B2 (en) 1997-08-27

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5221412A (en) * 1989-09-26 1993-06-22 Toagosei Chemical Industry Co., Ltd. Vapor-phase epitaxial growth process by a hydrogen pretreatment step followed by decomposition of disilane to form monocrystalline Si film
JP2638261B2 (en) * 1990-07-17 1997-08-06 日本電気株式会社 Selective epitaxial growth of silicon
TW205603B (en) * 1990-09-21 1993-05-11 Anelva Corp
US6319782B1 (en) 1998-09-10 2001-11-20 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method of fabricating the same

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