JPS63123213A - Digital filter - Google Patents

Abstract

PURPOSE:To ensure S/N at the accuracy of an input signal even at an output signal side by extracting the prescribed frequency component of a sampled digital signal and adding a signal rounding off the digits less than the effective digits to the input signal. CONSTITUTION:Only a high frequency component is extracted by the accuracy of 1/2LSB (LSB indicates a minimum effective digit in a digital signal) to be a signal (b) via a filter 10 from a signal (a) including a quantized error. The round-off is applied to the signal (b) by a round-off circuit 14 in the state of absolute value with the accuracy of 1 LSB same as that of the signal (a) to form a signal (e). Since the amplitude of the signal (b) is less than 1LSB, a non-signal state is caused to the signal (e) by the round-off of the absolute value state. Thus, the output of an adder circuit 15, that is, an output signal obtained from an output terminal 16 is a state same as that the input signal (a) is outputted as it is.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a digital filter that emphasizes only predetermined frequency components in a sampled digital signal.

BACKGROUND OF THE INVENTION FIG. 3 is a block diagram showing an example of a conventional digital filter. 1 is an input terminal that inputs a digital signal sampled at the sampling period, and 2 is a filter that inputs the signal obtained from input terminal 1 and extracts only the high frequency component. It is composed of a delay circuit 3 that delays by T, a subtraction circuit 4 that subtracts the output of the delay circuit 3 from the output of the delay circuit 3, and a multiplication circuit 5 that multiplies the output of the subtraction circuit 4 by a constant 〃 to obtain the output of the filter 2. 6 is an adder circuit that adds the output of the filter 2 to the input signal input from the input terminal 1; 7 is a rounding circuit that rounds off the value less than the significant digits of the output of the adder circuit 6; 8 is the input terminal A signal in which only the high-frequency components extracted by the filter 2 of the input signal inputted from the filter 1 are emphasized is output. The operation of the conventional digital filter configured as described above will be explained below.

First, the third
The transfer function (denoted as H(Z)) of the conventional digital filter is expressed as follows.

H(z)=1+□ ・・・・・・(1)(1
) The second term on the right side of the equation shows the characteristics of filter 2 in Figure 3, which operates as a high-pass filter (abbreviated as IFF), so (1) 2H(z) is a high-frequency emphasizing digital filter. becomes.

Next, regarding the conventional example shown in FIG. 3, the effective digits of the digital filter will be explained. Since the frequency component extracted by the filter 2 from the input signal inputted to the input terminal 1 is added to the input signal by the adder circuit 6, the dynamic range of the output signal is wider than the dynamic range of the input signal, but it is within the minimum effective range of the signal. Regarding digits, it is common for the input signal and the output signal to have the same minimum significant digit. In general digital filters, the digits of the signal are often calculated to less than the effective digits due to calculations performed inside the filter, and in such cases, as shown in the rounding circuit 7 in Figure 3, the value less than the effective digits of the signal is calculated. is rounded to align the least significant digit with the input signal before outputting the signal.

The operation for the least significant digit in this conventional example will be explained using the operation waveform diagram in FIG. In the figure, the horizontal axis is time, and the vertical axis is signal value. Here, the unit of the vertical axis is LSB (Leat
51gn1ficant Bit: represents the least significant digit in a digital signal). FIG. 4a shows the input signal input to the input terminal 1, and the time to%t2
This is a signal in which the DC value of the signal changes by 1 LSB between. At this time, in the digital signal, an error of 1 LSB occurs in the DC value, as seen in signal a, due to quantization errors that occur during quantization by MU/D conversion, etc., and noise components at a minute level less than 1 LsH. The signal S is the output of the filter 2, and the signal C is the output of the adder circuit 6 obtained by adding the signal b2 to the signal B by the adder circuit θ. These signals (s) and (c) are calculated to an accuracy of one LSB by the calculation configuration of the filter 2. The signal d is expressed with an accuracy of v2LSB, and is the same as the input signal a with respect to the ratio signal C (signal c=i rounded by the rounding method by the rounding circuit 7 so that it is expressed with an accuracy of 1LsH. However, , since the value representing less than 11.88 among the outputs of the adder circuit 6 is included only in the output of the filter 2, which is one input of the adder circuit θ, the rounding circuit 7 is connected to the adder circuit 6 as shown in FIG. There is no need to separately provide a subsequent stage, and the rounding operation can be easily performed by adding the value of the pit representing 112 LSB of the filter 2 output as a carry for rounding in the adder circuit 6.

Problems to be Solved by the Invention However, in the above configuration, since the signal change of 1LSB is also emphasized as a frequency component, 1LSB, which is considered to be a quantization error of the digital signal, is generated in a flat signal state.
This has the problem that the noise components below ILSB are emphasized to the components above ILSB, which deteriorates the signal-to-noise ratio of the signal. This will be explained using the fourth operation waveform diagram. Time t as shown in signal a.

The signal change at ~t2 can easily occur even if the quantization noise of the signal is less than ILSB. When the high frequency band of the signal & containing the quantization noise is emphasized by the digital filter shown in the conventional example in Fig. 3, the signal change at time to-12 is emphasized to 2LSB as seen in the signal d, resulting in a flat signal. The S/Ni in the state is deteriorated, and the S/N in the accuracy of the input signal a cannot be ensured by the output signal (signal d).

In view of this, an object of the present invention is to provide a digital filter that emphasizes only predetermined frequency components, and which ensures the S/N ratio of the input signal accuracy on the output signal side as well.

Next Means for Solving the Problems The present invention provides a filter for extracting a predetermined frequency component of an input signal, a rounding means for rounding off the value of less than the significant digits of the output of the filter in an absolute value state, and an output of the rounding means as described above. This is a digital filter equipped with an adder circuit that adds to the input signal.

Effect of the Invention With the above-described configuration, the present invention performs a rounding operation in the absolute value state on the same significant digits as the significant digits of the output signal before the filter output is added to the input signal, thereby reducing the accuracy of the input signal by less than 1 LSB. To emphasize only predetermined frequency components without emphasizing quantization errors due to minute level noise.

Embodiment FIG. 1 shows a block diagram of a digital filter in an embodiment of the present invention. In the same figure, 9 is an input terminal for inputting a digital signal sampled at sampling period T, and 1o is a filter for inputting the signal obtained from input terminal 9 and extracting only high-frequency components.
a delay circuit 11 that delays the zero human power by a sampling period T;
It is comprised of a subtraction circuit 12 that subtracts the output of the delay circuit 11 from the output of the delay circuit 11, and a multiplication circuit 13 that multiplies the output of the subtraction circuit 12 by a constant difference to obtain the output of the filter 1o. 14
16 is a rounding circuit that rounds the output of the filter 1o by a method that matches the significant digits of the input signal input to the input terminal 9 and rounds off values less than the significant digits in an absolute value state; 16 is the input signal input to the input terminal 9; An adder circuit 16 adds the output of the rounding circuit 14 to , and 16 is an output terminal of the digital filter of this embodiment. The transfer function of this embodiment is the same as the transfer function of the conventional example shown in FIG. This is the same as Filter 2, and is an HPF as expressed by the second term on the right side of equation (1) above. Therefore, the characteristics of the present embodiment shown in FIG. 1 are the same high frequency emphasized characteristics as those of the conventional example shown in FIG.

Next, the operation of this embodiment will be explained using a second operation waveform diagram. The signal a in FIG. 2 is exactly the same as the signal & in FIG. be done. The signal A is the output of the filter 10, and is exactly the same as the signal A in Figure 4 above, with only the high frequency component of the signal A being XAL.
Extracted with SB accuracy. This signal is shown in Figure 1. Rounding circuit 1
4, a truncation operation is performed in the absolute value state to the same 1 LSB precision as the input signal &, resulting in signal 6.

The amplitude of the signal e is 1 LSB, which is the signal of the rounding circuit 14.
Since it is less than 1, the absolute value state is truncated and becomes a no-signal state. Therefore, the output of the adder circuit 15, that is, the output signal obtained from the output terminal 16 is as shown in the signal f in FIG. 2, which is the state in which the input signal ai is output as is.

As described above, according to this embodiment, in order to make the significant digits of the output signal the same as the significant digits of the input signal, the value less than the significant digits generated at the output of the filter 10 is added to the input signal by the adding circuit 16. The digital filter of this embodiment, which emphasizes only the high-frequency components as shown in equation (1) H(z) by rounding off in the absolute value state, also reduces the amount of information contained in the input signal. The accuracy of the S/Ni in the input signal without emphasizing the quantization error
This can also be ensured on the output signal side.

In the embodiment of FIG. 1, the rounding circuit 14 is provided at the subsequent stage of the filter 10 for the rounding operation of rounding off in the absolute value state, but the operation of the rounding circuit 14 is configured only by the detection section of the carry condition accompanying the rounding operation. The actual carry operation can be performed in the adder circuit 16 following the rounding circuit 14.

In the embodiment of FIG. 1, the values produced by the filter 1o that are less than the significant digits are represented by one bit. Now, let the value of this 1 bit be X. Also, the positive/negative sign (S(!:'-jru) of the output of the filter 1o is expressed as 2's complement, and if it is positive, then 5=O1. If it is negative, S=1. Therefore, the absolute Next, after performing the truncation operation in the value state, the carry (denoted as C) from the value less than the significant digit to the least significant digit is obtained by the logical operation of the following equation.

C=S, x-0-0-
(2) By leading this C to the adder circuit 16 as a carry, the truncation operation can be completed in the absolute value state of the output of the filter 1o. However, the characteristics of the filter 1o are other characteristics, and the value less than the significant digit of the output is multiple bits (positive integer n
When expressed as n bits using i), each bit representing a value less than the significant digit is x1 to Xi, and the sign bit '6s is used, and the carry C can be obtained by logical operation using the following equation.

C=f;, (x1+x2+−−−−−−+xl)
-・-A3)) From the above, the rounding circuit 14 detects the carry c4 associated with the rounding operation, and the adder circuit 15 at the subsequent stage of Ci
This can be achieved with a simple configuration that leads to

Effects of the Invention As explained above, according to the present embodiment, only a predetermined frequency component is detected for an input signal containing a 1 LSB noise component such as a quantization error that occurs when a signal is digitized. Even if it is emphasized, the S/Ni in a flat signal state of the output signal having the same significant digits as the input signal can be ensured without performing an emphasis operation on the 1LSB noise component, which has a great practical effect. In particular, for VTR brightness signal processing, the emphasis circuit during recording, the tape during playback,
If used in a correction circuit that compensates for the drop in the high-frequency component of the reproduced luminance signal due to the loss of the upper side wave of the FM signal in the head system, the S/N can be improved without the need to expand the effective number of digits of the output signal toward the minute level. This is very effective in terms of circuit scale as well.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a digital filter according to an embodiment of the present invention, Fig. 2 is an operation waveform diagram of the same embodiment, Fig. 3 is a block diagram of a conventional digital filter, and Fig. 4 is a conventional example shown in Fig. 3. FIG. 1o...Filter, 14...Rounding circuit, 15...Addition circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 4

Claims (1)

[Claims] A filter that takes a sampled digital signal as an input signal and extracts a predetermined frequency component of the input signal, a rounding means that rounds off the value of less than the significant digits of the filter output in an absolute value state, and a filter that is rounded by the rounding means. A digital filter comprising: an adder circuit for adding a signal to the input signal, and emphasizing only the frequency component extracted by the filter of the input signal.