JPS63122125A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS63122125A
JPS63122125A JP26816086A JP26816086A JPS63122125A JP S63122125 A JPS63122125 A JP S63122125A JP 26816086 A JP26816086 A JP 26816086A JP 26816086 A JP26816086 A JP 26816086A JP S63122125 A JPS63122125 A JP S63122125A
Authority
JP
Japan
Prior art keywords
insulating film
film
opening
etching
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26816086A
Other languages
Japanese (ja)
Inventor
Kazuhiko Katami
形見 和彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP26816086A priority Critical patent/JPS63122125A/en
Publication of JPS63122125A publication Critical patent/JPS63122125A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain an opening part having an ideal shape and to improve the step coverage of an insulating film by etching it with a resist as a mask to form an opening of predetermined depth in the film, then removing the resist, and etching the film on the whole surface. CONSTITUTION:When a second insulating film 103 is formed on first wirings 102 on a first insulating film 101, the film 103 is formed to be thicker than the necessary thickness of the film to be necessary after the processing thereby to alleviate 'a constriction' of the stepped part 106. Then, with a photoresist 104 as a mask the film 103 is partly etched. Thereafter, after the photoresist 104 is removed, the whole surface of the film 103 is etched, the opening of the film 103 is penetrated to the first wirings 102, and the thickness of the second insulating film is reduced. At this time, if dry etching is executed under suitable condition, the upper end 105 of the hole is formed in a round shape, while the shape of the part 106 can be transferred as the shape before etching as it is.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造方法に関し、特に絶縁膜に
開孔部分を形成する方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming an opening in an insulating film.

〔発明の概要〕[Summary of the invention]

本発明は、絶縁膜に開孔部分を形成するに際し、まず、
レジストをマスクとしてエツチングして絶縁膜に一定の
深さの孔を形成した後レジストを除去し今度は絶縁膜を
全面的にエツチングすることにより、理想的な形状を有
する開孔部分を得るとともに、絶縁膜のステップカバレ
ジの改善をはかろうとするものである。
In the present invention, when forming an opening in an insulating film, first,
After etching using the resist as a mask to form a hole of a certain depth in the insulating film, the resist is removed and the insulating film is etched over the entire surface to obtain an opening having an ideal shape. This is an attempt to improve the step coverage of the insulating film.

〔従来の技術〕[Conventional technology]

従来の技術によれば、例えば、第1の絶RK上の第1の
配線上に形成された第2の絶縁膜にU8孔部分を形成し
ようとする場合には、以下のようであった。すなわち、
第2図−(a)に示す第1の絶縁膜201上の第1の配
llA202に対して、第2図−(b)に示すように第
2の絶縁膜203を形成する。このとき、第2の絶縁膜
′203の膜厚については、第1の配@202と第2の
配線を絶縁するのに必要な膜厚、通常o、4〜1.0μ
隅である。次に第2図−<c>のように、フォトレジス
ト204により開孔パターンを形成した後、第2図−(
d)のように7オトレジスト204をマスクとしてエツ
チングを行ない、第2の絶縁膜203に開孔部分を形成
する。そして、フォトレジスト204を除去する事によ
り、第2図−(g)の構造を得ていた。
According to the conventional technology, for example, when attempting to form the U8 hole portion in the second insulating film formed on the first wiring on the first RK, the process is as follows. That is,
As shown in FIG. 2-(b), a second insulating film 203 is formed on the first interconnect 202 on the first insulating film 201 shown in FIG. 2-(a). At this time, the film thickness of the second insulating film '203 is the film thickness necessary to insulate the first wiring @ 202 and the second wiring, usually o, 4 to 1.0 μm.
It's a corner. Next, as shown in FIG. 2-<c>, after forming an opening pattern with photoresist 204,
As shown in d), etching is performed using the 7 photoresist 204 as a mask to form an opening in the second insulating film 203. Then, by removing the photoresist 204, the structure shown in FIG. 2-(g) was obtained.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、前述の従来技術では、第2図−(C)に
示すように、開孔部分上端205の形状がほぼ直角にな
るとともに、段差部分206でも“くびれ”が生じるた
めに、前記の工程後に第2の配線を形成しようとするよ
うな場合には、前記開孔部分上端205および段差部分
206において、第2の配線が断線したり、短絡したり
するという問題があった。
However, in the above-mentioned prior art, as shown in FIG. 2-(C), the shape of the upper end 205 of the opening portion becomes almost a right angle, and the step portion 206 also has a “constriction”, so that after the above process, When a second wiring is to be formed, there is a problem that the second wiring is disconnected or short-circuited at the upper end 205 of the opening portion and the stepped portion 206.

そこで、本発明はこのような問題点を解決、しようとす
るもので、その目的とするところは、開孔部分上端20
5および段差部分206の形状を改養することで、第2
の配線形成時の断線や短絡を防止し、高歩留シで、信頼
性の高い工Cの製造方法を提供するところにある。
Therefore, the present invention attempts to solve such problems, and its purpose is to fix the upper end 20 of the aperture portion.
5 and the shape of the stepped portion 206, the second
It is an object of the present invention to provide a manufacturing method for a process C that prevents disconnection and short circuits during wiring formation, has a high yield, and is highly reliable.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体装置の製造方法は、トランジスタ、ダイ
オード、または配線等が形成された層の上に絶縁膜を形
成する工程、前記絶縁膜上にフォトレジストにより開孔
パターンを形成する工程、前記フォトレジストをマスク
として前記絶縁膜をエツチングすることにより、前記絶
縁膜の一部分に、定められた深さの孔を形成する工程、
前記フォトレジストを除去する工程、前記絶縁膜の全面
をエツチングすることにより、前記絶縁膜を薄くすると
ともに、前記絶縁膜の一部分に完全な開孔部分を形成す
る工程とから成ることを特徴とする〔実施例〕 第1図(α)〜(1)は、本発明の実施例における工程
断面図であって、第1の絶縁膜上の第1の配線上に形成
された第2の絶縁膜に開孔部分を形成する場合を例とし
て示したものである。以下、第1図(α’)−(1)に
掟りて説明していく。
The method for manufacturing a semiconductor device of the present invention includes a step of forming an insulating film on a layer in which transistors, diodes, wiring, etc. are formed, a step of forming an opening pattern with a photoresist on the insulating film, and a step of forming an opening pattern with a photoresist on the insulating film. forming a hole with a predetermined depth in a portion of the insulating film by etching the insulating film using a resist as a mask;
The method is characterized by comprising the steps of removing the photoresist, etching the entire surface of the insulating film to make the insulating film thinner, and forming a complete opening in a portion of the insulating film. [Example] FIGS. 1(α) to (1) are process cross-sectional views in an example of the present invention, in which a second insulating film formed on a first wiring on a first insulating film This example shows a case where an opening is formed in the hole. The following explanation will be based on FIG. 1 (α')-(1).

まず最初第1図(α)に示すように、第1の絶縁膜10
1上の第1の配線102に対して、第1図−(b)に示
すように第2の絶縁膜103を形成する。このとき、第
2の絶縁膜103の膜厚は、工程終了後に必要となる膜
厚よりも(L5μm〜1.0μ町厚く形成することによ
り段差部分106の1くびれ”は緩和されている。次に
、第1図−<c>のように、フォトレジスト104によ
り開孔パターンを形成した後、第2図−(d)に示すよ
うに7オトレジスト104をマスクとして、第2の絶縁
膜103の一部をエツチングする。このとき、あらかじ
め定められた深さの孔が形成されるようにエツチングの
深さを!!整している。
First, as shown in FIG. 1 (α), a first insulating film 10 is formed.
A second insulating film 103 is formed on the first wiring 102 on the first wiring 102 as shown in FIG. 1-(b). At this time, the thickness of the second insulating film 103 is made thicker by 5 μm to 1.0 μm (L5 μm to 1.0 μm) than the film thickness required after the process is completed, so that the “1 constriction” of the stepped portion 106 is relaxed.Next After forming an opening pattern with the photoresist 104 as shown in FIG. 1-<c>, the second insulating film 103 is formed using the photoresist 104 as a mask as shown in FIG. 2-(d). A portion is etched.At this time, the depth of the etching is adjusted so that a hole with a predetermined depth is formed.

次に、第1図−(、a)に示すように、フォトレジスト
104を除去した後に、第2の絶縁膜103の全面をエ
ツチングし、第2の絶縁膜103の開孔部分を第1の配
線102まで貫通させるとともに、第2の絶縁膜の膜厚
を簿〈シ、第1図−(f)を得る。このときのエツチン
グを適当な条件のドライエツチングで行なえば、開孔部
分上端105のエツジ部分のエツチング速度が速くする
ことが可能で、これにより、はぼ直角であった形状が、
第1図−(1)に示すように開孔部上端105′に丸み
をもりた形状となる一方で、段差部分106の形状は、
エツチング前の形状をそのまま転写することができる。
Next, as shown in FIG. 1-(,a), after removing the photoresist 104, the entire surface of the second insulating film 103 is etched, and the opening portion of the second insulating film 103 is etched into the first insulating film 103. The film is penetrated to the wiring 102, and the thickness of the second insulating film is measured as shown in FIG. 1-(f). If the etching at this time is performed by dry etching under appropriate conditions, the etching speed of the edge portion of the upper end 105 of the opening portion can be increased, and as a result, the shape that was almost a right angle can be changed to
As shown in FIG. 1-(1), the upper end 105' of the opening has a rounded shape, while the shape of the stepped portion 106 is as follows.
The shape before etching can be transferred as is.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明によれば、絶縁膜に形成する
開孔部分の形状を理想的なテーパー角を有する形状にす
るとともに、絶縁膜の段差部分における1くびれ”を解
消することができることにより、絶縁膜上に配線を形成
する際の配線の断線および短絡を防止し、高歩留シ、高
信頼性の工Cを製造できるという効果を有する。
As described above, according to the present invention, the shape of the opening formed in the insulating film can be made into a shape having an ideal taper angle, and the "1 constriction" in the stepped part of the insulating film can be eliminated. This has the effect of preventing disconnection and short-circuiting of the wiring when forming the wiring on the insulating film, and making it possible to manufacture a high-yield, highly reliable process C.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図−(α)〜(1)は、本発明による絶縁膜に完孔
部分を形成する工程断面図。 第2図−(α)〜(’ g )は、従来技術による絶縁
膜に開孔部分を形成する工程断面図。 101.201・・・・・・第1の絶縁膜102.20
2・・・・・・第1の配線103.203・・・・・・
第2の絶縁膜104.204・・・・・・フォトレジス
ト105・・・・・・・・・・・・・・・・・・レジス
ト除失直後の開孔部分上端 105’、205・・・工程終了後の開孔部分上端10
6.206・・・・・・段差部分 部り口
FIGS. 1-(α) to (1) are cross-sectional views of the process of forming a complete hole portion in an insulating film according to the present invention. FIGS. 2-(α) to ('g) are sectional views illustrating the process of forming an opening in an insulating film according to the prior art. 101.201...First insulating film 102.20
2...First wiring 103.203...
Second insulating film 104, 204...Photoresist 105...... Upper end of opening portion 105', 205... immediately after resist removal・Upper end 10 of the opening after the process is completed
6.206...Step entrance

Claims (1)

【特許請求の範囲】[Claims] トランジスタ、ダイオード、または配線等が形成された
層の上に絶縁膜を形成する工程、前記絶縁膜上にフォト
レジストにより開孔パターンを形成する工程、前記フォ
トレジストをマスクとして前記絶縁膜をエッチングする
ことにより、前記絶縁膜の一部分に定められた深さの孔
を形成する工程、前記フォトレジストを除去する工程、
前記絶縁膜の全面をエッチングすることにより、前記絶
縁膜を薄くするとともに、前記絶縁膜の一部分に完全な
開孔部分を形成する工程とから成ることを特徴とする半
導体装置の製造方法。
A step of forming an insulating film on a layer in which transistors, diodes, wiring, etc. are formed, a step of forming an opening pattern with a photoresist on the insulating film, and etching the insulating film using the photoresist as a mask. forming a hole with a predetermined depth in a portion of the insulating film; removing the photoresist;
A method for manufacturing a semiconductor device, comprising the steps of etching the entire surface of the insulating film to make the insulating film thinner and forming a complete opening in a portion of the insulating film.
JP26816086A 1986-11-11 1986-11-11 Manufacture of semiconductor device Pending JPS63122125A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26816086A JPS63122125A (en) 1986-11-11 1986-11-11 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26816086A JPS63122125A (en) 1986-11-11 1986-11-11 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS63122125A true JPS63122125A (en) 1988-05-26

Family

ID=17454738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26816086A Pending JPS63122125A (en) 1986-11-11 1986-11-11 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS63122125A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100361279B1 (en) * 1999-12-31 2002-11-18 현대자동차주식회사 A fixing structure of radiator for vehicle
US7238609B2 (en) 2003-02-26 2007-07-03 Matsushita Electric Industrial Co., Ltd. Method for fabricating semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100361279B1 (en) * 1999-12-31 2002-11-18 현대자동차주식회사 A fixing structure of radiator for vehicle
US7238609B2 (en) 2003-02-26 2007-07-03 Matsushita Electric Industrial Co., Ltd. Method for fabricating semiconductor device

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