JPS63119596A - Circuit board and electronic equipment employing the same - Google Patents
Circuit board and electronic equipment employing the sameInfo
- Publication number
- JPS63119596A JPS63119596A JP26531086A JP26531086A JPS63119596A JP S63119596 A JPS63119596 A JP S63119596A JP 26531086 A JP26531086 A JP 26531086A JP 26531086 A JP26531086 A JP 26531086A JP S63119596 A JPS63119596 A JP S63119596A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- electrode connection
- conductive
- conductive path
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002093 peripheral effect Effects 0.000 claims 3
- 239000011521 glass Substances 0.000 description 18
- 230000035939 shock Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 5
- 229910000679 solder Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000002250 progressing effect Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000009863 impact test Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003449 preventive effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 201000009032 substance abuse Diseases 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は導電路が形成された回路基板及びこれを使用し
た電子装置を利用分野とし、特に熱衝撃鷲こよる導電路
の電気的断線の防止手段に関する。Detailed Description of the Invention (Industrial Field of Application) The field of the present invention is a circuit board on which a conductive path is formed and an electronic device using the same. Concerning preventive measures.
（発明の背景）
導電パターンが形成された回路基板は、例えば混成型Ｓ
積回路等の各電子部品等を配設し、所定の電子装置を形
成する。近年、電子装置は例えば熱帯から寒帯地方に至
るまで広範囲でしかもその間の移動をｌ！ＩＶ繁にした
温度変化の激しい環境のもとで使用される。このような
環境仕様を満足するに例えば気槽クイプや液槽タイプの
熱衝撃試験機が利用される。そして、これらの熱衝撃試
験機により温度条件を厳しく設定してこれに耐え得る熱
Ｆｊ撃性に優れた電子装置の開発が急務とされている。(Background of the Invention) A circuit board on which a conductive pattern is formed is, for example, a hybrid type S
Electronic components such as integrated circuits are arranged to form a predetermined electronic device. In recent years, electronic devices have been used in a wide range of areas, from the tropics to the frigid regions, and even in between! It is used in an environment with frequent temperature changes. To satisfy such environmental specifications, for example, an air tank quip or a liquid tank type thermal shock tester is used. There is an urgent need to develop electronic devices with excellent thermal Fj shock properties that can withstand the strict temperature conditions set by these thermal shock testers.
（従来技術）
第５図は電子装置の一部図で、回路基板に電子部品を配
設した図である。なお、第５図（ａ）は分解図、同図（
ｂ）は同図（ｎ）のａ −ａ ’断面図、同図（０）は
同図（ａ）の点線枠（ロ）で示す部分の拡大平面図であ
る。(Prior Art) FIG. 5 is a partial diagram of an electronic device, in which electronic components are arranged on a circuit board. In addition, Fig. 5(a) is an exploded view, and the same figure (
b) is a cross-sectional view taken along the line a-a' in FIG. 2(n), and FIG. 2(0) is an enlarged plan view of the portion indicated by the dotted line frame (b) in FIG. 4(a).
回路基板１は例えばアルミナセラミックに所定の導電パ
ターンを印刷形成してなる。この例では３本の導電路２
ａ、２ｂ、２ｃが所定の箇所に延出して形成される。各
導電路２ （ａＳｂ、ｃ）の延出した先端はその幅を大
きくして電極接続部３ａ、３ｂ、３Ｃが形成される。通
常では、電極接続部３ （ａ、ｂ、ｃ）を除く導電路２
（ａ、ｂ。The circuit board 1 is formed by printing a predetermined conductive pattern on, for example, alumina ceramic. In this example, three conductive paths 2
a, 2b, and 2c are formed extending at predetermined locations. The width of the extended tip of each conductive path 2 (aSb, c) is increased to form electrode connection portions 3a, 3b, and 3C. Normally, conductive path 2 excluding electrode connection portion 3 (a, b, c)
(a, b.
Ｃ）には回路基板面１の全面に延出してガラス４をコー
ティングし、耐湿性の向上と汚染からの防１Ｆ、を防止
１ノている。そ１７て、電子部品としての例えばミニモ
ールド型のトランジスタ５のベース、エミッタ、コレク
タの各端子部６ａ、６ｂ、６ｃを電極接続部３ （ａ、
ｂ、ｃ）に半田（７）付けにより電気的・機械的に接続
１７て回路基板上に配設している。C) is coated with glass 4 extending over the entire surface of the circuit board 1 to improve moisture resistance and prevent contamination. 17 Then, each terminal portion 6a, 6b, 6c of the base, emitter, and collector of a mini-mold type transistor 5 as an electronic component, for example, is connected to the electrode connection portion 3 (a,
b, c) are electrically and mechanically connected 17 by soldering (7) and disposed on the circuit board.
（従来技術の欠点及び原因）
しかしながら、このような構成の電子装置を前述した熱
衝撃試験機によす温度条件を例えば下限を一５５°Ｃ１
上限を＋１２５°Ｃとし、下限、から上限及びその逆の
急激な変化を１サイクルとして所定の回数例えば１００
回以上繰す返すと、各導電路２ （ａｓ ｂ％ Ｃ）の
コーティングされたガラス４ （以下、ガラスコートと
する）の符号ｐ−ｐ′で示す境界部分に亀裂を生ずる。(Disadvantages and Causes of Prior Art) However, the lower limit of the temperature conditions under which an electronic device having such a configuration is subjected to the above-mentioned thermal shock tester is, for example, 55°C1.
The upper limit is set to +125°C, and the rapid change from the lower limit to the upper limit and vice versa is defined as one cycle for a predetermined number of times, for example, 100.
If this process is repeated more than once, cracks will occur at the boundary portion of the coated glass 4 (hereinafter referred to as "glass coat") of each conductive path 2 (as b% C) indicated by the symbol pp'.
さらに衝撃試験を繰り返すと、電極接続部３ （ａ、ｂ
、ｃ）が半田７と一体的になって板面から剥離して完全
に分断し、電気的断線を招いて電子装置の動作を停止さ
せる問題があった。When the impact test is repeated further, the electrode connection part 3 (a, b
, c) becomes integral with the solder 7 and peels off from the board surface, causing complete separation, leading to electrical disconnection and stopping the operation of the electronic device.
そして、この問題の原因は、回路基板１と導電路２ （
ａ、ｂ、ｃ）及び半田７や端子部６（ａ、ｂ、ｃ）との
熱膨張係数の差により、接合強度が最も弱い回路基板１
と導電路２ （ａ、ｂ、ｃ）との接合面に外力が作用し
、特に導電路２（ａ、ｂｌＣ）の接合強度が損なわれる
ガラスコートとの境界部分に集中するためと考えられる
。The cause of this problem is the circuit board 1 and the conductive path 2 (
The circuit board 1 has the weakest bonding strength due to the difference in thermal expansion coefficient between the solder 7 and the terminal portion 6 (a, b, c).
This is thought to be because external force acts on the bonding surface between the conductive path 2 (a, b, c) and the conductive path 2 (a, blc), and is concentrated particularly at the boundary with the glass coat where the bonding strength of the conductive path 2 (a, blC) is impaired.
（発明の目的）
本発明の第１発明は熱衝撃による導電路の電気的断ｍを
防＋トシた回路基板を提供し、第２発明は第１発明の回
路基板を使用して熱衝撃性に優れた電子装置を提供する
ことを目的とする。(Objective of the Invention) The first invention of the present invention provides a circuit board that prevents electrical disconnection of conductive paths due to thermal shock, and the second invention provides a circuit board that prevents thermal shock by using the circuit board of the first invention. The aim is to provide excellent electronic devices for the world.
（発明の解決手段）
本発明の第１発明は、導電路の先端に設けた電極接続部
の外周表面に回路基板の板面に突出する絶縁層を形成し
て該絶縁層の電極接続部上の境界部分を非直線状とし、
第２発明では第１発明の回路基板を使用して前記電極接
続部の導電部に電子部品の端子部を接続したことを解決
手段とし、絶Ｎ層により電極接続部の変位を抑止する作
用がある。以下、本発明の詳細な説明する。(Means for Solving the Invention) The first aspect of the present invention is to form an insulating layer protruding onto the surface of the circuit board on the outer circumferential surface of the electrode connecting portion provided at the tip of the conductive path, so that the electrode connecting portion of the insulating layer is Let the boundary part of be non-linear,
The second invention uses the circuit board of the first invention to connect a terminal part of an electronic component to the conductive part of the electrode connection part, and the absolute N layer has the effect of suppressing displacement of the electrode connection part. be. The present invention will be explained in detail below.
（実施例）
第１図は本考案の実施例を説明する電子装置の一部図で
、同図（ａ）は回路基板に電子装置を配設置７た分解図
、同図（ｂ）は同図（ａ）のｂ−ｂ’断面図、同図（Ｃ
）は同図（ａ）の点線枠（イ）で示した部分の拡大平面
図である。なお、前述した図と同一部分には同番号を付
与して説明する。(Example) Figure 1 is a partial view of an electronic device to explain an example of the present invention. bb' sectional view of figure (a), figure (C
) is an enlarged plan view of the part indicated by the dotted line frame (a) in FIG. Note that the same parts as those in the above-mentioned figures are given the same numbers and explained.
回路基板１は、前述したように例えばアルミナセラミッ
クに所定の導電パターンを印刷形成してなる。例えば３
本の導１１＃ｉｚ （ａ、ｂｌｃ）が所定の箇所に延出
し、その先端に電極接続部３（ａｌｂ、 ｃ）が幅を大
％＜＋ノで形成される。そして、導電路２ （ａ、ｂ、
ｃ）の全面及び電極続部３（ａ Ｘｂ ％ ｃ ）の外
周に沿った全周にガラス４が回路基板１の全面に延出し
てコーティングされている。電子部品としてのミニモー
ルド型のトランジスタ５は、ベース、エミッタ、コレク
タの各端子部６ （ａ、ｂｌｃ）が電極接続部３ （ａ
、ｂ、Ｃ）の非コーテイング部分（即ち、導通部分８）
に半田（７）付けにより電気的・機械的に接続１７て回
路基板１に配設される。As described above, the circuit board 1 is formed by printing a predetermined conductive pattern on, for example, alumina ceramic. For example 3
The conductor 11#iz (a, blc) of the book extends to a predetermined location, and the electrode connection part 3 (alb, c) is formed at the tip thereof with a width of approximately %<+ノ. Then, the conductive path 2 (a, b,
The glass 4 extends over the entire surface of the circuit board 1 and is coated on the entire surface of the circuit board 1 (c) and the entire circumference along the outer periphery of the electrode connecting portion 3 (a Xb % c ). In the mini-molded transistor 5 as an electronic component, each terminal portion 6 (a, blc) of the base, emitter, and collector is connected to the electrode connection portion 3 (a
, b, C) non-coated parts (i.e. conductive parts 8)
It is electrically and mechanically connected 17 to the circuit board 1 by soldering (7).
従って、この構成の回路基板１では前述したような熱衝
撃による半田７や端子６ （ａ、ｂ、ｃ）及びトランジ
スタ本体の伸縮が接続電極３（ａ、ｂ、ｃ）に作用して
も、ガラスコートが接続電極３ （ａ、ｂ、ｃ）の接合
強度を高めるのでその変位を抑止して亀裂を防止する。Therefore, in the circuit board 1 having this configuration, even if the expansion and contraction of the solder 7, the terminals 6 (a, b, c) and the transistor body due to thermal shock as described above acts on the connection electrodes 3 (a, b, c), The glass coat increases the bonding strength of the connection electrodes 3 (a, b, c), suppressing their displacement and preventing cracks.
また、ガラスコートの境界部分は接続電極３（Ｅｌ、ｂ
、Ｃ）の方形状の外周全周としたので、接合強度を最も
高めろことができる。そ１ノで、その境界部分は屈曲し
て一直線ではない非直線なので、亀裂の進行を妨げろ。In addition, the boundary part of the glass coat is connected to the connection electrode 3 (El, b
, C), the entire outer periphery of the rectangular shape is used, so that the bonding strength can be maximized. First, the boundary part is curved and not a straight line, so prevent the crack from progressing.
従って、仮に方形状の一辺に亀裂が生（したとしても、
接続ｔ４極３（ａ、１ｂ、Ｃ）の四辺のうち何れかが導
通していればよいので電気的断線を免れる。Therefore, even if a crack occurs on one side of the rectangle,
Since any one of the four sides of the connection t4 poles 3 (a, 1b, C) needs to be electrically conductive, electrical disconnection can be avoided.
そして、この回路基板１を使用１７て電極接続部３ （
ａ、ｂ、ｃ）の導電部分に電子部品（例えばトランジス
ク５）の端子部６ （ａ、ｂ、ｃ）を電気的・機械的
に接続した電子装置では、導電Ｍｓ２（ａ、ｂ、ｃ）の
電気的断線や電極接続部３（ａｌｂ、 Ｃ）の剥離を防
止して熱衝撃性を良好にすることができろ。Then, using this circuit board 1 17, electrode connection portion 3 (
In an electronic device in which the terminal portion 6 (a, b, c) of an electronic component (for example, transistor 5) is electrically and mechanically connected to the conductive portion of a, b, c), the conductive Ms2 (a, b, c) Thermal shock resistance can be improved by preventing electrical disconnection and peeling of the electrode connection portions 3 (alb, C).
（他の実施例）
第２図は本発明の他の実施例を説明する図で、特に回路
基板の一電極接続部の拡大平面図である。(Other Embodiments) FIG. 2 is a diagram illustrating another embodiment of the present invention, particularly an enlarged plan view of one electrode connection portion of the circuit board.
なお、この実施例では前述した図と同一部分には同番号
を付与１ノその説明を省略する。In this embodiment, parts that are the same as those in the above-described figures are given the same numbers and their explanations will be omitted.
すなわち、この実施例では、接続ｆ４極例えば３ａの導
電路２ａの延出する辺とこれに隣接する辺の一方「第２
図（ａ）」あるいは両方［同図（ｂ）１の一部外周にガ
ラス４をコーティング１ノて回路基板面に突出させ、他
の外周はコーティングせず回路基板面を露出させた構成
としている。また、第２図（Ｃ）は、接続電極例えば２
ａから導電路の延出する辺の一部外周のみにガラス４を
コーティングしたもので、ガラスコートの境界部分は導
電路の延長方向の辺にのみガラスコートの境界部分を凹
凸状に屈曲して形成している。That is, in this embodiment, one of the extending sides of the conductive path 2a of the connection f4 pole 3a and one of the adjacent sides
Figure (a)'' or both [Figure (b) 1, a part of the outer periphery is coated with glass 4 to protrude from the circuit board surface, and the other outer periphery is not coated and the circuit board surface is exposed. . In addition, FIG. 2(C) shows connection electrodes such as 2
Glass 4 is coated only on a part of the outer periphery of the side where the conductive path extends from a, and the boundary portion of the glass coat is bent in an uneven shape only on the side in the direction in which the conductive path extends. is forming.
従って、これらの他の実施例では、前実施例に比較して
ガラスコートは接続電極３ａの一部外周のみなので回路
基板１に対する接合強度は低下するが、−直線状ではな
い非直線状の一部外周なので外力の作用を抑止して接合
強度を高め、亀裂の進行を妨げて電気的断線を防止する
。そして、この実施例では、前実施例に比較して接続電
極３ａの面積を小さくしても導電部を同じ大きさにでき
ろので、高密度実装タイプの回路パターンに適用できろ
。Therefore, in these other embodiments, compared to the previous embodiment, the glass coat is applied only to a part of the outer periphery of the connection electrode 3a, so the bonding strength to the circuit board 1 is reduced; Since it is on the outer periphery, it suppresses the action of external forces, increases joint strength, and prevents cracks from progressing to prevent electrical disconnection. In this embodiment, even if the area of the connection electrode 3a is reduced compared to the previous embodiment, the conductive portion can be made the same size, so it can be applied to a high-density mounting type circuit pattern.
（他の事項）
なお、各実施例にてガラスコートが施されない部分の外
周は回路基板面を露出させたが、例えばばせ第４図（ａ
）（ｂ）に第２図（ａ）（ｂ）（Ｄ対応と１７で示した
ように、その露出部分にガラスをコーチインクしてもよ
いことはいうまでもない。(Other matters) In each example, the circuit board surface was exposed on the outer periphery of the part where the glass coating was not applied.
)(b) and FIGS. 2(a) and 2(b) (corresponding to D and 17), it goes without saying that glass may be coated with coach ink on the exposed portion.
そして、上記実施例では導Ｔｉ路の先端に方形状の接続
電極を略Ｔ字状あるいはＬ字状に接続１）た形状の回路
基板について説明したが、接続電極は例えば円形、長円
形等でもよくこれらの形状に制限されることなく種々の
実施悪用があることはいうまでもないっまた、接続［極
以外の導電路及び回路基板にもガラスをコーティングし
て説明したが、本発明では電子部品の端子部が接続され
る電極接続部のみの接合強度が高めればばよいので、他
の導電路及び回路基板面にはガラスがコーティングされ
ずとも本発明の効果を奏する。また、接続電極の一部外
周にガラスをコーティングしたが、コーテイング材はガ
ラスに限らず他の絶縁体であってもよく、要は、接合強
度を高める絶縁体の境界部分が接続ｉ４極の一部外周に
非直線状に形成され回路基板に突出していれば本発明の
技術的な範囲に属する。In the above embodiment, a circuit board having a rectangular connection electrode connected to the tip of the conductive Ti path in a substantially T-shape or L-shape1) has been described, but the connection electrode may also be circular, oval, etc., for example. Needless to say, there are various implementations and abuses without being limited to these shapes.Also, although the conductive paths other than the electrodes and the circuit board were also coated with glass, in the present invention, the electronic Since it is only necessary to increase the bonding strength of only the electrode connection portion to which the terminal portion of the component is connected, the effects of the present invention can be achieved even if other conductive paths and the circuit board surface are not coated with glass. In addition, although a part of the outer periphery of the connection electrode is coated with glass, the coating material is not limited to glass and may be other insulators.The point is that the boundary part of the insulator that increases the bonding strength is located at one of the connection i4 poles. If it is formed in a non-linear shape on the outer periphery and protrudes from the circuit board, it falls within the technical scope of the present invention.
（発明の効果）
本発明は、導電路の先端に設けた電極接続部の外周表面
に回路基板の板面に突出する絶縁層を形成して該絶縁層
の電極接続部上の境界部分を非直線状と１ノ、さらに、
この回路基板を使用して前記電極接続部の導電部に電子
部品の端子部を接続したので、熱衝撃による導電路の電
気的断線を防＋ｈ１ノた回路基板及び熱衝撃性に優れた
電子装置を捷供できる。(Effects of the Invention) The present invention forms an insulating layer protruding onto the board surface of a circuit board on the outer circumferential surface of an electrode connecting portion provided at the tip of a conductive path, so that the boundary portion of the insulating layer above the electrode connecting portion is protected. Straight line and 1 no, furthermore,
Since this circuit board was used to connect the terminal part of the electronic component to the conductive part of the electrode connection part, the circuit board was able to prevent electrical disconnection of the conductive path due to thermal shock, and the electronic device had excellent thermal shock resistance. can be provided.
第１図は本発明の一実施例を説明する図で、同図（ａ）
は電子装置の一部の分解図、同図（ｂ）は同図（ｎ）の
ｂ−ｂ’断面図、同図（ｃ）同図（ｎ）の点線枠（イ）
で示す部分の拡大平面図である。
第２図（ａ）（ｂ）（ｃ）、第３図及び第４図（ａ）（
ｂ）は本発明の他の実施例を説明する回路基板の電極接
続部の一部の拡大平面図である。
第５図は従来の電子装置を説明する図で、同図（ａ）は
電子装置の一部の分解図、同図（ｂ）は同図（ａ）のａ
−ａ ’断面図、同図（ｅ）同図（ｂ）の点線枠（ロ
）で示す部分の拡大平面図である。
１・・回路基板、２・・・導電路、３・・・接続電極、
４・・・ガラス、５・・・トランジスタ、６・・・端子
部、７・・・半田、８・・・導電部。FIG. 1 is a diagram illustrating an embodiment of the present invention, and FIG.
is an exploded view of a part of the electronic device, (b) is a sectional view taken along line bb' in (n), (c) is a dotted line frame (a) in (n).
FIG. 3 is an enlarged plan view of the portion indicated by . Figure 2 (a) (b) (c), Figure 3 and Figure 4 (a) (
b) is an enlarged plan view of a part of the electrode connection portion of the circuit board explaining another embodiment of the present invention. FIG. 5 is a diagram explaining a conventional electronic device, in which (a) is an exploded view of a part of the electronic device, and (b) is a diagram showing a part of the electronic device.
-a' sectional view, FIG. 1... Circuit board, 2... Conductive path, 3... Connection electrode,
4... Glass, 5... Transistor, 6... Terminal part, 7... Solder, 8... Conductive part.
Claims (3)
が形成された回路基板において、前記電極接続部の外周
表面に前記回路基板の板面に突出する絶縁層を形成し、
該絶縁層の電極接続部上の境界部分を一直線状ではない
非直線状としたことを特徴とする回路基板。(1) In a circuit board on which a conductive pattern having an electrode connection part is formed at the tip of a conductive path, an insulating layer protruding from the board surface of the circuit board is formed on the outer peripheral surface of the electrode connection part,
A circuit board characterized in that the boundary portion of the insulating layer above the electrode connection portion is not linear but non-linear.
る第１項記載の回路基板。(2) The circuit board according to item 1, wherein the outer peripheral surface of the electrode connection portion is the entire outer peripheral surface.
を設けて電子部品のリード部を電気的・機械的に接続し
た電子装置において、前記電極接続部の外周表面に前記
回路基板の板面に突出する絶縁層を形成し、該絶縁層の
電極接続部上の境界部分を一直線状ではない非直線状と
し、該電極接続部の導電部に電子部品のリード部を電気
的・機械的に接続したことを特徴とする電子装置。(3) In an electronic device in which an electrode connection part is provided at the tip of a conductive path formed on a circuit board to electrically and mechanically connect a lead part of an electronic component, the outer circumferential surface of the electrode connection part is connected to the circuit board. An insulating layer protruding from the plate surface is formed, and the boundary portion of the insulating layer above the electrode connection portion is not straight but a non-linear shape, and the lead portion of the electronic component is electrically or mechanically connected to the conductive portion of the electrode connection portion. An electronic device characterized in that it is connected to
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26531086A JPS63119596A (en) | 1986-11-07 | 1986-11-07 | Circuit board and electronic equipment employing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26531086A JPS63119596A (en) | 1986-11-07 | 1986-11-07 | Circuit board and electronic equipment employing the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63119596A true JPS63119596A (en) | 1988-05-24 |
Family
ID=17415421
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26531086A Pending JPS63119596A (en) | 1986-11-07 | 1986-11-07 | Circuit board and electronic equipment employing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63119596A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0396294A (en) * | 1989-09-08 | 1991-04-22 | Hokuriku Electric Ind Co Ltd | Electronic component |
| JPH0425269U (en) * | 1990-06-21 | 1992-02-28 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS567494A (en) * | 1979-07-02 | 1981-01-26 | Hitachi Ltd | Printed circuit board |
-
1986
- 1986-11-07 JP JP26531086A patent/JPS63119596A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS567494A (en) * | 1979-07-02 | 1981-01-26 | Hitachi Ltd | Printed circuit board |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0396294A (en) * | 1989-09-08 | 1991-04-22 | Hokuriku Electric Ind Co Ltd | Electronic component |
| JPH0425269U (en) * | 1990-06-21 | 1992-02-28 |
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