JPS63118940A - Data processor - Google Patents

Abstract

PURPOSE:To efficiently perform a shift operation, by performing the shift operation for a list data expressed in a list form by using a barrel shift circuit and an adder circuit. CONSTITUTION:The list data outputted selectively at an input selection circuit 21 is separated to an address part which represents the node position of the list data, and a value part which represents reference to a data value. And the data Ad of the address part is inputted to the barrel shift circuit 22, and the data VD of the value part becomes a part of the output RD of a shift device 3 as it is. Furthermore, the data AD inputted to the circuit 22 is outputted after being shifted in a right and a left directions corresponding to a shift selection signal SHC, however, the forefront value of the data AD is added/subtracted by 1 at the adder circuit 23 at the time of CDR shift and RCDR shift, then, it is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a data processing device mainly intended for use in the field of artificial intelligence.

BACKGROUND OF THE INVENTION In recent years, the field of artificial intelligence has been actively researched as one of computer applications. In this field, it is necessary to process structured data, and therefore LTSP, a language that can handle structured data, is widely used. Since it is inefficient to execute the LISP language on a general-purpose computer, special-purpose machines with various improvements have been developed.

(For example, rLIsP machine” Information processing vol. 1.23
No. 8 pp752-772).

These dedicated machines were mainly approached from a linguistic perspective, and the typical improvements made are shown below. Primitive functions such as +IICAR and CDR are executed at the microprogram level. (2) Data format with TAG is used to handle generic data types. (3)
A hardware control stack is provided to speed up stack processing.

However, although improvements have been made to the execution system of the language mentioned above, the basic representation of structure data inside a computer is to express the order relationship and connection method of elements using pointers (hereinafter referred to as lists). The following problems occurred because of the use of (1) Access to any element requires going through a list, which is inefficient.

(2) List matching is inefficient because it involves a list decomposition operation. (3) Garbage collection is difficult. (4) Locality of memory references is poor and cache hint rate decreases. Additionally, since it basically uses a shared structure, the following problems arose. 151 RPLACA.

Direct list operations such as in RPLACD cause unexpected side effects such as secretly changing other data. (6) It is difficult to lock variables during parallel processing. On the other hand, in order to solve these problems, attempts have been made to basically change the expression of list data.

Generally, a binary tree list starts from a starting node and branches left and right sequentially, with each branch ending at a leaf node. There are two types of leaf nodes: atom nodes and NIL nodes. Nodes that are not leaf nodes are list nodes that indicate that the branch is continuing. This list node is used to indirectly indicate the position of the leaf node.

In the pointer representation, this structural representation is expressed as is by cells in which all nodes are connected by addresses.

However, if the positions of leaf nodes can be directly determined, there is no need to have list node information.

Therefore, equivalent first data can be expressed by a table in which leaf position information and leaf information are sequentially arranged. A one-dimensional vector representation has been proposed as a method for expressing leaf node positions, in which numbers are sequentially assigned in the CDR direction and items are sequentially assigned in the CAR direction.

(For example, "High-speed matching method for structured data" Information Processing Society of Japan 33rd National Conference 7D-2) Therefore, list data is a set of data that includes vectors indicating leaf position information and information about the leaf itself. expressed.

FIG. 3 shows an example of list data representation. This is a graphical representation f8+ of list data that becomes (A (B (C)) D) when expressed in formula 5, and a tabular representation (bl). In the diagrammatic representation, circles indicate list nodes. The squares in the table indicate leaf nodes.The number strings added above each node indicate the node positions expressed according to the method described above.This leaf part is extracted and displayed. The one expressed in the form of a tabular expression mountain)
, the node position vector is in the ADDRESS part,
It consists of a table with leaf elements in the VALUE section.

When a list is represented in such a tabular format, many of the drawbacks of pointer representation can be avoided, but the arithmetic system is naturally different from that of conventional pointer representation.

FIG. 4 shows an example of a behind-the-scenes operation in the basic list operation function of LISP.

As is clear from Figure 4, the CAR function extracts the element with the first 1 in the ADIlRESS part, and
This can be performed by shifting the ESS toward the beginning (hereinafter referred to as CAR shift). The CDR function is the opposite of the CAR function, by removing the element with the first ADDRESS of 1 and subtracting 1 from the first ADDRESS of the remaining elements (hereinafter referred to as CDR shift).
executed.

The C0N5 function is a little more complicated.

First, regarding the first argument of the C0N5 function, ADDRESS
Shift the section in the opposite direction to the beginning, and add the beginning ADDRE.
Let SS be 1. This is an operation opposite to the above-mentioned CAR shift, and is hereinafter referred to as RCAR shift. For the second argument, 1 is added to the first ADDRESS (hereinafter this will be referred to as RCDR shift for the same reason as RCAR). Next, the C0N5 function is executed by combining these two arguments into one table.

Problems to be Solved by the Invention However, in the above configuration, CAR and CDR can be performed extremely easily using pointer representation.

Since LTSP basic functions such as C0N5 require calculations for all elements in table format, there has been a problem in that the performance for list data processing is poor.

In view of the above problems, the present invention provides a data processing device that has a simple configuration and can efficiently process list data in a tabular format.

Means for Solving the Problems In order to solve the above problems, the data processing device of the present invention uses list data in a tabular format configured with an ADDRESS section indicating the position of a node and a VALUE section indicating a reference to a data value. a memory device to store the data as data, a register device to store the elements of the tabular data, data to be transferred from the memory device, and data to be backed up from the register device. and a barrel shift circuit that shifts the ADDRESS section data of the data outputted from the input selection circuit in the horizontal direction; and a barrel shift circuit that is connected to the output of the barrel shift circuit and increases or decreases the leading value of the ADDRESS section data by 1. The shift device is comprised of an adder circuit.

Effect: With the above-described configuration, the present invention can efficiently implement operations on list data in table format, such as operations on the above-mentioned CAR shift, CDR shift, RCAR shift, and RCDRCD, using a barrel shift circuit and an addition circuit. .

Embodiment Hereinafter, a data processing apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of a data processing device in an embodiment of the present invention.

In FIG. 1, 1 is a memory device, 2 is a transfer device, 3 is a shift device, and 4 is a register device. FIG. 2 shows the internal structure of the shift device in the above embodiment.

In FIG. 2, 21 is an input selection circuit, 22 is a barrel shift circuit, and 23 is an adder circuit.

The operation of the data processing apparatus configured as described above will be explained below with reference to FIGS. 1 and 2.

In FIG. 1, when data stored in a memory device 1 or stored in a memory device 1 is to be processed, it is transferred by a transfer device 2 to a register device 4 through a shift device 3.

In FIG. 2, the input selection circuit 21 switches and outputs transfer data from the memory device 1 and feed-hacked data from the register device 4 using a selection signal SEL. ! In the case of a register operation, the AI signal is output. Input selection circuit 2
The data output from 1 is the ADDRESS section and VALU.
The ADDRESS part data AD becomes the input of the barrel shift circuit 22, while the VALUE part data VD becomes part of the output RD of the shift device 3 as it is.

The barrel shift circuit is a circuit that shifts data in the ADDRESS section in the left-right direction, and is controlled by a shift selection signal SHC. During CAR shift, the shift is towards the beginning as described above, but in this case, the last address is O
enters.

Conversely, during RCAR shift, 0 is entered at the beginning.

On CDR shift and RCDRCD, it is not a so-called shift operation, but an operation that increases or decreases the leading value of the ADDRESS part by 1, so it is not shifted by the barrel shift circuit,
This processing is performed in an adder circuit 23 connected to its output and controlled by an adder control signal AC.

As described above, according to this embodiment, there is provided a memory device that stores list data as tabular data including an ADDRESS section indicating the position of a node and a VALUE section indicating a reference to a data value; an input selection circuit that selects and outputs data transferred from the memory device and data fed back from the register device; and an ADDRESS section for data output from the input selection circuit. By providing a shift device consisting of a barrel shift circuit that shifts data in the horizontal direction and an adder circuit that is connected to the output of the barrel shift circuit and increases or decreases the leading value of the ADDRESS section data by 1, the data can be expressed in a table format. Shift processing of list data can be performed efficiently.

Effects of the Invention As described above, the present invention provides a memory device for storing first data as tabular data constituted by an ADDRESS section indicating a node position and a VALUE section indicating a reference to a data value, and a memory device for storing first data as tabular data. a register device that stores elements; an input selection circuit that selects and outputs data transferred from the memory device and data fed back from the register device; and ADDRESS part data of the data output from the input selection circuit. By providing a shift device consisting of a barrel shift circuit that shifts the data in the horizontal direction and an adder circuit that is connected to the output of the barrel shift circuit and increases or decreases the leading value of the ADDRESS part data by 1, the data can be expressed in a tabular format. It becomes possible to perform shift processing of list data efficiently.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a data processing device according to an embodiment of the present invention, FIG. 2 is an internal block diagram of the shift device shown in FIG. 1, and FIG.
The figure shows an example of a tabular representation of list data, and FIG. 4 is a diagram showing an example of behind-the-scenes operations in the basic list operation functions of LISP. l...Memory device, 2...Transfer device,
3...Shift device, 4...Register device, 21...Input selection circuit, 22...
Barrel shift device, 23...addition circuit. Name of agent: Patent attorney Toshio Nakao (1 person) Figure 3 (A (Japanese (C)) D) Figure 4

Claims (1)

[Scope of Claims] A memory device that stores list data as tabular data consisting of an ADDRESS section that indicates the position of a node and a VALUE section that indicates a reference to a data value, and a memory device that stores elements of the tabular data. a register device, an input selection circuit that selects and outputs data transferred from the memory device and data fed back from the register device, and an ADDRESS portion of data output from the input selection circuit in the left and right direction; connected to the barrel shift circuit to be shifted and the output of said barrel shift circuit;
1. A data processing device comprising: a shift device constituted by an adder circuit that increases or decreases a leading value of DDRESS part data by 1, and performs shift processing of list data expressed in a tabular format.