JPS6311742Y2 - - Google Patents
Info
- Publication number
- JPS6311742Y2 JPS6311742Y2 JP1981092723U JP9272381U JPS6311742Y2 JP S6311742 Y2 JPS6311742 Y2 JP S6311742Y2 JP 1981092723 U JP1981092723 U JP 1981092723U JP 9272381 U JP9272381 U JP 9272381U JP S6311742 Y2 JPS6311742 Y2 JP S6311742Y2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- pellets
- inner peripheral
- peripheral edge
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981092723U JPS6311742Y2 (enrdf_load_stackoverflow) | 1981-06-22 | 1981-06-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981092723U JPS6311742Y2 (enrdf_load_stackoverflow) | 1981-06-22 | 1981-06-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57203562U JPS57203562U (enrdf_load_stackoverflow) | 1982-12-24 |
| JPS6311742Y2 true JPS6311742Y2 (enrdf_load_stackoverflow) | 1988-04-05 |
Family
ID=29887738
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1981092723U Expired JPS6311742Y2 (enrdf_load_stackoverflow) | 1981-06-22 | 1981-06-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6311742Y2 (enrdf_load_stackoverflow) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5324780A (en) * | 1976-08-20 | 1978-03-07 | Hitachi Ltd | Lead frame |
| JPS5399962U (enrdf_load_stackoverflow) * | 1977-01-14 | 1978-08-12 | ||
| JPS5426359U (enrdf_load_stackoverflow) * | 1977-07-25 | 1979-02-21 |
-
1981
- 1981-06-22 JP JP1981092723U patent/JPS6311742Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57203562U (enrdf_load_stackoverflow) | 1982-12-24 |
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