JPS63115A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS63115A
JPS63115A JP14322486A JP14322486A JPS63115A JP S63115 A JPS63115 A JP S63115A JP 14322486 A JP14322486 A JP 14322486A JP 14322486 A JP14322486 A JP 14322486A JP S63115 A JPS63115 A JP S63115A
Authority
JP
Japan
Prior art keywords
contact hole
aluminum
junction
titanium silicide
nitrogen ions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14322486A
Other languages
Japanese (ja)
Inventor
Takehito Yoshida
岳人 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP14322486A priority Critical patent/JPS63115A/en
Publication of JPS63115A publication Critical patent/JPS63115A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable the formation of an aluminum contact attaining a high barrier effect and the reduced impurity mixture by performing the low-energy irradiation of nitrogen ions and lamp annealing in a vacuum after opening the contact hole. CONSTITUTION:A specific resistance of an Si substrate (100)1 is 1-1.5OMEGA.cm if lt is N-type or 10-15OMEGA.cm if it is P-type. An oxide film 2 is formed for element isolation and a junction (junction plane 4) backed with a titanium silicide layer 3 of about 100 nm thickness is formed in an active diffusion region. As an interlaminar insulating film 5, a silicon oxide film is deposited by a CVD technique and a contact hole 6 is opened. By using the interlaminar insulating film 5 as a mask, the lowenergy irradiation with nitrogen ions 7 is performed. Next, a heat treatment using a vacuum lamp annealer comprising a chamber capable of exhaust down to 10<-1> Pa or under is effected to make the titanium silicide of the contact hole 6 nitride by self alignment and to form titanium nitride 8. Right after a wet process using an HF + H2O2 solution, an aluminum thin film is deposited by spattering and it is patterned. An aluminum wiring 9 is formed, followed by sintering heat treatment.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は高集積度、高信頼性の半導体集積回路の製造方
法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a highly integrated and highly reliable semiconductor integrated circuit.

従来の技術 半導体集積回路の高密度化に伴って構成要素であるMO
S)ランジスタも縮小化されるが、かかる装置において
は深さ方向の、縮小化も実施しなくては正常なトランジ
スタ動作を維持することはできない。このような半導体
装置の浅い接合に対してアルミ配線のコンタクトを形成
すると、シンター時にアルミとシリコンの合金が接合を
突き抜けることがある(アロイスパイク)。このタイプ
の不良を防止する方法として、(1)接合面の上層全体
をシリサイド化する方法、(2)コンタクトホールを形
成した後反応性スパッタ法によりTiNを堆積しこれを
拡散バリアとする方法、(3)チタンシリサイド化接合
に対しコンタクトホールを形成した後窒素雰囲気中で熱
処理することにより自己整合的に窒化チタンを形成し、
これを拡散バリアとする方法口例えばH,Kaneko
 et al、 : IEDM (アイイー デーエム
)(1985)P、208)、などがある。
Conventional technologyAs the density of semiconductor integrated circuits increases, MO, which is a component
S) Transistors are also being reduced in size, but in such a device, normal transistor operation cannot be maintained unless reduction is also performed in the depth direction. When an aluminum wiring contact is formed to a shallow junction in such a semiconductor device, an alloy of aluminum and silicon may penetrate the junction during sintering (alloy spike). Methods for preventing this type of defect include (1) a method of siliciding the entire upper layer of the junction surface, (2) a method of depositing TiN by reactive sputtering after forming a contact hole and using it as a diffusion barrier; (3) Forming titanium nitride in a self-aligned manner by forming a contact hole for the titanium silicided junction and then heat-treating it in a nitrogen atmosphere;
How to use this as a diffusion barrier For example, H. Kaneko
et al.: IEDM (1985) P, 208).

発明が解決しようとする問題点 接合層全体をシリサイド化しこれをアロイスパイクに対
するバリアメタルとする場合はバリア効果が不充分なこ
とがある。特(c高融点金属シリサイド中段も比抵抗の
低いチタンシリサイドを用いたときこの傾向がある。ま
たコンタクトホールを形成璧た後バリア層を全面に堆積
する方法ではこのバリア層をパターニングする工程を追
加しなくてはならない。さらにチタンシリサイド化接合
にコンタクトホールを開けた後、自己整合的に窒化チタ
ンを形成する方法も窒素ガスの流入状態の変動や不純物
の混入があると信頼性の高いコンタクトを得ることが難
しくなる。
Problems to be Solved by the Invention When the entire bonding layer is silicided and used as a barrier metal for alloy spikes, the barrier effect may be insufficient. In particular, this tendency occurs when titanium silicide, which has a low resistivity, is used in the middle layer of high-melting point metal silicide.Also, in the method of depositing a barrier layer on the entire surface after forming a contact hole, a step of patterning this barrier layer is added. In addition, the method of forming titanium nitride in a self-aligned manner after opening a contact hole in a titanium silicide junction may result in a highly reliable contact due to fluctuations in the nitrogen gas flow state or contamination of impurities. becomes difficult to obtain.

本発明はかかる点に鑑みてなされたもので、バリア効果
が高く、信頼性も充分なアルミ/チタンシリサイド化接
合のコンタクトを自己整合的に形成することを目的とし
ている。
The present invention has been made in view of these points, and an object of the present invention is to form an aluminum/titanium silicide junction contact in a self-aligned manner with a high barrier effect and sufficient reliability.

問題点を解決するための手段 本発明は上記問題点を解決するため、コンタクトホール
開孔径窒素イオンを低エネルギー照射し、真空中におい
てランプアニールすることにより、チタンシリサイド化
接合上のコンタクトホールに自己整合的に窒化チタンを
形成するものである。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention irradiates nitrogen ions with low energy to the contact hole aperture and performs lamp annealing in a vacuum, thereby forming a contact hole on the titanium silicide junction. Titanium nitride is formed in a consistent manner.

作  用 本発明は上記した方法により、0)不純物の混入が少な
く、(2)アルミの接合突き抜けに対するバリア効果が
高い窒化チタン層をチタンシリサイド化接合に対するコ
ンタクトホール上に自己整合的に得ることができる。
Effect of the Invention The present invention makes it possible to obtain a titanium nitride layer in a self-aligned manner over a contact hole for a titanium silicided junction by using the above-described method. can.

実施例 第1図〜第4図は本発明の一実施例を示す工程断面図で
ある。第1図において1はシリコン基板100で比抵抗
はn型なら1〜1.6Ω・cm1p型なら10〜15Ω
・口 とする。2は素子間分離用に形成された酸化膜で
ある。活性拡散領域は約1oOnmの厚さのチタンシリ
サイド層3で裏打ちされた接合(接合面4)が形成され
ている。層間絶縁膜6としてCVD法によりシリコン酸
化膜を堆積し、コンタクトホール6を開孔する。この層
間絶縁膜Sをマスクとして窒素イオン7を低エネルギー
照射する(第2図)。このとき照射された窒素イオンの
飛程RPがチタンシリサイド層3中に充分収まるように
する。
Embodiment FIGS. 1 to 4 are process sectional views showing an embodiment of the present invention. In Figure 1, 1 is a silicon substrate 100, and the specific resistance is 1 to 1.6 Ω for n type and 10 to 15 Ω for p type.
・Mouth. 2 is an oxide film formed for isolation between elements. A junction (junction surface 4) lined with a titanium silicide layer 3 having a thickness of about 10Onm is formed in the active diffusion region. A silicon oxide film is deposited as an interlayer insulating film 6 by the CVD method, and a contact hole 6 is formed. Using this interlayer insulating film S as a mask, nitrogen ions 7 are irradiated with low energy (FIG. 2). At this time, the range RP of the irradiated nitrogen ions is made to be sufficiently within the titanium silicide layer 3.

次に1oPa以下まで排気可能なチャンバー?もつ真空
ランプアニーラ−によって熱処理することにより、コン
タクトホール6のチタンシリサイドを自己整合的に窒化
し窒化チタン8を形成する(第3図)。HF + H2
02溶液により湿式処理した直後、アルミ薄膜をスパッ
タリング法により堆積し、パターニングしアルミ配線9
を形成する(第4図)。最後にシンタリング熱処理を行
い、アルミ配線と接合のオーミックコンタクトラ完成す
る。
Next, a chamber that can be evacuated to below 1oPa? By heat treatment using a vacuum lamp annealer, the titanium silicide in the contact hole 6 is nitrided in a self-aligned manner to form titanium nitride 8 (FIG. 3). HF + H2
Immediately after wet treatment with 02 solution, a thin aluminum film was deposited by sputtering and patterned to form aluminum wiring 9.
(Figure 4). Finally, sintering heat treatment is performed to complete the aluminum wiring and ohmic contacts.

発明の効果 以上本発明は、半導体装置の゛微細化に伴い、浅いチタ
ンシリサイド化接合に対し拡散ベリア効果が高くかつ不
純物の混入が少ないアルミコンタクトの形成を可能にす
るものであり、超微細な半導体装置の製造に大きく寄与
するものである。
Effects of the Invention With the miniaturization of semiconductor devices, the present invention enables the formation of an aluminum contact with a high diffusion barrier effect and less contamination of impurities for shallow titanium silicide junctions, and is capable of forming ultra-fine aluminum contacts. This greatly contributes to the manufacture of semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第4図は本発明の一実施例における半導体装置
の製造方法を説明するための断面図である。 1・・・・・・シリコン基板、2・・・・・・素子間分
離用シリコン酸化膜、3・・・・・・チタンシリサイド
層、4・・印・pn接合面、6・・・・・・層間絶縁膜
、8・・川・窒化チタン層、9・・・・・・アルミ配線
。 区         区            区−
G]               曽悸 城                       派
区  リ゛ゞ \r 惺
1 to 4 are cross-sectional views for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Silicon substrate, 2...Silicon oxide film for isolation between elements, 3...Titanium silicide layer, 4...Mark pn junction surface, 6... ...Interlayer insulating film, 8...Titanium nitride layer, 9...Aluminum wiring. Ward Ward Ward−
G] Zeng Yujo sect RI゛ゞ\r 惺

Claims (1)

【特許請求の範囲】[Claims] チタンシリサイド化接合とアルミ配線のコンタクトを形
成するに際し、コンタクトホールを開けたた時点で窒素
イオンを低エネルギーで照射した後真空中でランプアニ
ールすることによりコンタクト部に自己整合的に拡散バ
リア層としてのチタン窒化膜を形成することを特徴とす
る半導体装置の製造方法。
When forming a contact between a titanium silicide bond and an aluminum wiring, when a contact hole is opened, nitrogen ions are irradiated with low energy and then lamp annealed in a vacuum to form a diffusion barrier layer in a self-aligned manner at the contact area. A method for manufacturing a semiconductor device, comprising forming a titanium nitride film.
JP14322486A 1986-06-19 1986-06-19 Manufacture of semiconductor device Pending JPS63115A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14322486A JPS63115A (en) 1986-06-19 1986-06-19 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14322486A JPS63115A (en) 1986-06-19 1986-06-19 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS63115A true JPS63115A (en) 1988-01-05

Family

ID=15333779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14322486A Pending JPS63115A (en) 1986-06-19 1986-06-19 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS63115A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6583052B2 (en) 2001-09-05 2003-06-24 Hynix Semiconductor Inc. Method of fabricating a semiconductor device having reduced contact resistance

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6583052B2 (en) 2001-09-05 2003-06-24 Hynix Semiconductor Inc. Method of fabricating a semiconductor device having reduced contact resistance

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