JPH06196693A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form the fine contact of low resistance-low junction leakage currents in a large-scale integrated circuit. CONSTITUTION:A C54 crystal-structure titanium disilicide layer 9 is formed selectively while being brought into contact with a high-concentration diffusion layer 3 in a contact bottom, and a titanium nitride layer 6 is formed directly. Consequently, no volume of TiSi 2 changes in a heat treatment process after the C54 crystal-structure titanium disilicide layer (TiSi2) is shaped, thus generating no void in a TiN layer in an upper layer. Accordingly, a semiconductor device, in which the P-N junction characteristics of the lower section of a contact are improved in ohmic low contact resistance in the formation of the fine contact in the semiconductor device, can be provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having highly integrated, highly reliable and highly integrated wiring.

[0002]

2. Description of the Related Art With the high integration of semiconductor integrated circuits, the active high-concentration diffusion layer (for example, the source / drain region in a MOS transistor or the emitter / base region in a bipolar transistor), which is a constituent of the semiconductor integrated circuit, has a pn As the junction depth becomes shallower, the contact interface portion (contact portion) with the metal wiring is also reduced. In such a semiconductor device, the purpose is to keep the electrical resistance (contact resistance) at this interface at ohmic and low resistance. , It is essential to provide an intermediate layer (barrier metal) between the metal wiring layer and the high-concentration diffusion layer on the silicon substrate in order to suppress the diffusion of the metal element forming the metal wiring layer into the silicon substrate. Will be. This is also the case when forming contacts with electrodes or resistors made of polycrystalline silicon. For example, when an Al-Si-Cu alloy is used as the metal wiring layer, a titanium nitride thin film (TiN) can be used as the barrier metal. This titanium nitride thin film has a thickness of 500 depending on the forming method.
It has an extremely effective barrier property that can suppress the diffusion of Al and Cu into the silicon substrate even in heat treatment at ℃. This is described, for example, in Journal of Vacuum Science and Technology 21 (1982), pages 14 to 18 (J. Vac. Sci. Technol., 21 (1982) pp14-18).
Has been reported to. However, since the contact resistance of the titanium nitride barrier metal is high, especially on the p + diffusion layer, a metal titanium (Ti) layer is added between the titanium nitride layer and the silicon substrate high-concentration diffusion layer in order to reduce the resistance. Is essential. This is, for example, Thin Solid Films 96 (1982).
Pages 327-345 (Thin Solid Films, 96 (19
82) pp327-345).

In order to further reduce the contact resistance to the p + diffusion layer, this TiN / Ti laminated wiring is kept at 600 ° C. or higher 850
There is a method of heat treatment at a temperature of ℃ or less. By this heat treatment, crystalline titanium disilicide is formed at the Ti / silicon substrate interface, and the height of the Schottky barrier for p-type silicon is further lowered, so that the ohmic contact resistance for the p + diffusion layer is also lowered (for example, the journal of・ Applied Physics 70 (19
91) pp. 827-832 (J. Appl. Phys., 7
0 (1991) pp827-832)). Furthermore, it has been reported that this method of crystalline titanium disilicide is extremely effective for improving the reliability of the n + -p junction under the contact.
For example, International Reliabilty Physics Symposium (1992), pages 344 to 3
Page 48 (Int. Reliability Physics Symposium (1992) p
p344-348).

FIG. 2 is a process sectional view of a conventional method for forming an ohmic contact by combining the above methods. The silicon thermal oxide film pattern as the element isolation insulating film 2 and n
When the high-concentration diffusion layer 3 is formed on the silicon substrate 1 with the plane orientation (100) in which the mold well region is formed, if this is an n + diffusion layer, arsenic (As) is introduced by the ion implantation method. . In the case of the p + diffusion layer, boron fluoride (BF2) was ion-implanted into the n-type well region. Next, after depositing an interlayer insulating film 4 made of a silicon oxide film by a CVD method, heat treatment is performed at 900 ° C. for 30 minutes in a nitrogen atmosphere to form a high-concentration diffusion layer 3 with a diffusion depth of about 0.2 μm and n + diffusion. Layer and a p + diffusion layer with a diffusion depth of about 0.25 micron is formed. A contact hole penetrating to the high-concentration diffusion layer 3 is opened in the interlayer insulating film 4 by a dry etching method, and immediately after cleaning by a wet method and removal of the silicon natural oxide film are performed, a metal titanium layer 8 (30 (nm) and a titanium nitride layer 6 (100 nm) are formed by a sputter continuous deposition method. However, the titanium nitride layer 6 was formed by the reactive sputtering method. At this time, the metal titanium layer 8 is arranged as a lower layer and is in direct contact with the high concentration diffusion layer 3 (FIG. 2 (a)). Next, in an electric furnace in a nitrogen atmosphere 800-
By heat treatment at 850 ° C. for 5 minutes, the metal titanium layer 8 in contact with the high-concentration diffusion layer 3 at the contact bottom has a C54 crystal structure titanium disilicide 5 with a thickness of about 50 nm.
Phase transition to. This C54 crystal structure titanium disilicide 5 is the most thermodynamically stable phase of titanium silicide, and since the Schottky barrier height to p-type silicon is as low as 0.57 eV, it forms a low resistance ohmic contact. Is the most suitable conductive material (Fig. 2 (b)). After that, an Al-Si-Cu metal wiring layer 7 having a thickness of 700 nm is formed on the titanium nitride layer 6 by a sputter deposition method, and a photoresist pattern is formed by an ordinary photolithography method, and Al-Si-Cu metal wiring is formed. Layer 7 (700 n
m), a titanium nitride layer 6 (100 nm) and a metal titanium layer 8 (30 nm) are subjected to dry etching to form a laminated metal wiring layer (FIG. 2 (c)). Finally, heat treatment is performed at 450 ° C for 15 minutes in a mixed gas of hydrogen and nitrogen to complete ohmic contact.

[0005]

However, in the above method, during the heat treatment at 600 ° C. or higher and 850 ° C. or lower, the initial Ti layer undergoes a phase transition to crystalline titanium disilicide under the TiN layer (800 ° C.). In the above, since there is a volume change in the process of C54 crystal structure titanium disilicide), voids 10 may be generated in the upper TiN layer. This situation is as shown in Fig. 2 (b) (c). This is a phenomenon that the barrier property in the TiN layer is significantly impaired.
This causes diffusion of Al or Cu, which is an element forming the metal wiring layer formed on the iN layer, into the silicon substrate. This causes deterioration of the characteristics of the pn junction under the contact. The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device having a low resistance ohmic contact and good pn junction characteristics of the contact lower part in forming a fine contact in the semiconductor device. .

[0006]

In order to solve the above problems, the present invention selectively forms a C54 crystal structure titanium disilicide layer at the bottom of a contact in contact with a high-concentration diffusion layer, and then forms a titanium nitride layer. It is configured to do.

[0007]

With the above-described structure, the present invention makes it possible to manufacture a semiconductor device which is a low resistance ohmic contact in the formation of a fine contact in a semiconductor device and which maintains good pn junction characteristics under the contact.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view showing steps of forming an ohmic contact structure of a semiconductor device according to one embodiment of the present invention. When the high-concentration diffusion layer 3 is formed on the silicon substrate 1 having the plane orientation (100) in which the silicon thermal oxide film pattern as the element isolation insulating film 2 and the n-type well region are formed, this is the n + diffusion layer. In the case, arsenic (As) is introduced by the ion implantation method. Injection conditions are dose 5X1015 / cm
2. Energy was 80 keV. For p + diffusion layer, boron fluoride (BF2) dose 3X1015 / cm2, energy 40 k
Ions were implanted into the n-type region under the condition of eV. Next, after depositing an interlayer insulating film 4 made of a silicon oxide film of 700 nm by a CVD method, heat treatment is performed at 900 ° C. for 30 minutes in a nitrogen atmosphere to form a high-concentration diffusion layer 3 with a diffusion depth of 0.22 μm.
An n + diffusion layer and a p + diffusion layer with a diffusion depth of 0.28 microns are formed. A contact hole penetrating to the high-concentration diffusion layer 3 is opened in the interlayer insulating film 4 by a dry etching method,
Immediately after cleaning by the wet method and removal of the silicon native oxide film, the metallic titanium layer 8 (30 nm) was formed by the sputter deposition method
And a titanium nitride layer 6 (10 nm) are formed as a two-layer film by the sputter continuous deposition method. However, titanium nitride layer 6
Used a reactive sputtering method. At this time, the metal titanium layer 8 is arranged as a lower layer and is in direct contact with the high concentration diffusion layer 3 (FIG. 1 (a)). Next, for the purpose of selectively siliciding the metal titanium layer 8 in contact with the high-concentration diffusion layer 3, heat treatment is performed at 650 ° C. for 5 minutes in an electric furnace in a nitrogen atmosphere. At this time, if the metal titanium layer 8 is heat-treated in an ordinary electric furnace, the metal titanium layer 8 may be oxidized due to the mixing of oxygen, but in the case of the present invention, the upper titanium nitride thin film 6 suppresses this oxidation. There is no problem because it has the effect of By this heat treatment, the metal titanium layer 8 in contact with the high-concentration diffusion layer 3 at the bottom of the contact becomes the titanium disilicide 9 of C49 crystal structure, and the interlayer insulating film 4 is formed.
The metal titanium layer 8 in contact with is the titanium nitride layer 6 (FIG. 1 (b)). Next, only the titanium nitride thin film 6 is selectively removed by wet treatment by boiling a mixed solution of sulfuric acid and hydrogen peroxide. At this time, the C49 crystal structure titanium disilicide 8 at the bottom of the contact remains without being removed (FIG. 1 (c)). At this point, again in an electric furnace in a nitrogen atmosphere at 850
By performing heat treatment at 5 ° C. for 5 minutes, the C49 crystal structure titanium disilicide 9 in contact with the high-concentration diffusion layer 3 at the bottom of the contact undergoes phase transformation into the C54 crystal structure titanium disilicide 5 having a thickness of 50 nm. This C54 crystal structure titanium disilicide 5 is the most thermodynamically stable phase of titanium silicide, and since the Schottky barrier height to p-type silicon is as low as 0.57 eV, it forms a low resistance ohmic contact. Is the most suitable conductive material (Fig. 1 (d)). Here, the titanium nitride layer 6 is again deposited by the 100 nm reactive sputtering method. If necessary, in order to improve the barrier property of the titanium nitride thin film 6, heat treatment is performed at 650 ° C. for 5 minutes in a nitrogen atmosphere. C5, which is already a stable phase in this temperature range
4 Crystal structure Since the titanium disilicide 5 does not cause a volume change, there is no problem that a void is generated in the upper titanium nitride layer 6 (FIG. 1 (e)). After that, an Al-Si-Cu metal wiring layer 7 is formed to a thickness of 700 nm on the upper layer of the titanium nitride layer 6 by a sputter deposition method, and a photoresist pattern is formed by an ordinary photolithography method, and Al-Si-Cu is formed.
A laminated metal wiring layer can be formed by dry etching the laminated film composed of the metal wiring layer 7 and the titanium nitride layer 6 (100 nm) (FIG. 1 (f)). Finally, heat treatment is performed in a mixed gas of hydrogen and nitrogen at 450 ° C for 15 minutes to complete ohmic contact.

[0009]

As described above, according to the present invention, in the formation of a fine contact in a semiconductor device, after selectively forming a C54 crystal structure titanium disilicide layer in contact with a high concentration diffusion layer at the bottom of the contact, a titanium nitride layer is formed. By being formed, it greatly contributes to the manufacture of a semiconductor device which is an ohmic low resistance contact and has a good pn junction characteristic under the contact.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing an ohmic contact structure of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a process cross-sectional view of forming an ohmic contact structure of a semiconductor device by using a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

 1 Silicon Substrate 2 Element Isolation Insulation Film 3 High Concentration Diffusion Layer 4 Interlayer Insulation Film 5 C54 Crystal Structure Titanium Disilicide 6 Titanium Nitride Layer 7 Al-Si-Cu Metal Wiring Layer 8 Metal Titanium Layer 9 C49 Crystal Structure Titanium Disilicide 10 Void

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 21/90 C 7514-4M

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor device, wherein an ohmic contact between a high concentration diffusion layer formed on a semiconductor substrate and a metal wiring layer is formed, wherein a contact hole is formed in an interlayer insulating film existing on the high concentration diffusion layer. And a step of selectively forming titanium silicide in contact with the high-concentration diffusion layer at the connection hole portion, and after the titanium silicide is phase-transformed into a titanium disilicide layer having a C54 crystal structure by heat treatment. A method of manufacturing a semiconductor device, comprising the step of forming a metal wiring layer in which a material in contact with the titanium silicide is a titanium nitride layer.