JPS63114594A - Trace back method for variable speed driving device - Google Patents

Trace back method for variable speed driving device

Info

Publication number
JPS63114594A
JPS63114594A JP61260184A JP26018486A JPS63114594A JP S63114594 A JPS63114594 A JP S63114594A JP 61260184 A JP61260184 A JP 61260184A JP 26018486 A JP26018486 A JP 26018486A JP S63114594 A JPS63114594 A JP S63114594A
Authority
JP
Japan
Prior art keywords
data
trouble
ram
generating
variable speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61260184A
Other languages
Japanese (ja)
Inventor
Toshihiro Sawa
俊裕 沢
Sadamitsu Akiyama
秋山 貞光
Masanobu Miyasato
宮里 政信
Tsuneo Kume
常生 久米
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaskawa Electric Corp
Original Assignee
Yaskawa Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaskawa Electric Manufacturing Co Ltd filed Critical Yaskawa Electric Manufacturing Co Ltd
Priority to JP61260184A priority Critical patent/JPS63114594A/en
Publication of JPS63114594A publication Critical patent/JPS63114594A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Control Of Ac Motors In General (AREA)

Abstract

PURPOSE:To clarify operating conditions before and after generating a trouble and analyze the trouble highly accurately and easily, by a method wherein memorized data are transferred to a non-volatile memory cell to store them upon generating the trouble. CONSTITUTION:A RAM 8 rewrites the data of a data cell into updated data one after another and stores the data of (n) times immediately before the rewriting. When a trouble is generated, the RAM 8 effects the sampling of the data of (n-m) times (0<=m<=n) after generating the trouble. When the data before and after generating the trouble are recorded, the sampling is stopped and the data are transferred to a non-volatile memory cell 9. As a result, (m) pieces of data before generating the trouble and (n-m) pieces of data after generating the trouble are stored in the non-volatile memory cell 9.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、工作機ドライブやFAシステム等に使用され
る可変速ドライブ装置のトレースバック方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a traceback method for variable speed drive devices used in machine tool drives, FA systems, and the like.

〔従来の技術〕[Conventional technology]

この種の可変速ドライブ装置は、ディジタル制御!!技
術の進歩により、ますます高機能化、高性能化が進んで
いる。それに伴って、故障発生のメカニズムも多岐にわ
たってきており、故障発生原因の究明を因難なものにし
ている。
This type of variable speed drive device is digitally controlled! ! Advances in technology have led to increasingly sophisticated functionality and performance. Along with this, the mechanisms of failure occurrence have become diverse, making it difficult to investigate the cause of failure occurrence.

この対策として、従来は、運転状態をRAM上に記録し
、故障時の運転状態を再現するトレースバック機能が用
いられていた。
As a countermeasure against this problem, conventionally, a traceback function has been used which records the operating state on the RAM and reproduces the operating state at the time of the failure.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、この方法では、電源を遮断すると全ての
記録が消滅するために、装置を使用している場所でしか
故障調査ができず、例えば故障の発生した装置をサービ
スセンタ等に持ち帰り、再現することは不可能であった
。また、故障時、電a遮断するようなシステムの場合に
は前記方法は適用できなかった。
However, with this method, all records are erased when the power is cut off, so failure investigation can only be done at the location where the device is being used. was impossible. Further, the above method cannot be applied to a system in which electricity is cut off in the event of a failure.

本発明は、このような従来の問題点に鑑みてなされたも
のであり、電源を一度遮断しても、再度電源を投入した
時に故障発生前後の運転状態を再現し、故障原因の究明
を容易にすることを目的とする。
The present invention was made in view of these conventional problems, and even if the power is cut off once, when the power is turned on again, the operating conditions before and after the failure occur can be reproduced, making it easy to investigate the cause of the failure. The purpose is to

〔問題点を解決するための手段〕[Means for solving problems]

この目的を達成するため、本発明のトレースバック方法
は、インバータドライブ、サーボドライブ等の可変速ド
ライブ装置において、データの書き替えが可能なRAM
及び不運発性記憶素子を用い、回転数1周波数、電流等
の運転状態を示す変数及び入出力信号等の運転状態を示
す論理信号を周期Tでサンプリングして常に新しいn回
分のデータを前記RAM上に書き込み、故障発生時に、
故障発生前m回分のデータ及び発生後n −m (n>
m)のデータを前記不運発性記憶素子に転送して記録す
ることを特徴とする。
In order to achieve this objective, the traceback method of the present invention is applied to a data-rewritable RAM in a variable speed drive device such as an inverter drive or a servo drive.
and a non-volatile memory element, variables indicating operating conditions such as rotational speed, frequency, current, etc., and logic signals indicating operating conditions such as input/output signals are sampled at a period T, and new n times of data are always stored in the RAM. Write above, when a failure occurs,
Data for m times before failure occurrence and n −m (n>
The method is characterized in that the data of m) is transferred to and recorded in the non-random storage element.

〔作用〕[Effect]

本発明のトレースバック方法では、可変速ドライブ装置
のマイクロプロセッサによるディジタル制御回路におい
て、RAM等のデータの書き替えを卸業に行うための記
憶素子(以下rRAMJという)及びEEPROMやN
VRAM等の電気的に書き替え可能な不運発性記憶素子
(以下rEEPROMJという)を用い、RAMに記憶
されている故障発生前後の運転状態のデータを、故障発
生後、EEPROMに転送し、記録する。これにより、
電源を遮断してもEEFROMに記録したデータが保持
される。電源再投入後、これらのデータを読み込んで表
示することが可能となる。
In the traceback method of the present invention, in a digital control circuit using a microprocessor of a variable speed drive device, storage elements such as RAM (hereinafter referred to as rRAMJ) for rewriting data, EEPROM, N
Using an electrically rewritable ephemeral memory element such as VRAM (hereinafter referred to as rEEPROMJ), data on the operating status before and after the occurrence of a fault that is stored in the RAM is transferred to and recorded in the EEPROM after the fault occurs. . This results in
Even if the power is turned off, the data recorded in the EEFROM is retained. After the power is turned on again, these data can be read and displayed.

(実施例) 以下、本発明を図面に示す実施例に基づいて具体的に説
明する。第1図は、本発明の機能を有する可変速ドライ
ブ装置のブロフク図である。
(Example) Hereinafter, the present invention will be specifically described based on an example shown in the drawings. FIG. 1 is a schematic diagram of a variable speed drive device having the functions of the present invention.

第1図において、1はインバータ、2はモータである。In FIG. 1, 1 is an inverter and 2 is a motor.

インバータ10制御回路部3は、入出力信号のインター
フェースである110部4、インバータ1及びモータ2
の電圧、電流、温度9回転数等を検出するセンサ一部5
、CPU、ROM。
The inverter 10 control circuit section 3 includes an input/output signal interface 110 section 4, an inverter 1, and a motor 2.
Sensor part 5 that detects voltage, current, temperature 9 rotation speed, etc.
, CPU, ROM.

RAM等からなるインバータ制御部6、データの表示を
行う表示部7により構成される。トレースバックで使用
されるR AM B 、  E E F ROM 9は
、インバータ制御部6に含まれ、そのデータは表示部7
に表示される0図中10はモータ2の回転位置を検出す
るパルスジェネレータ、11は商用′@源を表している
It is composed of an inverter control section 6 consisting of a RAM, etc., and a display section 7 that displays data. RAM B and EEF ROM 9 used for traceback are included in the inverter control section 6, and the data is displayed on the display section 7.
In the figure, 10 represents a pulse generator that detects the rotational position of the motor 2, and 11 represents a commercial '@ source.

トレースバックデータは、故障解析に必要なデータ、す
なわち電圧、電流、温度1回転数等の変数データと、運
転状態や入出力信号等の論理信号データを対象とする。
The traceback data includes data necessary for failure analysis, that is, variable data such as voltage, current, temperature, and number of revolutions, and logical signal data such as operating status and input/output signals.

これらのトレースバックデータを、周期Ts+sでサン
プリングし、RAM8に設定されたn個のデータセルに
順次記録する。n個のサンプリングが終わると、fi+
1回目からは、データセルの内容を新しいデータに書き
替える。すなわち、データセルに記録されるデータと、
サンプリング回数の関係は、 1番目のデータセル□ (nxk+1)回目2番目のデ
ータセル□ (nxk+2)回目n番目のデータセル□
 (nXk+n)回目となる。但し、kは、k−1,2
,・・・・・・と続く整数である。
These traceback data are sampled at a period Ts+s and sequentially recorded in n data cells set in the RAM 8. When n samplings are completed, fi+
From the first time, the contents of the data cell are rewritten with new data. In other words, the data recorded in the data cell,
The relationship between sampling times is as follows: 1st data cell □ (nxk+1) times 2nd data cell □ (nxk+2) times n-th data cell □
This is the (nXk+n)th time. However, k is k-1, 2
,..., and so on.

このように、正常運転中はデータセルのデータを次々亡
新しいデータに書き替え、直前のn回分のデータを記録
する。
In this way, during normal operation, the data in the data cells is rewritten one after another with new data, and the data for the previous n times are recorded.

故障が発生すると、その後n−m回(0≦m≦n)、デ
ータをサンプリングする。故障発生前後のデータを記録
すると、サンプリングを停止し、EEFROMにデータ
を転送する。すなわち、第2図に示すように、故障発生
前のm個のデータと故障発生後n−m個のデータをE 
E F ROMに記録する。記録するデータは、ポイン
タにより、データの時系列を明確にできる。またEEF
ROMに記録されたデータは、不揮発性であるので、電
源のオン、オフによって、データは消滅することはなく
、パスワードを凹き込むことによってのみ、データの書
き替えが可能になる。
When a failure occurs, data is then sampled n−m times (0≦m≦n). After recording the data before and after the occurrence of a failure, sampling is stopped and the data is transferred to the EEFROM. That is, as shown in Fig. 2, m pieces of data before the failure occurrence and nm pieces of data after the failure occurrence are
Record in EF ROM. The chronological order of the data to be recorded can be clarified using pointers. Also EEF
Since the data recorded in the ROM is non-volatile, the data is not erased by turning the power on or off, and can be rewritten only by entering a password.

〔発明の効果〕〔Effect of the invention〕

以上に説明したように、本発明においては、データの書
き替えが可能なRAM及び不揮発性記憶素子を用い、故
障発生時に、記憶しておいたデータを、不揮発性記憶素
子に転送して記録し、電源遮断、再投入後に、故障時の
運転状態を表示するようにしている。このため、故障発
生前後の運転状態が明確となり、電源を遮断しても記録
したデータを保持することができる。したがって、サー
ビスセンタ等での故障解析を高精度に、かつ容易に行う
ことができる。
As explained above, in the present invention, a RAM and a non-volatile memory element in which data can be rewritten are used, and when a failure occurs, the stored data is transferred to the non-volatile memory element and recorded. The operating status at the time of failure is displayed after the power is turned off and turned on again. Therefore, the operating status before and after the occurrence of a failure becomes clear, and recorded data can be retained even if the power is cut off. Therefore, failure analysis at a service center or the like can be performed easily and with high accuracy.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の機能を有する可変速ドライブ装置のブ
ロック図、第2図は故障発生時のトレースバックデータ
の記録のタイミングチャートである。 1;インパーク    2:モータ 3:制御回路部    4:110部 5:センサ一部    6:インバータ制2TJ部7:
表示部      8: RA M9: E E P 
ROM   10:パルスジエネレータ11:商用電源
FIG. 1 is a block diagram of a variable speed drive device having the functions of the present invention, and FIG. 2 is a timing chart of recording traceback data when a failure occurs. 1; Impark 2: Motor 3: Control circuit section 4: 110 section 5: Sensor section 6: Inverter system 2 TJ section 7:
Display section 8: RAM M9: E E P
ROM 10: Pulse generator 11: Commercial power supply

Claims (1)

【特許請求の範囲】[Claims] 1、インバータドライブ、サーボドライブ等の可変速ド
ライブ装置において、データの書き替えが可能なRAM
及び不揮発性記憶素子を用い、回転数、周波数、電流等
の運転状態を示す変数及び入出力信号等の運転状態を示
す論理信号を周期Tでサンプリングして常に新しいn回
分のデータを前記RAM上に書き込み、故障発生時に、
故障発生前m回分のデータ及び発生後n−m(n>m)
のデータを前記不揮発性記憶素子に転送して記録するこ
とを特徴とする可変速ドライブ装置のトレースバック方
法。
1. RAM that allows data to be rewritten in variable speed drive devices such as inverter drives and servo drives
and a non-volatile memory element, variables indicating the operating state such as rotational speed, frequency, and current, and logical signals indicating the operating state such as input/output signals are sampled at a cycle T, and new n times of data are always stored in the RAM. When a failure occurs,
Data for m times before failure occurrence and nm after failure occurrence (n>m)
A traceback method for a variable speed drive device, characterized in that the data is transferred to the nonvolatile storage element and recorded.
JP61260184A 1986-10-30 1986-10-30 Trace back method for variable speed driving device Pending JPS63114594A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61260184A JPS63114594A (en) 1986-10-30 1986-10-30 Trace back method for variable speed driving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61260184A JPS63114594A (en) 1986-10-30 1986-10-30 Trace back method for variable speed driving device

Publications (1)

Publication Number Publication Date
JPS63114594A true JPS63114594A (en) 1988-05-19

Family

ID=17344496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61260184A Pending JPS63114594A (en) 1986-10-30 1986-10-30 Trace back method for variable speed driving device

Country Status (1)

Country Link
JP (1) JPS63114594A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63224697A (en) * 1987-03-14 1988-09-19 Matsushita Electric Works Ltd Controller for motor
JPH10116254A (en) * 1996-08-16 1998-05-06 Compaq Computer Corp Decentralized computer system
JP2002236595A (en) * 2001-02-09 2002-08-23 Fujitsu Ten Ltd Electronic equipment and its device and method for debugging assistance
JP2004078894A (en) * 2002-06-17 2004-03-11 Seiko Epson Corp Image forming apparatus, and method and program for rewriting firmware, and record medium
JP2014138482A (en) * 2013-01-16 2014-07-28 Denso Corp Circuit control device
JP2018207650A (en) * 2017-06-02 2018-12-27 三菱日立パワーシステムズ株式会社 Feature quantity evaluation system for rotary electric machine and feature quantity evaluation method for rotary electric machine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61156340A (en) * 1984-12-28 1986-07-16 Fuji Electric Co Ltd Trouble recorder

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61156340A (en) * 1984-12-28 1986-07-16 Fuji Electric Co Ltd Trouble recorder

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63224697A (en) * 1987-03-14 1988-09-19 Matsushita Electric Works Ltd Controller for motor
JPH10116254A (en) * 1996-08-16 1998-05-06 Compaq Computer Corp Decentralized computer system
JP2006155641A (en) * 1996-08-16 2006-06-15 Compaq Computer Corp Distributed computer system
JP2002236595A (en) * 2001-02-09 2002-08-23 Fujitsu Ten Ltd Electronic equipment and its device and method for debugging assistance
JP2004078894A (en) * 2002-06-17 2004-03-11 Seiko Epson Corp Image forming apparatus, and method and program for rewriting firmware, and record medium
JP2014138482A (en) * 2013-01-16 2014-07-28 Denso Corp Circuit control device
US9160329B2 (en) 2013-01-16 2015-10-13 Denso Corporation Circuit control device
JP2018207650A (en) * 2017-06-02 2018-12-27 三菱日立パワーシステムズ株式会社 Feature quantity evaluation system for rotary electric machine and feature quantity evaluation method for rotary electric machine

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