JPS63114238A - Semiconductor package - Google Patents

Semiconductor package

Info

Publication number
JPS63114238A
JPS63114238A JP26092586A JP26092586A JPS63114238A JP S63114238 A JPS63114238 A JP S63114238A JP 26092586 A JP26092586 A JP 26092586A JP 26092586 A JP26092586 A JP 26092586A JP S63114238 A JPS63114238 A JP S63114238A
Authority
JP
Japan
Prior art keywords
stem base
insulator
semiconductor package
outer lead
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26092586A
Other languages
Japanese (ja)
Inventor
Hidekazu Kitamura
英一 北村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP26092586A priority Critical patent/JPS63114238A/en
Publication of JPS63114238A publication Critical patent/JPS63114238A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent electrical short circuits due to inflow of solder material for fixing electronic parts into outer leads, by forming insulators, which insulate a stem base and the outer leads, so that the insulators are protruded at least from the surface of a stem base in the inside of a package. CONSTITUTION:An insulator 3, which insulates a stem base 4 and each outer lead 2, is protruded at least from the surface of a stem base 4 in the inside of a package. Or an insulating ring 5 is provided at the upper part of the insulator 3, which insulates the stem base 4 and the outer lead 2 or at the outer surface of the insulator 3, which is protruded from the surface of the stem base 4. Thus inflow of a solder material for fixing electronic parts to the stem base 4 and connection with the outer lead 2 are prevented even when many electronic parts are mounted in a semiconductor package. Electrical short circuits between the stem base 4 and the outer leads can be prevented.

Description

【発明の詳細な説明】 (Jll要 求発明の第1の半導体パッケージは、ステムベースとア
ウターリードを絶縁する絶縁体が少なくともパッケージ
内側のステムベース表面より突出した形状であることを
特徴とする。
DETAILED DESCRIPTION OF THE INVENTION (The first semiconductor package of the Jll-required invention is characterized in that the insulator that insulates the stem base and the outer lead has a shape that protrudes from at least the surface of the stem base inside the package.

本発明の第2の半導体パッケージは、ステムベースとア
ウターリードを絶縁する絶縁体の上部又はステムベース
表面より突出した該絶縁体の外周に絶縁リングを設けた
ことを特徴とする。
A second semiconductor package of the present invention is characterized in that an insulating ring is provided on the top of the insulator that insulates the stem base and the outer lead or on the outer periphery of the insulator that protrudes from the surface of the stem base.

このように、絶縁体を少なくともパッケージ内側のステ
ムベース表面より突出した形状にするか、絶縁体の上部
又はステムベース表面より突出した該絶縁体の外周に絶
縁リングを設けることによって、半導体パッケージに多
数の電子部品を実装する場合においても、電子部品をス
テムベースに固定するためのろう材が流れてアウターリ
ードと接続し、ステムベースとアウタリード間が電気的
に短絡するのを防止することができる。
In this way, by forming the insulator into a shape that protrudes from at least the stem base surface inside the package, or by providing an insulating ring on the top of the insulator or on the outer periphery of the insulator that protrudes from the stem base surface, a large number of Even when mounting an electronic component, it is possible to prevent the brazing material for fixing the electronic component to the stem base from flowing and connecting to the outer lead, thereby preventing an electrical short circuit between the stem base and the outer lead.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体パッケージに関するものであり、更に詳
しく言えばステムベースとアウターリードを絶縁する絶
縁体の形状若しくは絶縁リンクに関するものである。
The present invention relates to a semiconductor package, and more particularly to the shape of an insulator or an insulating link that insulates a stem base and an outer lead.

〔従来の技術〕[Conventional technology]

従来の半導体パー2ケージの構造を第3図に示す、(a
)は底面図、(b)は正面図、(C)は側面の断面図、
(d)は(C)中Aで示した部分の拡大図である0図に
おいて、lはケース本体。
The structure of a conventional semiconductor package is shown in Figure 3 (a
) is a bottom view, (b) is a front view, (C) is a side sectional view,
(d) is an enlarged view of the part indicated by A in (C). In Figure 0, l is the case body.

2はアウターリード、3はステムベース4とアウターリ
ードとを絶縁する絶縁体、4はステムベースである。絶
縁体は第3図(C)に拡大して示したようにステムベー
ス表面とほぼ平らになるように設けられている。
2 is an outer lead, 3 is an insulator that insulates the stem base 4 and the outer lead, and 4 is a stem base. The insulator is provided so as to be substantially flat with the stem base surface, as shown in an enlarged view in FIG. 3(C).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、近年半導体用ステムも他の電子部品と同様に
、小型化・高密度実装が要求され、またステムベースか
ら外部への電気的接続を行なうアウターリード数も増え
、リード間隔は益々狭くなる傾向にある。この為ステム
ベースに取り付けられる電子部品との間隔も狭くなり、
電子部品をステムベースに接着するろう材が流れてアウ
ターリードと接続してしまい、電気的短絡を引き起こす
ことがある。
Incidentally, in recent years, semiconductor stems, like other electronic components, have been required to be smaller and more densely packaged, and the number of outer leads that make electrical connections from the stem base to the outside has also increased, leading to a tendency for lead spacing to become narrower. It is in. For this reason, the distance between the electronic components attached to the stem base is also narrower,
The brazing material used to bond electronic components to the stem base may flow and connect with the outer leads, causing an electrical short circuit.

本発明はかかる点に鑑みて創作されたものであり、アウ
ターリードの絶縁を完全ならしめ、信頼性に優れた半導
体パッケージの提供を目的とする。
The present invention was created in view of the above points, and an object of the present invention is to provide a semiconductor package with perfect insulation of the outer leads and excellent reliability.

〔問題点を解決するための手段〕[Means for solving problems]

第1図は本発明の半導体パッケージの原理構成を示す側
面断面図((a)、(b)、(c))及びその絶縁体若
しくは絶縁体リング部の拡大図((d)、(e)、(f
)である、ここで第1図(d)は(a)の、(e)は(
b)の、(f)は(C)のそれぞれ(a)(b)(c)
にBで示した部分の拡大図である0図中、同じものにつ
いては第3図と同一符号で示してあり、5は絶縁リング
である。
FIG. 1 is a side sectional view ((a), (b), (c)) showing the principle structure of the semiconductor package of the present invention, and an enlarged view ((d), (e) of the insulator or insulator ring portion thereof). , (f
), where FIG. 1(d) is (a), and (e) is (
b) and (f) are (a), (b), and (c) respectively in (C).
In Fig. 0, which is an enlarged view of the part indicated by B, the same parts are indicated by the same reference numerals as in Fig. 3, and 5 is an insulating ring.

第1図(a)、(d)に示した半導体パッケージは絶縁
体がステムベース表面より突出した形状を有している特
許請求の範囲第1項に記載の半導体パッケージに対応す
るものである。
The semiconductor packages shown in FIGS. 1(a) and 1(d) correspond to the semiconductor package set forth in claim 1, in which the insulator has a shape protruding from the surface of the stem base.

第1図(b)、(e)では、絶縁体の形状は従来例と同
様であるが、絶縁体上部に絶縁リングを設けてあり、第
1図CC)、(f)はステムベースより突出した形状の
絶縁体の外周に絶縁リングを設けたものであり、これら
は特許請求の範囲第2項に対応するものである。
In Fig. 1 (b) and (e), the shape of the insulator is the same as the conventional example, but an insulating ring is provided on the top of the insulator, and in Fig. 1 (CC) and (f) it protrudes from the stem base. An insulating ring is provided on the outer periphery of an insulator having a shape of 1, and these correspond to claim 2.

〔作用〕[Effect]

本発明の半導体パッケージは、絶縁体をステムベースよ
り突出した形状に設けることにより、若しくは絶縁リン
グを絶縁体上部に又はステムベースより突出した該絶縁
体の外周に設けることにより、電子部品をステムベース
に接着するためのろう材がアウターリードへ流れ込んで
電気的短絡が生じるのを阻l二することができる。
In the semiconductor package of the present invention, the electronic component is attached to the stem base by providing the insulator in a shape that protrudes from the stem base, or by providing an insulating ring on the top of the insulator or on the outer periphery of the insulator that protrudes from the stem base. This can prevent the brazing material used for bonding the outer leads from flowing into the outer leads and causing electrical short circuits.

〔実施例〕〔Example〕

次に図を参照しながら本発明の実施例について説明する
。第2図(a)、(b)は本発明の半導体パフケージの
側面断面図及びその部分拡大図である。なお底面図及び
正面図はそれぞれ第3図(a)、(b)に示したのと同
様である。
Next, embodiments of the present invention will be described with reference to the drawings. FIGS. 2(a) and 2(b) are a side sectional view and a partially enlarged view of the semiconductor puff cage of the present invention. Note that the bottom view and front view are similar to those shown in FIGS. 3(a) and 3(b), respectively.

図において、第1図、第3図と同じ符号で示したものは
、同じものを示す0本実施例は電子部品としてペルチェ
素子6を実装しており、7はファイバー、8はLD素子
、9はFD素子、10はサーミスターである。11はペ
ルチェ素子6をステムベースに固定するろう材であり、
ステムベース表面より突出した形状の絶縁体3及び該絶
縁体のステムベース表面より突出した該絶縁体の外周に
設けた絶縁リング5によって7ウターリード2に流れ込
むのを完全に防止している。
In the figures, the same reference numerals as in FIGS. 1 and 3 indicate the same elements. In this embodiment, a Peltier element 6 is mounted as an electronic component, 7 is a fiber, 8 is an LD element, and 9 is an LD element. is an FD element, and 10 is a thermistor. 11 is a brazing material that fixes the Peltier element 6 to the stem base;
The insulator 3 having a shape protruding from the stem base surface and the insulating ring 5 provided on the outer periphery of the insulator protruding from the stem base surface completely prevent the water from flowing into the outer lead 2.

ここで絶縁体の材料は、通常の絶縁ガラスであり、絶縁
リングの材料はセラミックである。尚。
Here, the material of the insulator is ordinary insulating glass, and the material of the insulating ring is ceramic. still.

これら以外の材料であっても十分な絶縁性、成形性のあ
るものであれば用いることができる。
Materials other than these can be used as long as they have sufficient insulation and moldability.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明によれば半導体パッケージに電子
部品を多数実装する場合においても、電子部品を固定す
るろう材のアウターリードへの流れ込みによる電気的短
絡を防止することができ、信頼度を向上させることがで
きる。
As described above, according to the present invention, even when a large number of electronic components are mounted on a semiconductor package, it is possible to prevent electrical short circuits caused by the flow of the brazing filler metal that fixes the electronic components into the outer leads, thereby improving reliability. can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)、(b)、(c)は本発明の原理構成を示
す断面図、(d)、(e)、(f)はそれぞれの部分拡
大図。 第2図は本発明の実施例にかかる断面図(a)、及びそ
の部分拡大図。 第3図は従来例を示す断面図であり、(a)は背面図、
(b)は正面図、(C)は側面断面図。 (d)は(c)の部分拡大図である。 (符号の説[J]) 1・・・ケース本体、 2・・・アウターリード、 3・・・絶縁体。 4・・・ステムベース、 5・・・絶縁リング、 6・・・ベルチェ素子。 7・・・ファイバー、 8・・・LD素子。 9・・・FD素子。 10・・・サーミスター、 11・・・ロウ材。
FIGS. 1(a), (b), and (c) are cross-sectional views showing the basic configuration of the present invention, and FIGS. 1(d), (e), and (f) are respective partially enlarged views. FIG. 2 is a sectional view (a) and a partially enlarged view of the embodiment of the present invention. FIG. 3 is a sectional view showing a conventional example, and (a) is a rear view;
(b) is a front view, and (C) is a side sectional view. (d) is a partially enlarged view of (c). (Coding theory [J]) 1...Case body, 2...Outer lead, 3...Insulator. 4... Stem base, 5... Insulation ring, 6... Vertier element. 7...Fiber, 8...LD element. 9...FD element. 10... Thermistor, 11... Brazing material.

Claims (2)

【特許請求の範囲】[Claims] (1)ステムベースとアウターリードを絶縁する絶縁体
が少なくともパッケージ内側のステムベース表面より突
出した形状であることを特徴とする半導体パッケージ。
(1) A semiconductor package characterized in that an insulator that insulates a stem base and an outer lead has a shape that protrudes from at least the surface of the stem base inside the package.
(2)ステムベースとアウターリードを絶縁する絶縁体
の上部又はステムベース表面より突出した該絶縁体の外
周に絶縁リングを設けたことを特徴とする半導体パッケ
ージ。
(2) A semiconductor package characterized in that an insulating ring is provided on the top of an insulator that insulates the stem base and the outer lead or on the outer periphery of the insulator that protrudes from the surface of the stem base.
JP26092586A 1986-10-31 1986-10-31 Semiconductor package Pending JPS63114238A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26092586A JPS63114238A (en) 1986-10-31 1986-10-31 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26092586A JPS63114238A (en) 1986-10-31 1986-10-31 Semiconductor package

Publications (1)

Publication Number Publication Date
JPS63114238A true JPS63114238A (en) 1988-05-19

Family

ID=17354669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26092586A Pending JPS63114238A (en) 1986-10-31 1986-10-31 Semiconductor package

Country Status (1)

Country Link
JP (1) JPS63114238A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629423A (en) * 1992-07-07 1994-02-04 Nippon Seiki Co Ltd Sealing glass molded substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629423A (en) * 1992-07-07 1994-02-04 Nippon Seiki Co Ltd Sealing glass molded substrate

Similar Documents

Publication Publication Date Title
US5440169A (en) Resin-packaged semiconductor device with flow prevention dimples
KR100186309B1 (en) Stacked bottom lead package
EP0488783A2 (en) Lead frame for semiconductor device comprising a heat sink
KR960043144A (en) Method of manufacturing multi-chip package
KR100253376B1 (en) Chip size semiconductor package and fabrication method thereof
JPS63114238A (en) Semiconductor package
JPS6322678Y2 (en)
JPH1032300A (en) Lead frame, semiconductor device and manufacture thereof
JPH0328511Y2 (en)
JP2506938Y2 (en) Resin-sealed electronic circuit device
JPS635250Y2 (en)
JPH04247645A (en) Metal substrate mounting structure
JPH0795575B2 (en) Semiconductor rectifier
KR0167281B1 (en) Blp package
KR200156148Y1 (en) Semiconductor package
JPS6120780Y2 (en)
JP2591614Y2 (en) Airtight terminal
KR960000942Y1 (en) Lead frame
JPS5890748A (en) Semiconductor device
JPH05226507A (en) Surface mounted semiconductor chip package
JPH01215049A (en) Semiconductor device
JPH05335480A (en) Power supply semiconductor module
JPS6329554A (en) Cap coupling type semiconductor device
JPS61222138A (en) Hybrid integrated circuit
JPS60245238A (en) Semiconductor device