JPH0328511Y2 - - Google Patents
Info
- Publication number
- JPH0328511Y2 JPH0328511Y2 JP1987151521U JP15152187U JPH0328511Y2 JP H0328511 Y2 JPH0328511 Y2 JP H0328511Y2 JP 1987151521 U JP1987151521 U JP 1987151521U JP 15152187 U JP15152187 U JP 15152187U JP H0328511 Y2 JPH0328511 Y2 JP H0328511Y2
- Authority
- JP
- Japan
- Prior art keywords
- external
- lead
- insulator
- external leads
- external lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 14
- 239000012212 insulator Substances 0.000 claims description 9
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 3
- 239000011347 resin Substances 0.000 description 23
- 229920005989 resin Polymers 0.000 description 23
- 230000015556 catabolic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003014 reinforcing effect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【考案の詳細な説明】
本考案は、高耐圧半導体装置に適した絶縁物封
止形状を有する絶縁物封止半導体装置に関するも
のである。[Detailed Description of the Invention] The present invention relates to an insulator-sealed semiconductor device having an insulator-sealed shape suitable for a high voltage semiconductor device.
第１図〜第４図は従来の樹脂モールド形パワー
トランジスタの１例を示すもので、第１図と第２
図はモールドされた樹脂体のない状態、第３図と
第４図はモールドされた樹脂体のある状態であ
る。第１図と第３図は平面図、第２図と第４図は
これらのＡ−Ａ線断面図である。 Figures 1 to 4 show an example of a conventional resin-molded power transistor.
The figure shows the state without the molded resin body, and FIGS. 3 and 4 show the state with the molded resin body. 1 and 3 are plan views, and FIGS. 2 and 4 are cross-sectional views taken along the line A--A.
裏面をコレクタ電極とするトランジスタチツプ
１が放熱板２の上に固着されており、放熱板２か
らコレクタリードとなる外部リード３が延びてい
る。外部リード３と並列配置された外部リード
４，５はそれぞれベースリードとエミツタリード
であり、トランジスタチツプ１の表面のベース電
極あるいはエミツタ電極との間はそれぞれ内部リ
ード線６，７で接続されている。トランジスタチ
ツプ１は樹脂体８でモールド（封止）されてお
り、外部リード３，４，５は樹脂体８から１平面
上に並列して導出されている。第１図と第２図の
破線は樹脂体８の外形を示している。外部リード
３，４，５は樹脂体８からの導出側が幅広部３
ａ，４ａ，５ａとなつており、そこから先端側が
幅狭部３ｂ，４ｂ，５ｂとなつている。幅広部３
ａ，４ａ，５ａは、外部リードに外力が加わつて
もあるいは加えても樹脂体８からの導出部近傍で
外部リードが変形し難いように補強するためのも
のである。幅広部３ａ，４ａ，５ａは、それぞれ
の幅狭部３ｂ，４ｂ，５ｂを樹脂体８まで延長し
た部分の両側に張出した形状である。幅狭部３
ｂ，４ｂ，５ｂは、実質的に外部への接続端子と
して使われる部分であり、かなり幅を狭くしてリ
ード線として必要な柔軟性を持たせている。外部
リード４，５の放熱板２に隣接する部分は、内部
リード線６，７を接続するための端子部４ｃ，５
ｃとなつている。 A transistor chip 1 whose back surface serves as a collector electrode is fixed on a heat sink 2, and an external lead 3 serving as a collector lead extends from the heat sink 2. External leads 4 and 5 arranged in parallel with external lead 3 are a base lead and an emitter lead, respectively, and are connected to the base electrode or emitter electrode on the surface of transistor chip 1 by internal lead wires 6 and 7, respectively. The transistor chip 1 is molded (sealed) with a resin body 8, and external leads 3, 4, and 5 are led out from the resin body 8 in parallel on one plane. The broken lines in FIGS. 1 and 2 indicate the outer shape of the resin body 8. The external leads 3, 4, and 5 have a wide part 3 on the side where they lead out from the resin body 8.
a, 4a, and 5a, and the tip end thereof becomes narrow portions 3b, 4b, and 5b. Wide part 3
a, 4a, and 5a are for reinforcing the external lead so that it is difficult to deform in the vicinity of the lead-out portion from the resin body 8 even if an external force is applied to the external lead. The wide portions 3a, 4a, 5a have shapes extending from the respective narrow portions 3b, 4b, 5b to both sides of the resin body 8. Narrow part 3
b, 4b, and 5b are portions that are essentially used as connection terminals to the outside, and are made considerably narrow in width to provide flexibility necessary for lead wires. Portions of the external leads 4 and 5 adjacent to the heat sink 2 are terminal portions 4c and 5 for connecting the internal lead wires 6 and 7.
c.
ところで、トランジスタチツプ１に高耐圧のも
のを使用したとき、外部リード３と４の間および
外部リード３と５の間の樹脂体８の表面に沿つて
の最短距離、いわゆる外部リード間の沿面距離ｌ
が問題となる。すなわち、高圧が印加されると外
部リード間の樹脂体表面を電流通路とする耐圧不
良が起きやすいので、例えば耐圧400V以上の製
品では外部リード間の沿面距離ｌを２mm以上は取
りたいところである。 By the way, when a high-voltage transistor chip 1 is used, the shortest distance along the surface of the resin body 8 between the external leads 3 and 4 and between the external leads 3 and 5, the so-called creepage distance between the external leads. l
becomes a problem. That is, when a high voltage is applied, breakdown voltage failures are likely to occur where the resin surface between the external leads becomes a current path, so for example, in products with a breakdown voltage of 400 V or more, it is desirable to have a creepage distance l between the external leads of 2 mm or more.
しかし、外部リードの幅広部の幅Ｗは、補強部
としての効果を持たせるために小さくするにも限
度がある。また、外部リードの間隔ｐは、半導体
装置の小形化の要求に応えるために樹脂体８の幅
をできるだけ小さく設計する必要のあることか
ら、大きくするにも限度がある。しかも、外部リ
ードの間隔ｐは、業界としての標準的な値があつ
て設計の自由度がない場合も多い。このため、特
に小形の樹脂モールド形パワートランジスタで
は、その耐圧からすると外部リード間の沿面距離
ｌが不足している場合があり、悪条件下の使用で
は樹脂体８の表面において耐圧不良を引き起こす
恐れがあつた。 However, there is a limit to how small the width W of the wide portion of the external lead can be made to have the effect of a reinforcing portion. Furthermore, there is a limit to increasing the interval p between the external leads because it is necessary to design the width of the resin body 8 to be as small as possible in order to meet the demand for miniaturization of semiconductor devices. Moreover, the distance p between the external leads has a standard value as an industry, and there is often no freedom in design. For this reason, especially in small resin-molded power transistors, the creepage distance l between the external leads may be insufficient considering the withstand voltage, and if used under adverse conditions, there is a risk of voltage withstand failure on the surface of the resin body 8. It was hot.
本考案は上記従来の欠点を解消するためのもの
で、外部リード間の沿面距離を大きく取れる絶縁
物封止半導体装置を提供することを目的とする。 The present invention is intended to eliminate the above-mentioned conventional drawbacks, and aims to provide an insulator-sealed semiconductor device in which the creepage distance between external leads can be increased.
本考案は、以下で実施例について説明するよう
に、外部リードを導出する部分の絶縁物封止形状
および外部リードの幅広部の形状に特徴を有する
絶縁物封止半導体装置である。 The present invention is an insulator-sealed semiconductor device characterized by the shape of the insulator-sealed portion of the portion from which the external lead is led out and the shape of the wide portion of the external lead, as will be described with reference to embodiments below.
第５図〜第８図は、本考案の１実施例に係る樹
脂モールド形パワートランジスタを示すもので、
第１図〜第４図の従来構造にそれぞれ対応してい
る。したがつて、同一箇所には同一符号を付し、
その説明を省略する。なお、断面は実質的に同一
箇所であるので、第１図〜第８図に共通する形で
Ａ−Ａ線断面と表示した。 5 to 8 show a resin molded power transistor according to an embodiment of the present invention,
These correspond to the conventional structures shown in FIGS. 1 to 4, respectively. Therefore, the same parts are given the same symbols,
The explanation will be omitted. Note that since the cross sections are at substantially the same location, they are indicated as A-A line cross sections in a common manner in FIGS. 1 to 8.
中央に位置する外部リード３については、幅広
部３ａが幅狭部３ｂを樹脂体８まで延長した部分
の両側に張出している。上側に位置する外部リー
ド４については、幅広部４ａは幅狭部４ｂを樹脂
体８まで延長した部分の上側（外部リード３に対
面する側とは反対側）にのみ張出しており、外部
リード４の下側面は樹脂体８から先端まで直線的
に延びている。下側に位置する外部リード５につ
いては、上下の違いがあるだけで、外部リード４
と同じである。 Regarding the external lead 3 located at the center, the wide portion 3a extends to both sides of the portion where the narrow portion 3b extends to the resin body 8. Regarding the external lead 4 located on the upper side, the wide part 4a protrudes only above the part extending the narrow part 4b to the resin body 8 (the side opposite to the side facing the external lead 3), and the external lead 4 The lower surface extends linearly from the resin body 8 to the tip. Regarding the external lead 5 located on the lower side, there is only a difference in the top and bottom, and the external lead 4
is the same as
なお、外部リードの幅広部３ａ，４ａ，５ａに
は、第７図に対応する第９図の平面図で示すよう
に、製造段階で外部リード同志を連結していた部
材を切断した結果として残る連結部材残存部９が
見られる場合が多い。しかし、連結部材残存部９
は、樹脂体８から少し離れているので、外部リー
ド間の沿面距離ｌに関しては何らの影響を与えな
い。 Note that, as shown in the plan view of FIG. 9 corresponding to FIG. 7, the wide parts 3a, 4a, and 5a of the external leads remain as a result of cutting the members that connected the external leads together during the manufacturing stage. In many cases, the connecting member remaining portion 9 can be seen. However, the connecting member remaining portion 9
is a little apart from the resin body 8, so it does not have any influence on the creepage distance l between the external leads.
外部リード３と４の間および外部リード３と５
の間には、樹脂体８の形状変更による凹部１０，
１１を設けている。このため、外部リード４，５
は、凹部１０，１１の底面に対して相対的に凸部
となる樹脂体８の側面からそれぞれ導出してい
る。 Between external leads 3 and 4 and external leads 3 and 5
In between, there is a recess 10 formed by changing the shape of the resin body 8,
There are 11. For this reason, external leads 4, 5
are respectively led out from the side surfaces of the resin body 8 which are convex portions relative to the bottom surfaces of the recesses 10 and 11.
この実施例によれば、樹脂体８に凹部１０，１
１を形成したことによつて、外部リード間の沿面
距離ｌが大きく取られている。また、外部リード
４，５の幅広部４ａ，５ａの形状を直線状の外部
リードと見なせる範囲で変更したことによつて
も、直線状の外部リードのもつ取扱いの容易さを
損なうことなく外部リード間の沿面距離ｌが大き
く取られている。１例として、外部リードの間隔
ｐが2.54mm、外部リードの幅広部の幅Ｗが1.4mm、
外部リードの幅狭部の幅が0.7mm、凹部１０，１
１の深さを0.6mmとすると、外部リード間の沿面
距離は2.09mm（外部リード４，５の形状の変更
がないときは1.74mm）となる。同じ条件で従来構
造であれば、ｌは1.14mmである。 According to this embodiment, the recesses 10 and 1 are formed in the resin body 8.
1, the creepage distance l between the external leads is increased. Furthermore, by changing the shape of the wide parts 4a, 5a of the external leads 4, 5 to the extent that they can be considered as straight external leads, the external leads can be A large creepage distance l is taken between the two. As an example, the interval p of the external leads is 2.54 mm, the width W of the wide part of the external leads is 1.4 mm,
The width of the narrow part of the external lead is 0.7 mm, and the recess is 10,1.
1 is 0.6 mm, the creepage distance between the external leads is 2.09 mm (1.74 mm when the shapes of the external leads 4 and 5 are not changed). If the conventional structure is used under the same conditions, l is 1.14 mm.
以上、実施例について説明したように、本考案
によれば外部リード間の沿面距離を大きくとれる
ため、高耐圧化の可能な絶縁物封止半導体装置を
提供することができる。 As described above with respect to the embodiments, according to the present invention, since the creepage distance between the external leads can be increased, it is possible to provide an insulator-sealed semiconductor device that can achieve high withstand voltage.
なお、本考案は上記実施例に限定されることな
く、その趣旨に基づいて種々の変形・応用が可能
である。例えば、第１０図に示すように凹部１
０，１１の代わりに凸部１２を設けることによつ
ても同様の効果が得られる。 Note that the present invention is not limited to the above-mentioned embodiments, and various modifications and applications can be made based on the spirit thereof. For example, as shown in FIG.
Similar effects can be obtained by providing convex portions 12 instead of 0 and 11.
第１図〜第４図は従来の絶縁物封止半導体装置
を示す。第５図〜第９図は本考案に係る絶縁物封
止半導体装置を示す。第１０図は本考案を説明す
るための変形例に係る絶縁物封止半導体装置を示
す。第１図、第３図、第５図および第７図は平面
図で、第２図、第４図、第６図および第８図はそ
れぞれのＡ−Ａ線断面図である。第９図と第１０
図も平面図である。
１はパワートランジスタチツプ（半導体素子）、
２は放熱板、３，４，５は外部リード、３ａ，４
ａ，５ａは外部リードの幅広部、３ｂ，４ｂ，５
ｂは外部リードの幅狭部、４ｃ，５ｃは外部リー
ドの内側リード線用端子部、６，７は内部リード
線、８は樹脂体（絶縁物）、９は連結部材残存部、
１０，１１は樹脂体の凹部、１２は樹脂体の凸
部。
1 to 4 show a conventional insulator-sealed semiconductor device. 5 to 9 show an insulator-sealed semiconductor device according to the present invention. FIG. 10 shows an insulator-sealed semiconductor device according to a modified example for explaining the present invention. 1, 3, 5, and 7 are plan views, and FIGS. 2, 4, 6, and 8 are sectional views taken along the line A--A. Figures 9 and 10
The figure is also a plan view. 1 is a power transistor chip (semiconductor element),
2 is a heat sink, 3, 4, 5 are external leads, 3a, 4
a, 5a are wide parts of external leads, 3b, 4b, 5
b is the narrow width part of the external lead, 4c and 5c are the inner lead wire terminal parts of the external lead, 6 and 7 are the internal lead wires, 8 is the resin body (insulator), 9 is the remaining part of the connecting member,
10 and 11 are concave portions of the resin body, and 12 are convex portions of the resin body.
Claims (1)
され、第１、第２および第３の外部リードが第１
の外部リードを中心にして並列配置され、前記第
１の外部リードの一端は前記放熱板に連結され、
前記第２と第３の外部リードの一端はそれぞれリ
ード線接続用端子部となつて前記放熱板に隣接
し、前記第２と第３の外部リードの前記リード線
接続用端子部と前記半導体素子の表面はそれぞれ
内部リード線で接続され、少なくとも前記半導体
素子と前記第１、第２および第３の外部リードの
前記一端と前記内部リード線とが絶縁物によつて
封止されている構造において、 前記第１、第２および第３の外部リードは前記
絶縁物からの導出側が幅広部、前記幅広部から先
端側が幅狭部となつており、前記第１の外部リー
ドの幅広部は前記第１の外部リードの幅狭部を前
記絶縁物まで延長した部分の両側に張出してお
り、前記第２および第３の外部リードの幅広部は
それぞれ前記第２および第３の外部リードの幅狭
部を前記絶縁物まで延長した部分の前記第１の外
部リードに対面する側と反対側にのみ張出してお
り、前記第２および第３の外部リードの前記第１
の外部リードに対面する側は前記絶縁物から前記
先端側まで直線的に延びた形状とし、 かつ前記絶縁物の前記第１の外部リードと前記
第２の外部リードとの間、および前記第１の外部
リードと前記第３の外部リードとの間に凹部また
は凸部を形成していることを特徴とする絶縁物封
止半導体装置。[Claims for Utility Model Registration] The back surface of the semiconductor element is fixed to one main surface of the heat sink, and the first, second and third external leads are connected to the first
are arranged in parallel around the external lead of the first external lead, one end of the first external lead is connected to the heat sink,
One ends of the second and third external leads each serve as lead wire connection terminal portions and are adjacent to the heat sink, and the lead wire connection terminal portions of the second and third external leads and the semiconductor element are connected to each other by internal lead wires, and at least the semiconductor element, the one ends of the first, second and third external leads, and the internal lead wires are sealed with an insulator. The first, second, and third external leads have a wide portion on the side leading out from the insulator, and a narrow portion on the tip side from the wide portion, and the wide portion of the first external lead is the wide portion on the side leading out from the insulator. The narrow portion of the first external lead extends to both sides of the extended portion to the insulator, and the wide portions of the second and third external leads overlap the narrow portions of the second and third external leads, respectively. extends to the insulator only on the side opposite to the side facing the first external lead, and the first external lead of the second and third external leads
The side facing the external lead has a shape that extends linearly from the insulator to the tip side, and the side of the insulator that faces the first external lead and the second external lead has a shape that extends linearly from the insulator to the tip side, and An insulator-sealed semiconductor device characterized in that a concave portion or a convex portion is formed between the external lead and the third external lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987151521U JPH0328511Y2 (en) | 1987-10-02 | 1987-10-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987151521U JPH0328511Y2 (en) | 1987-10-02 | 1987-10-02 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6371547U JPS6371547U (en) | 1988-05-13 |
| JPH0328511Y2 true JPH0328511Y2 (en) | 1991-06-19 |
Family
ID=31068670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987151521U Expired JPH0328511Y2 (en) | 1987-10-02 | 1987-10-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0328511Y2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100958422B1 (en) * | 2003-01-21 | 2010-05-18 | 페어차일드코리아반도체 주식회사 | Semiconductor package having the structure for high voltage application |
| KR102192997B1 (en) * | 2014-01-27 | 2020-12-18 | 삼성전자주식회사 | Semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS588664A (en) * | 1981-07-08 | 1983-01-18 | Nec Corp | Multisize printer |
-
1987
- 1987-10-02 JP JP1987151521U patent/JPH0328511Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS588664A (en) * | 1981-07-08 | 1983-01-18 | Nec Corp | Multisize printer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6371547U (en) | 1988-05-13 |
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