JPS63110632A - Diffusion of impurity - Google Patents

Diffusion of impurity

Info

Publication number
JPS63110632A
JPS63110632A JP25734386A JP25734386A JPS63110632A JP S63110632 A JPS63110632 A JP S63110632A JP 25734386 A JP25734386 A JP 25734386A JP 25734386 A JP25734386 A JP 25734386A JP S63110632 A JPS63110632 A JP S63110632A
Authority
JP
Japan
Prior art keywords
substrates
diffused
diffusion
substrate
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25734386A
Other languages
Japanese (ja)
Inventor
Toshiyuki Kotani
俊幸 小谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25734386A priority Critical patent/JPS63110632A/en
Publication of JPS63110632A publication Critical patent/JPS63110632A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable rugged substrate to be impurity-diffused by a method wherein substrates to be diffused opposing to silicon substrates with coating diffusion source sintered thereon are juxtaposed with one another while respective substrates are heated by an encircling heater up to specified temperature to diffuse impurity on the substrate to be diffused. CONSTITUTION:Silicon substrates 1 with coating diffusion source 2 sintered thereon as well as the other substrates 3 with deep grooves cut therein opposing to the substrates 1 are juxtaposed with one another on a quartz susceptor 4. The quartz susceptor 4 is provided with a quartz furnace core tube 6 encircled by a resistor heater 5 to be heated. The Si substrates 1 with coating diffusion source 2 containing As sintered thereon opposing to the silicon substrates 3 are inserted into the quartz furnace core tube 6. At this time, mixed gas of N2, O2 is fed from a gas leading-in port 7 to perform the diffusion process. Through these procedures, rugged sides and bottom part of rugged substrates to be diffused can be diffused evenly.

Description

【発明の詳細な説明】 [産業上の利用分野J 本発明は半導体装置製造方法における不純物拡散方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application J] The present invention relates to an impurity diffusion method in a semiconductor device manufacturing method.

〔従来の技術〕[Conventional technology]

従来、この種の不純物拡散法としては、ガス拡散法、固
体ソース拡散法、塗布拡散法、イオン注入法がある。
Conventionally, this type of impurity diffusion method includes a gas diffusion method, a solid source diffusion method, a coating diffusion method, and an ion implantation method.

〔発明が解決しようとする問題点) −E述した従来の各方法は、各々次の様な欠点がある。[Problem that the invention attempts to solve] -E Each of the conventional methods described above has the following drawbacks.

i)ガス拡散法では、ヒ素の様な有毒なものを用いた開
管拡散法は、尺体に害を及ぼし、実用的でなく、又閉管
拡散法を用いても、管壁に付着したヒ素酸化物が高温の
なめ管の開閉毎に外に漏れ、安全、衛生」二の問題とな
る。
i) Regarding gas diffusion methods, open tube diffusion methods using toxic substances such as arsenic are harmful to the body and are impractical; Oxide leaks out each time the high-temperature round pipe is opened and closed, creating a safety and hygiene problem.

ii)固体ソース拡散法は、酸化アルミニウム。ii) Solid source diffusion method is aluminum oxide.

酸1ヒマグイ・シウム等の酸化物に拡散不純物(たとえ
ば13□03等)を混入しているので、拡散不純物をシ
リコン・(Si)基板等に拡散するとき、同時にアルミ
ニウムやマグネシウム等の不純物も拡散され、Si基板
の結晶性が悪くなり、電気特性も劣化する。
Since diffusion impurities (for example, 13□03, etc.) are mixed into oxides such as acid 1 and sium, when diffusion impurities are diffused into silicon/(Si) substrates, impurities such as aluminum and magnesium are also diffused at the same time. As a result, the crystallinity of the Si substrate deteriorates, and the electrical characteristics also deteriorate.

1ii)塗布拡散法では、被拡散基板が完全に平坦であ
ればよいが、被拡散基板に凹凸がある場き、塗布膜厚の
差や応力により、拡散不純物濃度・深さか不均一になる
。特に、被拡散基板に深い溝等があると、渦の側面と底
部では非常に大きな不純物濃度深さむらが見られる。
1ii) In the coating diffusion method, it is sufficient if the diffusion target substrate is completely flat, but if the diffusion target substrate has irregularities, the concentration and depth of the diffusion impurity will be non-uniform due to differences in coating film thickness and stress. In particular, if there are deep grooves or the like in the substrate to be diffused, a very large impurity concentration depth unevenness will be observed at the sides and bottom of the vortex.

iv)イオン注入法では、被拡散基板にイオン注入入射
方向と平行な面には不純物が導入できないため、溝の1
m面には不純物が拡散できない。
iv) In the ion implantation method, impurities cannot be introduced into the surface parallel to the ion implantation direction of the substrate to be diffused.
Impurities cannot diffuse into the m-plane.

本発明の目的は、これらの欠点を除き、ヒ素の様な有害
元素も安全に拡散でき、結晶性、電気特性の劣化も生じ
ず、かつ被拡散基板に溝の様な凹凸があっても、側面、
底部によらず均一に不純物拡散できるようにした不純物
拡散法を提供することにある。
The purpose of the present invention is to eliminate these drawbacks, to safely diffuse harmful elements such as arsenic, to prevent deterioration of crystallinity and electrical properties, and to diffuse even if the substrate to be diffused has irregularities such as grooves. side,
An object of the present invention is to provide an impurity diffusion method that enables uniform impurity diffusion regardless of the bottom part.

1′問題点を解決するための手段j 本発明の不純物拡散法の構成は、塗布拡散源の焼結され
たシリコン基板を拡散源とし、この塗布拡散限焼結シリ
コン基板と対向する様に被拡散基板を設置し、これら各
基板を周囲から所定温度に加熱し、前記拡散源を不純物
として前記部拡散基板−ヒに不純物拡散を行うことを特
徴とする。
1' Means for solving the problem j The structure of the impurity diffusion method of the present invention uses a sintered silicon substrate of a coating diffusion source as a diffusion source, and a coating is placed opposite to the coating diffusion limited sintered silicon substrate. The method is characterized in that diffusion substrates are installed, each of these substrates is heated from the surroundings to a predetermined temperature, and the impurity is diffused into the partial diffusion substrate 1 using the diffusion source as an impurity.

(1実施例〕 次に本発明について図面を参照して説明する。(1 example) Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を説明する製造装置の縦断面
図である。塗布拡散源23表面に焼結したシリコン基板
lは、この基板1のに面に向き合う様に深い渦を有する
被拡散基板3と共に石英支持台4に・■べられている。
FIG. 1 is a longitudinal cross-sectional view of a manufacturing apparatus illustrating an embodiment of the present invention. A silicon substrate 1 sintered on the surface of the coating diffusion source 23 is mounted on a quartz support 4 together with a diffusion target substrate 3 having a deep vortex so as to face the surface of the substrate 1 .

この石英支持台4は石英炉芯管6内に設けられてあり、
この石英炉芯管0の回りが抵抗加熱し−タ5によって囲
まれ、所定の温度になる様に加熱されている。この石英
炉芯管6のガス導入ロアから、N2,02等のガスを導
入して一定の雰囲気に保たれている。
This quartz support stand 4 is provided inside the quartz furnace core tube 6,
The quartz furnace core tube 0 is surrounded by a resistance heating heater 5 and heated to a predetermined temperature. A constant atmosphere is maintained by introducing gas such as N2, 02, etc. from the gas introduction lower part of this quartz furnace core tube 6.

この石英炉芯管6内にAsを含む塗布拡散源2を700
 ℃のN2雰囲気で10分間焼結したSi基板1を、深
さ7μm、開口2μm角の深い講を持つシリコン基板3
と対向させて挿入し、この石英炉芯管6は抵抗加熱し−
タ5によって1140℃に保持されている。この時ガス
導入[」7からN210e/m i n、 02100
cc、/m i nの混合ガスを流し3時間拡散を行う
。深い渦の側面。
A coating diffusion source 2 containing As is placed in the quartz furnace core tube 6 at a rate of 700 mm.
A Si substrate 1 sintered for 10 minutes in a N2 atmosphere at
This quartz furnace core tube 6 is resistance heated.
The temperature is maintained at 1140° C. by a heater 5. At this time, gas introduction [7 to N210e/min, 02100
A mixed gas of cc,/min was flowed to perform diffusion for 3 hours. side of a deep vortex.

底部に均一に深さ1.8μm1層抵抗400Ω7/口の
拡散層が形成できる。また、石英支持台llは抵抗加熱
し−タ5のない領域で十分冷却されてから取出されるの
で、As酸化物の蒸発物は石英炉芯管内のみにあり、外
には漏れず安全上問題はない。
A diffusion layer with a depth of 1.8 μm and a single layer resistance of 400Ω7/hole can be formed uniformly on the bottom. In addition, since the quartz support 11 is sufficiently cooled in an area without the resistance heating heater 5 before being taken out, the vaporized As oxide is present only in the quartz furnace core tube and does not leak outside, which poses a safety problem. There isn't.

また、Bを合む塗布拡散源2を500℃で焼結した塗布
拡散源焼結シリコン基板1を用いて、1000℃20分
Bを拡散したシリコン基板1を、SiO2除去後ジルト
ルエ・ソチングを用いて結晶欠陥チェックを行ったとこ
ろ、結晶欠陥は500ケ/ r、 2以下であっな。一
方、Bの固体ソース拡散源(B203  A l! 2
03  M、02系〉を用いて、Bを拡散したSi基板
を同様に結晶欠陥チェックした結果は、〜106ケ/c
12で結晶欠陥が多発していた。
In addition, a coating diffusion source 2 containing B was sintered at 500° C. using a coating diffusion source sintered silicon substrate 1, and a silicon substrate 1 on which B was diffused at 1000° C. for 20 minutes was removed using siltlue soching after SiO2 was removed. When I checked for crystal defects, the number of crystal defects was less than 500/r, 2. On the other hand, the solid source diffusion source of B (B203 A l! 2
03 M, 02 series>, the crystal defects were similarly checked on a Si substrate diffused with B, and the result was ~106 defects/c.
No. 12 had many crystal defects.

「発明の効果] 以上説明したように本発明は、塗布拡散源を焼結したシ
リコン基板を拡散とし、この塗布拡散源焼結シリコン基
板と対向する様に、被拡散基板を置して拡散することに
より、有害物質の拡散を安全に行い、かつ、結晶欠陥無
しで、凹凸のある被拡散基板の凹凸の側面、底部へ均一
に拡散できる効果がある。
"Effects of the Invention" As explained above, the present invention uses a sintered silicon substrate as a coating diffusion source for diffusion, and places a substrate to be diffused to face the sintered silicon substrate for diffusion. This has the effect of safely diffusing harmful substances and uniformly diffusing them to the sides and bottom of the uneven diffusion target substrate without crystal defects.

【図面の簡単な説明】[Brief explanation of the drawing]

第11aは本発明の一実施例を説明する製造装置の縦断
面図である。 1・・・塗布拡散源焼結シリコン基板、2・・・基板表
面上の焼結塗布拡散源、3・・・深い講を有する被拡散
基板、4・・・石英支持台、5・・・抵抗加熱ヒータ、
6・・・石英炉芯管、7・・・ガス導入口。 1・1.ノ
No. 11a is a longitudinal sectional view of a manufacturing apparatus for explaining an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Coating diffusion source sintered silicon substrate, 2... Sintering coating diffusion source on the substrate surface, 3... Diffusion target substrate having deep grooves, 4... Quartz support base, 5... resistance heating heater,
6...Quartz furnace core tube, 7...Gas inlet. 1.1. of

Claims (1)

【特許請求の範囲】[Claims] 塗布拡散源の焼結されたシリコン基板を拡散源とし、こ
の塗布拡散源焼結シリコン基板と対向する様に被拡散基
板を設置し、これら各基板を周囲から所定温度に加熱し
、前記拡散源を不純物として前記部拡散基板上に拡散す
ることを特徴とする不純物拡散方法。
A sintered silicon substrate of a coating diffusion source is used as a diffusion source, a substrate to be diffused is installed to face the sintered silicon substrate of the coating diffusion source, each of these substrates is heated from the surroundings to a predetermined temperature, and the diffusion source is heated to a predetermined temperature. An impurity diffusion method characterized in that the impurity is diffused onto the diffusion substrate as an impurity.
JP25734386A 1986-10-28 1986-10-28 Diffusion of impurity Pending JPS63110632A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25734386A JPS63110632A (en) 1986-10-28 1986-10-28 Diffusion of impurity

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25734386A JPS63110632A (en) 1986-10-28 1986-10-28 Diffusion of impurity

Publications (1)

Publication Number Publication Date
JPS63110632A true JPS63110632A (en) 1988-05-16

Family

ID=17305050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25734386A Pending JPS63110632A (en) 1986-10-28 1986-10-28 Diffusion of impurity

Country Status (1)

Country Link
JP (1) JPS63110632A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06508957A (en) * 1990-10-02 1994-10-06 ユニバーシティ オブ ヒューストン システム Method and apparatus for doping silicon wafers using solid dopant sources and rapid thermal processing
JP2009059949A (en) * 2007-08-31 2009-03-19 Sharp Corp Semiconductor device and manufacturing method for the semiconductor device
CN112466746A (en) * 2020-04-29 2021-03-09 山东芯源微电子有限公司 Membrane diffusion source forming machine

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06508957A (en) * 1990-10-02 1994-10-06 ユニバーシティ オブ ヒューストン システム Method and apparatus for doping silicon wafers using solid dopant sources and rapid thermal processing
JP2009059949A (en) * 2007-08-31 2009-03-19 Sharp Corp Semiconductor device and manufacturing method for the semiconductor device
CN112466746A (en) * 2020-04-29 2021-03-09 山东芯源微电子有限公司 Membrane diffusion source forming machine
CN112466746B (en) * 2020-04-29 2022-04-15 山东芯源微电子有限公司 Membrane diffusion source forming machine

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